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Commit 9958922a320d6ee9e9f96b30110bc3765b3e8299

Authored by Takashi Iwai
1 parent 4a8b89f995
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ALSA: hda/ca0132 - Add missing \n to debug prints 

Signed-off-by: Takashi Iwai <tiwai@suse.de>

Showing 1 changed file with 75 additions and 75 deletions Side-by-side Diff

sound/pci/hda/patch_ca0132.c
Diff comments   View file @ 9958922
... ... @@ -858,7 +858,7 @@
858 858 int status = 0;
859 859  
860 860 if (data == NULL) {
861   - snd_printdd(KERN_ERR "chipio_write_data null ptr");
  861 + snd_printdd(KERN_ERR "chipio_write_data null ptr\n");
862 862 return -EINVAL;
863 863 }
864 864  
865 865  
... ... @@ -1397,12 +1397,12 @@
1397 1397 return -EINVAL;
1398 1398  
1399 1399 if (dir == SCP_GET && reply == NULL) {
1400   - snd_printdd(KERN_ERR "dspio_scp get but has no buffer");
  1400 + snd_printdd(KERN_ERR "dspio_scp get but has no buffer\n");
1401 1401 return -EINVAL;
1402 1402 }
1403 1403  
1404 1404 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) {
1405   - snd_printdd(KERN_ERR "dspio_scp bad resp buf len parms");
  1405 + snd_printdd(KERN_ERR "dspio_scp bad resp buf len parms\n");
1406 1406 return -EINVAL;
1407 1407 }
1408 1408  
... ... @@ -1420,7 +1420,7 @@
1420 1420 sizeof(scp_reply), &ret_bytes);
1421 1421  
1422 1422 if (status < 0) {
1423   - snd_printdd(KERN_ERR "dspio_scp: send scp msg failed");
  1423 + snd_printdd(KERN_ERR "dspio_scp: send scp msg failed\n");
1424 1424 return status;
1425 1425 }
1426 1426  
1427 1427  
1428 1428  
... ... @@ -1439,17 +1439,17 @@
1439 1439 / sizeof(unsigned int);
1440 1440  
1441 1441 if (*reply_len < ret_size*sizeof(unsigned int)) {
1442   - snd_printdd(KERN_ERR "reply too long for buf");
  1442 + snd_printdd(KERN_ERR "reply too long for buf\n");
1443 1443 return -EINVAL;
1444 1444 } else if (ret_size != reply_data_size) {
1445   - snd_printdd(KERN_ERR "RetLen and HdrLen .NE.");
  1445 + snd_printdd(KERN_ERR "RetLen and HdrLen .NE.\n");
1446 1446 return -EINVAL;
1447 1447 } else {
1448 1448 *reply_len = ret_size*sizeof(unsigned int);
1449 1449 memcpy(reply, scp_reply.data, *reply_len);
1450 1450 }
1451 1451 } else {
1452   - snd_printdd(KERN_ERR "reply ill-formed or errflag set");
  1452 + snd_printdd(KERN_ERR "reply ill-formed or errflag set\n");
1453 1453 return -EIO;
1454 1454 }
1455 1455  
1456 1456  
1457 1457  
1458 1458  
... ... @@ -1479,22 +1479,22 @@
1479 1479 int status = 0;
1480 1480 unsigned int size = sizeof(dma_chan);
1481 1481  
1482   - snd_printdd(KERN_INFO " dspio_alloc_dma_chan() -- begin");
  1482 + snd_printdd(KERN_INFO " dspio_alloc_dma_chan() -- begin\n");
1483 1483 status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN,
1484 1484 SCP_GET, NULL, 0, dma_chan, &size);
1485 1485  
1486 1486 if (status < 0) {
1487   - snd_printdd(KERN_INFO "dspio_alloc_dma_chan: SCP Failed");
  1487 + snd_printdd(KERN_INFO "dspio_alloc_dma_chan: SCP Failed\n");
1488 1488 return status;
1489 1489 }
1490 1490  
1491 1491 if ((*dma_chan + 1) == 0) {
1492   - snd_printdd(KERN_INFO "no free dma channels to allocate");
  1492 + snd_printdd(KERN_INFO "no free dma channels to allocate\n");
1493 1493 return -EBUSY;
1494 1494 }
1495 1495  
1496 1496 snd_printdd("dspio_alloc_dma_chan: chan=%d\n", *dma_chan);
1497   - snd_printdd(KERN_INFO " dspio_alloc_dma_chan() -- complete");
  1497 + snd_printdd(KERN_INFO " dspio_alloc_dma_chan() -- complete\n");
1498 1498  
1499 1499 return status;
1500 1500 }
1501 1501  
1502 1502  
... ... @@ -1507,18 +1507,18 @@
1507 1507 int status = 0;
1508 1508 unsigned int dummy = 0;
1509 1509  
1510   - snd_printdd(KERN_INFO " dspio_free_dma_chan() -- begin");
  1510 + snd_printdd(KERN_INFO " dspio_free_dma_chan() -- begin\n");
1511 1511 snd_printdd("dspio_free_dma_chan: chan=%d\n", dma_chan);
1512 1512  
1513 1513 status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN,
1514 1514 SCP_SET, &dma_chan, sizeof(dma_chan), NULL, &dummy);
1515 1515  
1516 1516 if (status < 0) {
1517   - snd_printdd(KERN_INFO "dspio_free_dma_chan: SCP Failed");
  1517 + snd_printdd(KERN_INFO "dspio_free_dma_chan: SCP Failed\n");
1518 1518 return status;
1519 1519 }
1520 1520  
1521   - snd_printdd(KERN_INFO " dspio_free_dma_chan() -- complete");
  1521 + snd_printdd(KERN_INFO " dspio_free_dma_chan() -- complete\n");
1522 1522  
1523 1523 return status;
1524 1524 }
1525 1525  
1526 1526  
1527 1527  
1528 1528  
1529 1529  
1530 1530  
... ... @@ -1626,39 +1626,39 @@
1626 1626 unsigned int active;
1627 1627 bool code, yram;
1628 1628  
1629   - snd_printdd(KERN_INFO "-- dsp_dma_setup_common() -- Begin ---------");
  1629 + snd_printdd(KERN_INFO "-- dsp_dma_setup_common() -- Begin ---------\n");
1630 1630  
1631 1631 if (dma_chan >= DSPDMAC_DMA_CFG_CHANNEL_COUNT) {
1632   - snd_printdd(KERN_ERR "dma chan num invalid");
  1632 + snd_printdd(KERN_ERR "dma chan num invalid\n");
1633 1633 return -EINVAL;
1634 1634 }
1635 1635  
1636 1636 if (dsp_is_dma_active(codec, dma_chan)) {
1637   - snd_printdd(KERN_ERR "dma already active");
  1637 + snd_printdd(KERN_ERR "dma already active\n");
1638 1638 return -EBUSY;
1639 1639 }
1640 1640  
1641 1641 dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram);
1642 1642  
1643 1643 if (dsp_addx == INVALID_CHIP_ADDRESS) {
1644   - snd_printdd(KERN_ERR "invalid chip addr");
  1644 + snd_printdd(KERN_ERR "invalid chip addr\n");
1645 1645 return -ENXIO;
1646 1646 }
1647 1647  
1648 1648 chnl_prop = DSPDMAC_CHNLPROP_AC_MASK;
1649 1649 active = 0;
1650 1650  
1651   - snd_printdd(KERN_INFO " dsp_dma_setup_common() start reg pgm");
  1651 + snd_printdd(KERN_INFO " dsp_dma_setup_common() start reg pgm\n");
1652 1652  
1653 1653 if (ovly) {
1654 1654 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET,
1655 1655 &chnl_prop);
1656 1656  
1657 1657 if (status < 0) {
1658   - snd_printdd(KERN_ERR "read CHNLPROP Reg fail");
  1658 + snd_printdd(KERN_ERR "read CHNLPROP Reg fail\n");
1659 1659 return status;
1660 1660 }
1661   - snd_printdd(KERN_INFO "dsp_dma_setup_common() Read CHNLPROP");
  1661 + snd_printdd(KERN_INFO "dsp_dma_setup_common() Read CHNLPROP\n");
1662 1662 }
1663 1663  
1664 1664 if (!code)
1665 1665  
1666 1666  
1667 1667  
... ... @@ -1670,20 +1670,20 @@
1670 1670  
1671 1671 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop);
1672 1672 if (status < 0) {
1673   - snd_printdd(KERN_ERR "write CHNLPROP Reg fail");
  1673 + snd_printdd(KERN_ERR "write CHNLPROP Reg fail\n");
1674 1674 return status;
1675 1675 }
1676   - snd_printdd(KERN_INFO " dsp_dma_setup_common() Write CHNLPROP");
  1676 + snd_printdd(KERN_INFO " dsp_dma_setup_common() Write CHNLPROP\n");
1677 1677  
1678 1678 if (ovly) {
1679 1679 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET,
1680 1680 &active);
1681 1681  
1682 1682 if (status < 0) {
1683   - snd_printdd(KERN_ERR "read ACTIVE Reg fail");
  1683 + snd_printdd(KERN_ERR "read ACTIVE Reg fail\n");
1684 1684 return status;
1685 1685 }
1686   - snd_printdd(KERN_INFO "dsp_dma_setup_common() Read ACTIVE");
  1686 + snd_printdd(KERN_INFO "dsp_dma_setup_common() Read ACTIVE\n");
1687 1687 }
1688 1688  
1689 1689 active &= (~(1 << (DSPDMAC_ACTIVE_AAR_LOBIT + dma_chan))) &
1690 1690  
1691 1691  
1692 1692  
1693 1693  
1694 1694  
... ... @@ -1691,27 +1691,27 @@
1691 1691  
1692 1692 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active);
1693 1693 if (status < 0) {
1694   - snd_printdd(KERN_ERR "write ACTIVE Reg fail");
  1694 + snd_printdd(KERN_ERR "write ACTIVE Reg fail\n");
1695 1695 return status;
1696 1696 }
1697 1697  
1698   - snd_printdd(KERN_INFO " dsp_dma_setup_common() Write ACTIVE");
  1698 + snd_printdd(KERN_INFO " dsp_dma_setup_common() Write ACTIVE\n");
1699 1699  
1700 1700 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan),
1701 1701 port_map_mask);
1702 1702 if (status < 0) {
1703   - snd_printdd(KERN_ERR "write AUDCHSEL Reg fail");
  1703 + snd_printdd(KERN_ERR "write AUDCHSEL Reg fail\n");
1704 1704 return status;
1705 1705 }
1706   - snd_printdd(KERN_INFO " dsp_dma_setup_common() Write AUDCHSEL");
  1706 + snd_printdd(KERN_INFO " dsp_dma_setup_common() Write AUDCHSEL\n");
1707 1707  
1708 1708 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan),
1709 1709 DSPDMAC_IRQCNT_BICNT_MASK | DSPDMAC_IRQCNT_CICNT_MASK);
1710 1710 if (status < 0) {
1711   - snd_printdd(KERN_ERR "write IRQCNT Reg fail");
  1711 + snd_printdd(KERN_ERR "write IRQCNT Reg fail\n");
1712 1712 return status;
1713 1713 }
1714   - snd_printdd(KERN_INFO " dsp_dma_setup_common() Write IRQCNT");
  1714 + snd_printdd(KERN_INFO " dsp_dma_setup_common() Write IRQCNT\n");
1715 1715  
1716 1716 snd_printdd(
1717 1717 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, "
... ... @@ -1719,7 +1719,7 @@
1719 1719 chip_addx, dsp_addx, dma_chan,
1720 1720 port_map_mask, chnl_prop, active);
1721 1721  
1722   - snd_printdd(KERN_INFO "-- dsp_dma_setup_common() -- Complete ------");
  1722 + snd_printdd(KERN_INFO "-- dsp_dma_setup_common() -- Complete ------\n");
1723 1723  
1724 1724 return 0;
1725 1725 }
1726 1726  
1727 1727  
1728 1728  
... ... @@ -1745,20 +1745,20 @@
1745 1745 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT -
1746 1746 DSPDMAC_XFRCNT_BCNT_LOBIT + 1);
1747 1747  
1748   - snd_printdd(KERN_INFO "-- dsp_dma_setup() -- Begin ---------");
  1748 + snd_printdd(KERN_INFO "-- dsp_dma_setup() -- Begin ---------\n");
1749 1749  
1750 1750 if (count > max_dma_count) {
1751   - snd_printdd(KERN_ERR "count too big");
  1751 + snd_printdd(KERN_ERR "count too big\n");
1752 1752 return -EINVAL;
1753 1753 }
1754 1754  
1755 1755 dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram);
1756 1756 if (dsp_addx == INVALID_CHIP_ADDRESS) {
1757   - snd_printdd(KERN_ERR "invalid chip addr");
  1757 + snd_printdd(KERN_ERR "invalid chip addr\n");
1758 1758 return -ENXIO;
1759 1759 }
1760 1760  
1761   - snd_printdd(KERN_INFO " dsp_dma_setup() start reg pgm");
  1761 + snd_printdd(KERN_INFO " dsp_dma_setup() start reg pgm\n");
1762 1762  
1763 1763 addr_field = dsp_addx << DSPDMAC_DMACFG_DBADR_LOBIT;
1764 1764 incr_field = 0;
1765 1765  
... ... @@ -1775,10 +1775,10 @@
1775 1775 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan),
1776 1776 dma_cfg);
1777 1777 if (status < 0) {
1778   - snd_printdd(KERN_ERR "write DMACFG Reg fail");
  1778 + snd_printdd(KERN_ERR "write DMACFG Reg fail\n");
1779 1779 return status;
1780 1780 }
1781   - snd_printdd(KERN_INFO " dsp_dma_setup() Write DMACFG");
  1781 + snd_printdd(KERN_INFO " dsp_dma_setup() Write DMACFG\n");
1782 1782  
1783 1783 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT +
1784 1784 (code ? 0 : 1));
1785 1785  
... ... @@ -1786,10 +1786,10 @@
1786 1786 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan),
1787 1787 adr_ofs);
1788 1788 if (status < 0) {
1789   - snd_printdd(KERN_ERR "write DSPADROFS Reg fail");
  1789 + snd_printdd(KERN_ERR "write DSPADROFS Reg fail\n");
1790 1790 return status;
1791 1791 }
1792   - snd_printdd(KERN_INFO " dsp_dma_setup() Write DSPADROFS");
  1792 + snd_printdd(KERN_INFO " dsp_dma_setup() Write DSPADROFS\n");
1793 1793  
1794 1794 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT;
1795 1795  
1796 1796  
1797 1797  
... ... @@ -1800,17 +1800,17 @@
1800 1800 status = chipio_write(codec,
1801 1801 DSPDMAC_XFRCNT_INST_OFFSET(dma_chan), xfr_cnt);
1802 1802 if (status < 0) {
1803   - snd_printdd(KERN_ERR "write XFRCNT Reg fail");
  1803 + snd_printdd(KERN_ERR "write XFRCNT Reg fail\n");
1804 1804 return status;
1805 1805 }
1806   - snd_printdd(KERN_INFO " dsp_dma_setup() Write XFRCNT");
  1806 + snd_printdd(KERN_INFO " dsp_dma_setup() Write XFRCNT\n");
1807 1807  
1808 1808 snd_printdd(
1809 1809 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, "
1810 1810 "ADROFS=0x%x, XFRCNT=0x%x\n",
1811 1811 chip_addx, count, dma_cfg, adr_ofs, xfr_cnt);
1812 1812  
1813   - snd_printdd(KERN_INFO "-- dsp_dma_setup() -- Complete ---------");
  1813 + snd_printdd(KERN_INFO "-- dsp_dma_setup() -- Complete ---------\n");
1814 1814  
1815 1815 return 0;
1816 1816 }
1817 1817  
1818 1818  
... ... @@ -1824,17 +1824,17 @@
1824 1824 unsigned int reg = 0;
1825 1825 int status = 0;
1826 1826  
1827   - snd_printdd(KERN_INFO "-- dsp_dma_start() -- Begin ---------");
  1827 + snd_printdd(KERN_INFO "-- dsp_dma_start() -- Begin ---------\n");
1828 1828  
1829 1829 if (ovly) {
1830 1830 status = chipio_read(codec,
1831 1831 DSPDMAC_CHNLSTART_INST_OFFSET, &reg);
1832 1832  
1833 1833 if (status < 0) {
1834   - snd_printdd(KERN_ERR "read CHNLSTART reg fail");
  1834 + snd_printdd(KERN_ERR "read CHNLSTART reg fail\n");
1835 1835 return status;
1836 1836 }
1837   - snd_printdd(KERN_INFO "-- dsp_dma_start() Read CHNLSTART");
  1837 + snd_printdd(KERN_INFO "-- dsp_dma_start() Read CHNLSTART\n");
1838 1838  
1839 1839 reg &= ~(DSPDMAC_CHNLSTART_EN_MASK |
1840 1840 DSPDMAC_CHNLSTART_DIS_MASK);
1841 1841  
... ... @@ -1843,10 +1843,10 @@
1843 1843 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
1844 1844 reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_EN_LOBIT)));
1845 1845 if (status < 0) {
1846   - snd_printdd(KERN_ERR "write CHNLSTART reg fail");
  1846 + snd_printdd(KERN_ERR "write CHNLSTART reg fail\n");
1847 1847 return status;
1848 1848 }
1849   - snd_printdd(KERN_INFO "-- dsp_dma_start() -- Complete ---------");
  1849 + snd_printdd(KERN_INFO "-- dsp_dma_start() -- Complete ---------\n");
1850 1850  
1851 1851 return status;
1852 1852 }
1853 1853  
1854 1854  
... ... @@ -1860,17 +1860,17 @@
1860 1860 unsigned int reg = 0;
1861 1861 int status = 0;
1862 1862  
1863   - snd_printdd(KERN_INFO "-- dsp_dma_stop() -- Begin ---------");
  1863 + snd_printdd(KERN_INFO "-- dsp_dma_stop() -- Begin ---------\n");
1864 1864  
1865 1865 if (ovly) {
1866 1866 status = chipio_read(codec,
1867 1867 DSPDMAC_CHNLSTART_INST_OFFSET, &reg);
1868 1868  
1869 1869 if (status < 0) {
1870   - snd_printdd(KERN_ERR "read CHNLSTART reg fail");
  1870 + snd_printdd(KERN_ERR "read CHNLSTART reg fail\n");
1871 1871 return status;
1872 1872 }
1873   - snd_printdd(KERN_INFO "-- dsp_dma_stop() Read CHNLSTART");
  1873 + snd_printdd(KERN_INFO "-- dsp_dma_stop() Read CHNLSTART\n");
1874 1874 reg &= ~(DSPDMAC_CHNLSTART_EN_MASK |
1875 1875 DSPDMAC_CHNLSTART_DIS_MASK);
1876 1876 }
1877 1877  
... ... @@ -1878,10 +1878,10 @@
1878 1878 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
1879 1879 reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_DIS_LOBIT)));
1880 1880 if (status < 0) {
1881   - snd_printdd(KERN_ERR "write CHNLSTART reg fail");
  1881 + snd_printdd(KERN_ERR "write CHNLSTART reg fail\n");
1882 1882 return status;
1883 1883 }
1884   - snd_printdd(KERN_INFO "-- dsp_dma_stop() -- Complete ---------");
  1884 + snd_printdd(KERN_INFO "-- dsp_dma_stop() -- Complete ---------\n");
1885 1885  
1886 1886 return status;
1887 1887 }
1888 1888  
1889 1889  
... ... @@ -1964,17 +1964,17 @@
1964 1964 {
1965 1965 int status;
1966 1966  
1967   - snd_printdd(KERN_INFO " dsp_allocate_ports() -- begin");
  1967 + snd_printdd(KERN_INFO " dsp_allocate_ports() -- begin\n");
1968 1968  
1969 1969 if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) {
1970   - snd_printdd(KERN_ERR "bad rate multiple");
  1970 + snd_printdd(KERN_ERR "bad rate multiple\n");
1971 1971 return -EINVAL;
1972 1972 }
1973 1973  
1974 1974 status = dsp_allocate_router_ports(codec, num_chans,
1975 1975 rate_multi, 0, port_map);
1976 1976  
1977   - snd_printdd(KERN_INFO " dsp_allocate_ports() -- complete");
  1977 + snd_printdd(KERN_INFO " dsp_allocate_ports() -- complete\n");
1978 1978  
1979 1979 return status;
1980 1980 }
... ... @@ -1991,7 +1991,7 @@
1991 1991 unsigned int rate_multi = sample_rate_mul / sample_rate_div;
1992 1992  
1993 1993 if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) {
1994   - snd_printdd(KERN_ERR "bad rate multiple");
  1994 + snd_printdd(KERN_ERR "bad rate multiple\n");
1995 1995 return -EINVAL;
1996 1996 }
1997 1997  
1998 1998  
1999 1999  
... ... @@ -2009,14 +2009,14 @@
2009 2009 {
2010 2010 int status;
2011 2011  
2012   - snd_printdd(KERN_INFO " dsp_free_ports() -- begin");
  2012 + snd_printdd(KERN_INFO " dsp_free_ports() -- begin\n");
2013 2013  
2014 2014 status = dsp_free_router_ports(codec);
2015 2015 if (status < 0) {
2016   - snd_printdd(KERN_ERR "free router ports fail");
  2016 + snd_printdd(KERN_ERR "free router ports fail\n");
2017 2017 return status;
2018 2018 }
2019   - snd_printdd(KERN_INFO " dsp_free_ports() -- complete");
  2019 + snd_printdd(KERN_INFO " dsp_free_ports() -- complete\n");
2020 2020  
2021 2021 return status;
2022 2022 }
... ... @@ -2186,7 +2186,7 @@
2186 2186 unsigned int count;
2187 2187  
2188 2188 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) {
2189   - snd_printdd(KERN_ERR "hci_write invalid params");
  2189 + snd_printdd(KERN_ERR "hci_write invalid params\n");
2190 2190 return -EINVAL;
2191 2191 }
2192 2192  
... ... @@ -2195,7 +2195,7 @@
2195 2195 while (count >= 2) {
2196 2196 status = chipio_write(codec, data[0], data[1]);
2197 2197 if (status < 0) {
2198   - snd_printdd(KERN_ERR "hci_write chipio failed");
  2198 + snd_printdd(KERN_ERR "hci_write chipio failed\n");
2199 2199 return status;
2200 2200 }
2201 2201 count -= 2;
... ... @@ -2346,7 +2346,7 @@
2346 2346 if (status < 0)
2347 2347 return status;
2348 2348 if (!dsp_is_dma_active(codec, dma_chan)) {
2349   - snd_printdd(KERN_ERR "dspxfr:DMA did not start");
  2349 + snd_printdd(KERN_ERR "dspxfr:DMA did not start\n");
2350 2350 return -EIO;
2351 2351 }
2352 2352 status = dma_set_state(dma_engine, DMA_STATE_RUN);
... ... @@ -2378,7 +2378,7 @@
2378 2378 if (dma_active)
2379 2379 break;
2380 2380  
2381   - snd_printdd(KERN_INFO "+++++ DMA complete");
  2381 + snd_printdd(KERN_INFO "+++++ DMA complete\n");
2382 2382 dma_set_state(dma_engine, DMA_STATE_STOP);
2383 2383 status = dma_reset(dma_engine);
2384 2384  
... ... @@ -2452,7 +2452,7 @@
2452 2452 hda_format, &response);
2453 2453  
2454 2454 if (status < 0) {
2455   - snd_printdd(KERN_ERR "set converter format fail");
  2455 + snd_printdd(KERN_ERR "set converter format fail\n");
2456 2456 goto exit;
2457 2457 }
2458 2458  
... ... @@ -2467,7 +2467,7 @@
2467 2467 if (ovly) {
2468 2468 status = dspio_alloc_dma_chan(codec, &dma_chan);
2469 2469 if (status < 0) {
2470   - snd_printdd(KERN_ERR "alloc dmachan fail");
  2470 + snd_printdd(KERN_ERR "alloc dmachan fail\n");
2471 2471 dma_chan = INVALID_DMA_CHANNEL;
2472 2472 goto exit;
2473 2473 }
... ... @@ -2477,7 +2477,7 @@
2477 2477 status = dsp_allocate_ports_format(codec, hda_format,
2478 2478 &port_map_mask);
2479 2479 if (status < 0) {
2480   - snd_printdd(KERN_ERR "alloc ports fail");
  2480 + snd_printdd(KERN_ERR "alloc ports fail\n");
2481 2481 goto exit;
2482 2482 }
2483 2483  
2484 2484  
... ... @@ -2485,13 +2485,13 @@
2485 2485 status = codec_set_converter_stream_channel(codec,
2486 2486 WIDGET_CHIP_CTRL, stream_id, 0, &response);
2487 2487 if (status < 0) {
2488   - snd_printdd(KERN_ERR "set stream chan fail");
  2488 + snd_printdd(KERN_ERR "set stream chan fail\n");
2489 2489 goto exit;
2490 2490 }
2491 2491  
2492 2492 while ((fls_data != NULL) && !is_last(fls_data)) {
2493 2493 if (!is_valid(fls_data)) {
2494   - snd_printdd(KERN_ERR "FLS check fail");
  2494 + snd_printdd(KERN_ERR "FLS check fail\n");
2495 2495 status = -EINVAL;
2496 2496 goto exit;
2497 2497 }
... ... @@ -2534,7 +2534,7 @@
2534 2534 */
2535 2535 static void dspload_post_setup(struct hda_codec *codec)
2536 2536 {
2537   - snd_printdd(KERN_INFO "---- dspload_post_setup ------");
  2537 + snd_printdd(KERN_INFO "---- dspload_post_setup ------\n");
2538 2538  
2539 2539 /*set DSP speaker to 2.0 configuration*/
2540 2540 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080);
... ... @@ -2572,7 +2572,7 @@
2572 2572 unsigned int sample_rate;
2573 2573 unsigned short channels;
2574 2574  
2575   - snd_printdd(KERN_INFO "---- dspload_image begin ------");
  2575 + snd_printdd(KERN_INFO "---- dspload_image begin ------\n");
2576 2576 if (router_chans == 0) {
2577 2577 if (!ovly)
2578 2578 router_chans = DMA_TRANSFER_FRAME_SIZE_NWORDS;
2579 2579  
2580 2580  
2581 2581  
... ... @@ -2589,27 +2589,27 @@
2589 2589 }
2590 2590  
2591 2591 do {
2592   - snd_printdd(KERN_INFO "Ready to program DMA");
  2592 + snd_printdd(KERN_INFO "Ready to program DMA\n");
2593 2593 if (!ovly)
2594 2594 status = dsp_reset(codec);
2595 2595  
2596 2596 if (status < 0)
2597 2597 break;
2598 2598  
2599   - snd_printdd(KERN_INFO "dsp_reset() complete");
  2599 + snd_printdd(KERN_INFO "dsp_reset() complete\n");
2600 2600 status = dspxfr_image(codec, fls, reloc, sample_rate, channels,
2601 2601 ovly);
2602 2602  
2603 2603 if (status < 0)
2604 2604 break;
2605 2605  
2606   - snd_printdd(KERN_INFO "dspxfr_image() complete");
  2606 + snd_printdd(KERN_INFO "dspxfr_image() complete\n");
2607 2607 if (autostart && !ovly) {
2608 2608 dspload_post_setup(codec);
2609 2609 status = dsp_set_run_state(codec);
2610 2610 }
2611 2611  
2612   - snd_printdd(KERN_INFO "LOAD FINISHED");
  2612 + snd_printdd(KERN_INFO "LOAD FINISHED\n");
2613 2613 } while (0);
2614 2614  
2615 2615 return status;