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Commit 99cd220133cdf2a559529d522a78b2ebc1bef2d8

Authored by David S. Miller
1 parent 3d5ae6b69e
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c 

Add 'UL' markers to DCU_* macros.

Declare C functions called from assembler in entry.h

Declare C functions called from within the sparc64 arch
code in include/asm-sparc64/*.h headers as appropriate.

Remove unused routines in traps.c

Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 5 changed files with 167 additions and 70 deletions Side-by-side Diff

arch/sparc64/kernel/entry.h
Diff comments   View file @ 99cd220
... ... @@ -2,6 +2,7 @@
2 2 #define _ENTRY_H
3 3  
4 4 #include <linux/init.h>
  5 +#include <linux/types.h>
5 6  
6 7 extern char *sparc_cpu_type;
7 8 extern char *sparc_fpu_type;
... ... @@ -11,6 +12,146 @@
11 12 extern void __init boot_cpu_id_too_large(int cpu);
12 13 extern unsigned int dcache_parity_tl1_occurred;
13 14 extern unsigned int icache_parity_tl1_occurred;
  15 +
  16 +extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
  17 +
  18 +extern void do_fpe_common(struct pt_regs *regs);
  19 +extern void do_fpieee(struct pt_regs *regs);
  20 +extern void do_fpother(struct pt_regs *regs);
  21 +extern void do_tof(struct pt_regs *regs);
  22 +extern void do_div0(struct pt_regs *regs);
  23 +extern void do_illegal_instruction(struct pt_regs *regs);
  24 +extern void mem_address_unaligned(struct pt_regs *regs,
  25 + unsigned long sfar,
  26 + unsigned long sfsr);
  27 +extern void sun4v_do_mna(struct pt_regs *regs,
  28 + unsigned long addr,
  29 + unsigned long type_ctx);
  30 +extern void do_privop(struct pt_regs *regs);
  31 +extern void do_privact(struct pt_regs *regs);
  32 +extern void do_cee(struct pt_regs *regs);
  33 +extern void do_cee_tl1(struct pt_regs *regs);
  34 +extern void do_dae_tl1(struct pt_regs *regs);
  35 +extern void do_iae_tl1(struct pt_regs *regs);
  36 +extern void do_div0_tl1(struct pt_regs *regs);
  37 +extern void do_fpdis_tl1(struct pt_regs *regs);
  38 +extern void do_fpieee_tl1(struct pt_regs *regs);
  39 +extern void do_fpother_tl1(struct pt_regs *regs);
  40 +extern void do_ill_tl1(struct pt_regs *regs);
  41 +extern void do_irq_tl1(struct pt_regs *regs);
  42 +extern void do_lddfmna_tl1(struct pt_regs *regs);
  43 +extern void do_stdfmna_tl1(struct pt_regs *regs);
  44 +extern void do_paw(struct pt_regs *regs);
  45 +extern void do_paw_tl1(struct pt_regs *regs);
  46 +extern void do_vaw(struct pt_regs *regs);
  47 +extern void do_vaw_tl1(struct pt_regs *regs);
  48 +extern void do_tof_tl1(struct pt_regs *regs);
  49 +extern void do_getpsr(struct pt_regs *regs);
  50 +
  51 +extern void spitfire_insn_access_exception(struct pt_regs *regs,
  52 + unsigned long sfsr,
  53 + unsigned long sfar);
  54 +extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
  55 + unsigned long sfsr,
  56 + unsigned long sfar);
  57 +extern void spitfire_data_access_exception(struct pt_regs *regs,
  58 + unsigned long sfsr,
  59 + unsigned long sfar);
  60 +extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
  61 + unsigned long sfsr,
  62 + unsigned long sfar);
  63 +extern void spitfire_access_error(struct pt_regs *regs,
  64 + unsigned long status_encoded,
  65 + unsigned long afar);
  66 +
  67 +extern void cheetah_fecc_handler(struct pt_regs *regs,
  68 + unsigned long afsr,
  69 + unsigned long afar);
  70 +extern void cheetah_cee_handler(struct pt_regs *regs,
  71 + unsigned long afsr,
  72 + unsigned long afar);
  73 +extern void cheetah_deferred_handler(struct pt_regs *regs,
  74 + unsigned long afsr,
  75 + unsigned long afar);
  76 +extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);
  77 +
  78 +extern void sun4v_insn_access_exception(struct pt_regs *regs,
  79 + unsigned long addr,
  80 + unsigned long type_ctx);
  81 +extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
  82 + unsigned long addr,
  83 + unsigned long type_ctx);
  84 +extern void sun4v_data_access_exception(struct pt_regs *regs,
  85 + unsigned long addr,
  86 + unsigned long type_ctx);
  87 +extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
  88 + unsigned long addr,
  89 + unsigned long type_ctx);
  90 +extern void sun4v_resum_error(struct pt_regs *regs,
  91 + unsigned long offset);
  92 +extern void sun4v_resum_overflow(struct pt_regs *regs);
  93 +extern void sun4v_nonresum_error(struct pt_regs *regs,
  94 + unsigned long offset);
  95 +extern void sun4v_nonresum_overflow(struct pt_regs *regs);
  96 +
  97 +extern unsigned long sun4v_err_itlb_vaddr;
  98 +extern unsigned long sun4v_err_itlb_ctx;
  99 +extern unsigned long sun4v_err_itlb_pte;
  100 +extern unsigned long sun4v_err_itlb_error;
  101 +
  102 +extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
  103 +
  104 +extern unsigned long sun4v_err_dtlb_vaddr;
  105 +extern unsigned long sun4v_err_dtlb_ctx;
  106 +extern unsigned long sun4v_err_dtlb_pte;
  107 +extern unsigned long sun4v_err_dtlb_error;
  108 +
  109 +extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
  110 +extern void hypervisor_tlbop_error(unsigned long err,
  111 + unsigned long op);
  112 +extern void hypervisor_tlbop_error_xcall(unsigned long err,
  113 + unsigned long op);
  114 +
  115 +/* WARNING: The error trap handlers in assembly know the precise
  116 + * layout of the following structure.
  117 + *
  118 + * C-level handlers in traps.c use this information to log the
  119 + * error and then determine how to recover (if possible).
  120 + */
  121 +struct cheetah_err_info {
  122 +/*0x00*/u64 afsr;
  123 +/*0x08*/u64 afar;
  124 +
  125 + /* D-cache state */
  126 +/*0x10*/u64 dcache_data[4]; /* The actual data */
  127 +/*0x30*/u64 dcache_index; /* D-cache index */
  128 +/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
  129 +/*0x40*/u64 dcache_utag; /* D-cache microtag */
  130 +/*0x48*/u64 dcache_stag; /* D-cache snooptag */
  131 +
  132 + /* I-cache state */
  133 +/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
  134 +/*0x90*/u64 icache_index; /* I-cache index */
  135 +/*0x98*/u64 icache_tag; /* I-cache phys tag */
  136 +/*0xa0*/u64 icache_utag; /* I-cache microtag */
  137 +/*0xa8*/u64 icache_stag; /* I-cache snooptag */
  138 +/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
  139 +/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
  140 +
  141 + /* E-cache state */
  142 +/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
  143 +/*0xe0*/u64 ecache_index; /* E-cache index */
  144 +/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
  145 +
  146 +/*0xf0*/u64 __pad[32 - 30];
  147 +};
  148 +#define CHAFSR_INVALID ((u64)-1L)
  149 +
  150 +/* This is allocated at boot time based upon the largest hardware
  151 + * cpu ID in the system. We allocate two entries per cpu, one for
  152 + * TL==0 logging and one for TL >= 1 logging.
  153 + */
  154 +extern struct cheetah_err_info *cheetah_error_log;
14 155  
15 156 #endif /* _ENTRY_H */
arch/sparc64/kernel/traps.c
Diff comments   View file @ 99cd220
... ... @@ -42,6 +42,7 @@
42 42 #endif
43 43 #include <asm/prom.h>
44 44  
  45 +#include "entry.h"
45 46  
46 47 /* When an irrecoverable trap occurs at tl > 0, the trap entry
47 48 * code logs the trap state registers at every level in the trap
... ... @@ -77,11 +78,6 @@
77 78 }
78 79 }
79 80  
80   -void do_call_debug(struct pt_regs *regs)
81   -{
82   - notify_die(DIE_CALL, "debug call", regs, 0, 255, SIGINT);
83   -}
84   -
85 81 void bad_trap(struct pt_regs *regs, long lvl)
86 82 {
87 83 char buffer[32];
... ... @@ -550,41 +546,6 @@
550 546 static unsigned long ecache_flush_linesize;
551 547 static unsigned long ecache_flush_size;
552 548  
553   -/* WARNING: The error trap handlers in assembly know the precise
554   - * layout of the following structure.
555   - *
556   - * C-level handlers below use this information to log the error
557   - * and then determine how to recover (if possible).
558   - */
559   -struct cheetah_err_info {
560   -/*0x00*/u64 afsr;
561   -/*0x08*/u64 afar;
562   -
563   - /* D-cache state */
564   -/*0x10*/u64 dcache_data[4]; /* The actual data */
565   -/*0x30*/u64 dcache_index; /* D-cache index */
566   -/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
567   -/*0x40*/u64 dcache_utag; /* D-cache microtag */
568   -/*0x48*/u64 dcache_stag; /* D-cache snooptag */
569   -
570   - /* I-cache state */
571   -/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
572   -/*0x90*/u64 icache_index; /* I-cache index */
573   -/*0x98*/u64 icache_tag; /* I-cache phys tag */
574   -/*0xa0*/u64 icache_utag; /* I-cache microtag */
575   -/*0xa8*/u64 icache_stag; /* I-cache snooptag */
576   -/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
577   -/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
578   -
579   - /* E-cache state */
580   -/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
581   -/*0xe0*/u64 ecache_index; /* E-cache index */
582   -/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
583   -
584   -/*0xf0*/u64 __pad[32 - 30];
585   -};
586   -#define CHAFSR_INVALID ((u64)-1L)
587   -
588 549 /* This table is ordered in priority of errors and matches the
589 550 * AFAR overwrite policy as well.
590 551 */
... ... @@ -758,10 +719,6 @@
758 719 static struct afsr_error_table *cheetah_error_table;
759 720 static unsigned long cheetah_afsr_errors;
760 721  
761   -/* This is allocated at boot time based upon the largest hardware
762   - * cpu ID in the system. We allocate two entries per cpu, one for
763   - * TL==0 logging and one for TL >= 1 logging.
764   - */
765 722 struct cheetah_err_info *cheetah_error_log;
766 723  
767 724 static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
... ... @@ -2102,7 +2059,7 @@
2102 2059 force_sig_info(SIGFPE, &info, current);
2103 2060 }
2104 2061  
2105   -void instruction_dump (unsigned int *pc)
  2062 +static void instruction_dump(unsigned int *pc)
2106 2063 {
2107 2064 int i;
2108 2065  
... ... @@ -2115,7 +2072,7 @@
2115 2072 printk("\n");
2116 2073 }
2117 2074  
2118   -static void user_instruction_dump (unsigned int __user *pc)
  2075 +static void user_instruction_dump(unsigned int __user *pc)
2119 2076 {
2120 2077 int i;
2121 2078 unsigned int buf[9];
arch/sparc64/mm/init.c
Diff comments   View file @ 99cd220
... ... @@ -1274,10 +1274,6 @@
1274 1274  
1275 1275 /* paging_init() sets up the page tables */
1276 1276  
1277   -extern void cheetah_ecache_flush_init(void);
1278   -extern void sun4v_patch_tlb_handlers(void);
1279   -
1280   -extern void cpu_probe(void);
1281 1277 extern void central_probe(void);
1282 1278  
1283 1279 static unsigned long last_valid_pfn;
include/asm-sparc64/dcu.h
Diff comments   View file @ 99cd220
1   -/* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */
2 1 #ifndef _SPARC64_DCU_H
3 2 #define _SPARC64_DCU_H
4 3  
  4 +#include <linux/const.h>
  5 +
5 6 /* UltraSparc-III Data Cache Unit Control Register */
6   -#define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/
7   -#define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */
8   -#define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */
9   -#define DCU_RE 0x0000400000000000 /* RAW bypass Enable */
10   -#define DCU_PE 0x0000200000000000 /* PCache Enable */
11   -#define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */
12   -#define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */
13   -#define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */
14   -#define DCU_WE 0x0000020000000000 /* WCache enable */
15   -#define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */
16   -#define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */
17   -#define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */
18   -#define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */
19   -#define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */
20   -#define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */
21   -#define DCU_DM 0x0000000000000008 /* DMMU Enable */
22   -#define DCU_IM 0x0000000000000004 /* IMMU Enable */
23   -#define DCU_DC 0x0000000000000002 /* Data Cache Enable */
24   -#define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */
  7 +#define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
  8 +#define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
  9 +#define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
  10 +#define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
  11 +#define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
  12 +#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
  13 +#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
  14 +#define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
  15 +#define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
  16 +#define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */
  17 +#define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */
  18 +#define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
  19 +#define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
  20 +#define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
  21 +#define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
  22 +#define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */
  23 +#define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */
  24 +#define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */
  25 +#define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */
25 26  
26 27 #endif /* _SPARC64_DCU_H */
include/asm-sparc64/pgtable.h
Diff comments   View file @ 99cd220
... ... @@ -761,6 +761,8 @@
761 761 extern void pgtable_cache_init(void);
762 762 extern void sun4v_register_fault_status(void);
763 763 extern void sun4v_ktsb_register(void);
  764 +extern void __init cheetah_ecache_flush_init(void);
  765 +extern void sun4v_patch_tlb_handlers(void);
764 766  
765 767 extern unsigned long cmdline_memory_size;
766 768