Commit 9daf5a7695f70b60c498aac079f908c81ffe4d15

Authored by Kim Phillips
Committed by Jeff Garzik
1 parent 7d400a4c58

phylib: marvell: add support for TX-only and RX-only Internal Delay

Previously, Internal Delay specification implied the delay be
applied to both TX and RX.  This patch allows for separate TX/RX-only
internal delay specification.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

Showing 1 changed file with 17 additions and 9 deletions Side-by-side Diff

drivers/net/phy/marvell.c
... ... @@ -143,20 +143,28 @@
143 143 int err;
144 144  
145 145 if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
146   - (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
  146 + (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
  147 + (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
  148 + (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
147 149 int temp;
148 150  
149   - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
150   - temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
151   - if (temp < 0)
152   - return temp;
  151 + temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  152 + if (temp < 0)
  153 + return temp;
153 154  
  155 + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
154 156 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
155   -
156   - err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
157   - if (err < 0)
158   - return err;
  157 + } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  158 + temp &= ~MII_M1111_TX_DELAY;
  159 + temp |= MII_M1111_RX_DELAY;
  160 + } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  161 + temp &= ~MII_M1111_RX_DELAY;
  162 + temp |= MII_M1111_TX_DELAY;
159 163 }
  164 +
  165 + err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  166 + if (err < 0)
  167 + return err;
160 168  
161 169 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
162 170 if (temp < 0)