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Commit 9ebc2935f346964c34e5f376263c4071f66edcd9

Authored by Ralf Baechle
1 parent 91598965ec
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

MIPS: WRPPMC: Move code one directory level up. 

It was the last platform under gt64120 and will fit better into the new
platform makefile scheme, if moved.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 15 changed files with 412 additions and 412 deletions Side-by-side Diff

... ... @@ -194,7 +194,7 @@
194 194 #
195 195 # Wind River PPMC Board (4KC + GT64120)
196 196 #
197   -core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
  197 +core-$(CONFIG_WR_PPMC) += arch/mips/wrppmc/
198 198 cflags-$(CONFIG_WR_PPMC) += -I$(srctree)/arch/mips/include/asm/mach-wrppmc
199 199 load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
200 200  
arch/mips/gt64120/wrppmc/Makefile
View file @ 9ebc293
1   -#
2   -# This file is subject to the terms and conditions of the GNU General Public
3   -# License. See the file "COPYING" in the main directory of this archive
4   -# for more details.
5   -#
6   -# Copyright 2006 Wind River System, Inc.
7   -# Author: Rongkai.Zhan <rongkai.zhan@windriver.com>
8   -#
9   -# Makefile for the Wind River MIPS 4KC PPMC Eval Board
10   -#
11   -
12   -obj-y += irq.o pci.o reset.o serial.o setup.o time.o
13   -
14   -EXTRA_CFLAGS += -Werror
arch/mips/gt64120/wrppmc/irq.c
View file @ 9ebc293
1   -/*
2   - * irq.c: GT64120 Interrupt Controller
3   - *
4   - * Copyright (C) 2006, Wind River System Inc.
5   - * Author: Rongkai.Zhan, <rongkai.zhan@windriver.com>
6   - *
7   - * This program is free software; you can redistribute it and/or modify it
8   - * under the terms of the GNU General Public License as published by the
9   - * Free Software Foundation; either version 2 of the License, or (at your
10   - * option) any later version.
11   - */
12   -#include <linux/hardirq.h>
13   -#include <linux/init.h>
14   -#include <linux/irq.h>
15   -
16   -#include <asm/gt64120.h>
17   -#include <asm/irq_cpu.h>
18   -#include <asm/mipsregs.h>
19   -
20   -asmlinkage void plat_irq_dispatch(void)
21   -{
22   - unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
23   -
24   - if (pending & STATUSF_IP7)
25   - do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */
26   - else if (pending & STATUSF_IP6)
27   - do_IRQ(WRPPMC_UART16550_IRQ); /* UART 16550 port */
28   - else if (pending & STATUSF_IP3)
29   - do_IRQ(WRPPMC_PCI_INTA_IRQ); /* PCI INT_A */
30   - else
31   - spurious_interrupt();
32   -}
33   -
34   -/**
35   - * Initialize GT64120 Interrupt Controller
36   - */
37   -void gt64120_init_pic(void)
38   -{
39   - /* clear CPU Interrupt Cause Registers */
40   - GT_WRITE(GT_INTRCAUSE_OFS, (0x1F << 21));
41   - GT_WRITE(GT_HINTRCAUSE_OFS, 0x00);
42   -
43   - /* Disable all interrupts from GT64120 bridge chip */
44   - GT_WRITE(GT_INTRMASK_OFS, 0x00);
45   - GT_WRITE(GT_HINTRMASK_OFS, 0x00);
46   - GT_WRITE(GT_PCI0_ICMASK_OFS, 0x00);
47   - GT_WRITE(GT_PCI0_HICMASK_OFS, 0x00);
48   -}
49   -
50   -void __init arch_init_irq(void)
51   -{
52   - /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
53   - mips_cpu_irq_init();
54   -
55   - gt64120_init_pic();
56   -}
arch/mips/gt64120/wrppmc/pci.c
View file @ 9ebc293
1   -/*
2   - * pci.c: GT64120 PCI support.
3   - *
4   - * Copyright (C) 2006, Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
5   - *
6   - * This file is subject to the terms and conditions of the GNU General Public
7   - * License. See the file "COPYING" in the main directory of this archive
8   - * for more details.
9   - */
10   -#include <linux/init.h>
11   -#include <linux/ioport.h>
12   -#include <linux/types.h>
13   -#include <linux/pci.h>
14   -
15   -#include <asm/gt64120.h>
16   -
17   -extern struct pci_ops gt64xxx_pci0_ops;
18   -
19   -static struct resource pci0_io_resource = {
20   - .name = "pci_0 io",
21   - .start = GT_PCI_IO_BASE,
22   - .end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1,
23   - .flags = IORESOURCE_IO,
24   -};
25   -
26   -static struct resource pci0_mem_resource = {
27   - .name = "pci_0 memory",
28   - .start = GT_PCI_MEM_BASE,
29   - .end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1,
30   - .flags = IORESOURCE_MEM,
31   -};
32   -
33   -static struct pci_controller hose_0 = {
34   - .pci_ops = &gt64xxx_pci0_ops,
35   - .io_resource = &pci0_io_resource,
36   - .mem_resource = &pci0_mem_resource,
37   -};
38   -
39   -static int __init gt64120_pci_init(void)
40   -{
41   - u32 tmp;
42   -
43   - tmp = GT_READ(GT_PCI0_CMD_OFS); /* Huh??? -- Ralf */
44   - tmp = GT_READ(GT_PCI0_BARE_OFS);
45   -
46   - /* reset the whole PCI I/O space range */
47   - ioport_resource.start = GT_PCI_IO_BASE;
48   - ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
49   -
50   - register_pci_controller(&hose_0);
51   - return 0;
52   -}
53   -
54   -arch_initcall(gt64120_pci_init);
arch/mips/gt64120/wrppmc/reset.c
View file @ 9ebc293
1   -/*
2   - * This file is subject to the terms and conditions of the GNU General Public
3   - * License. See the file "COPYING" in the main directory of this archive
4   - * for more details.
5   - *
6   - * Copyright (C) 1997 Ralf Baechle
7   - */
8   -#include <linux/irqflags.h>
9   -#include <linux/kernel.h>
10   -
11   -#include <asm/cacheflush.h>
12   -#include <asm/mipsregs.h>
13   -#include <asm/processor.h>
14   -
15   -void wrppmc_machine_restart(char *command)
16   -{
17   - /*
18   - * Ouch, we're still alive ... This time we take the silver bullet ...
19   - * ... and find that we leave the hardware in a state in which the
20   - * kernel in the flush locks up somewhen during of after the PCI
21   - * detection stuff.
22   - */
23   - local_irq_disable();
24   - set_c0_status(ST0_BEV | ST0_ERL);
25   - change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
26   - flush_cache_all();
27   - write_c0_wired(0);
28   - __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
29   -}
30   -
31   -void wrppmc_machine_halt(void)
32   -{
33   - local_irq_disable();
34   -
35   - printk(KERN_NOTICE "You can safely turn off the power\n");
36   - while (1) {
37   - if (cpu_wait)
38   - cpu_wait();
39   - }
40   -}
arch/mips/gt64120/wrppmc/serial.c
View file @ 9ebc293
1   -/*
2   - * Registration of WRPPMC UART platform device.
3   - *
4   - * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org>
5   - *
6   - * This program is free software; you can redistribute it and/or modify
7   - * it under the terms of the GNU General Public License as published by
8   - * the Free Software Foundation; either version 2 of the License, or
9   - * (at your option) any later version.
10   - *
11   - * This program is distributed in the hope that it will be useful,
12   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
13   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14   - * GNU General Public License for more details.
15   - *
16   - * You should have received a copy of the GNU General Public License
17   - * along with this program; if not, write to the Free Software
18   - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19   - */
20   -#include <linux/errno.h>
21   -#include <linux/init.h>
22   -#include <linux/ioport.h>
23   -#include <linux/platform_device.h>
24   -#include <linux/serial_8250.h>
25   -
26   -#include <asm/gt64120.h>
27   -
28   -static struct resource wrppmc_uart_resource[] __initdata = {
29   - {
30   - .start = WRPPMC_UART16550_BASE,
31   - .end = WRPPMC_UART16550_BASE + 7,
32   - .flags = IORESOURCE_MEM,
33   - },
34   - {
35   - .start = WRPPMC_UART16550_IRQ,
36   - .end = WRPPMC_UART16550_IRQ,
37   - .flags = IORESOURCE_IRQ,
38   - },
39   -};
40   -
41   -static struct plat_serial8250_port wrppmc_serial8250_port[] = {
42   - {
43   - .irq = WRPPMC_UART16550_IRQ,
44   - .uartclk = WRPPMC_UART16550_CLOCK,
45   - .iotype = UPIO_MEM,
46   - .flags = UPF_IOREMAP | UPF_SKIP_TEST,
47   - .mapbase = WRPPMC_UART16550_BASE,
48   - },
49   - {},
50   -};
51   -
52   -static __init int wrppmc_uart_add(void)
53   -{
54   - struct platform_device *pdev;
55   - int retval;
56   -
57   - pdev = platform_device_alloc("serial8250", -1);
58   - if (!pdev)
59   - return -ENOMEM;
60   -
61   - pdev->id = PLAT8250_DEV_PLATFORM;
62   - pdev->dev.platform_data = wrppmc_serial8250_port;
63   -
64   - retval = platform_device_add_resources(pdev, wrppmc_uart_resource,
65   - ARRAY_SIZE(wrppmc_uart_resource));
66   - if (retval)
67   - goto err_free_device;
68   -
69   - retval = platform_device_add(pdev);
70   - if (retval)
71   - goto err_free_device;
72   -
73   - return 0;
74   -
75   -err_free_device:
76   - platform_device_put(pdev);
77   -
78   - return retval;
79   -}
80   -device_initcall(wrppmc_uart_add);
arch/mips/gt64120/wrppmc/setup.c
View file @ 9ebc293
1   -/*
2   - * setup.c: Setup pointers to hardware dependent routines.
3   - *
4   - * This file is subject to the terms and conditions of the GNU General Public
5   - * License. See the file "COPYING" in the main directory of this archive
6   - * for more details.
7   - *
8   - * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
9   - * Copyright (C) 2006, Wind River System Inc. Rongkai.zhan <rongkai.zhan@windriver.com>
10   - */
11   -#include <linux/init.h>
12   -#include <linux/string.h>
13   -#include <linux/kernel.h>
14   -#include <linux/pm.h>
15   -
16   -#include <asm/io.h>
17   -#include <asm/bootinfo.h>
18   -#include <asm/reboot.h>
19   -#include <asm/time.h>
20   -#include <asm/gt64120.h>
21   -
22   -unsigned long gt64120_base = KSEG1ADDR(0x14000000);
23   -
24   -#ifdef WRPPMC_EARLY_DEBUG
25   -
26   -static volatile unsigned char * wrppmc_led = \
27   - (volatile unsigned char *)KSEG1ADDR(WRPPMC_LED_BASE);
28   -
29   -/*
30   - * PPMC LED control register:
31   - * -) bit[0] controls DS1 LED (1 - OFF, 0 - ON)
32   - * -) bit[1] controls DS2 LED (1 - OFF, 0 - ON)
33   - * -) bit[2] controls DS4 LED (1 - OFF, 0 - ON)
34   - */
35   -void wrppmc_led_on(int mask)
36   -{
37   - unsigned char value = *wrppmc_led;
38   -
39   - value &= (0xF8 | mask);
40   - *wrppmc_led = value;
41   -}
42   -
43   -/* If mask = 0, turn off all LEDs */
44   -void wrppmc_led_off(int mask)
45   -{
46   - unsigned char value = *wrppmc_led;
47   -
48   - value |= (0x7 & mask);
49   - *wrppmc_led = value;
50   -}
51   -
52   -/*
53   - * We assume that bootloader has initialized UART16550 correctly
54   - */
55   -void __init wrppmc_early_putc(char ch)
56   -{
57   - static volatile unsigned char *wrppmc_uart = \
58   - (volatile unsigned char *)KSEG1ADDR(WRPPMC_UART16550_BASE);
59   - unsigned char value;
60   -
61   - /* Wait until Transmit-Holding-Register is empty */
62   - while (1) {
63   - value = *(wrppmc_uart + 5);
64   - if (value & 0x20)
65   - break;
66   - }
67   -
68   - *wrppmc_uart = ch;
69   -}
70   -
71   -void __init wrppmc_early_printk(const char *fmt, ...)
72   -{
73   - static char pbuf[256] = {'\0', };
74   - char *ch = pbuf;
75   - va_list args;
76   - unsigned int i;
77   -
78   - memset(pbuf, 0, 256);
79   - va_start(args, fmt);
80   - i = vsprintf(pbuf, fmt, args);
81   - va_end(args);
82   -
83   - /* Print the string */
84   - while (*ch != '\0') {
85   - wrppmc_early_putc(*ch);
86   - /* if print '\n', also print '\r' */
87   - if (*ch++ == '\n')
88   - wrppmc_early_putc('\r');
89   - }
90   -}
91   -#endif /* WRPPMC_EARLY_DEBUG */
92   -
93   -void __init prom_free_prom_memory(void)
94   -{
95   -}
96   -
97   -void __init plat_mem_setup(void)
98   -{
99   - extern void wrppmc_machine_restart(char *command);
100   - extern void wrppmc_machine_halt(void);
101   -
102   - _machine_restart = wrppmc_machine_restart;
103   - _machine_halt = wrppmc_machine_halt;
104   - pm_power_off = wrppmc_machine_halt;
105   -
106   - /* This makes the operations of 'in/out[bwl]' to the
107   - * physical address ( < KSEG0) can work via KSEG1
108   - */
109   - set_io_port_base(KSEG1);
110   -}
111   -
112   -const char *get_system_type(void)
113   -{
114   - return "Wind River PPMC (GT64120)";
115   -}
116   -
117   -/*
118   - * Initializes basic routines and structures pointers, memory size (as
119   - * given by the bios and saves the command line.
120   - */
121   -void __init prom_init(void)
122   -{
123   - add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM);
124   - add_memory_region(WRPPMC_BOOTROM_BASE, WRPPMC_BOOTROM_SIZE, BOOT_MEM_ROM_DATA);
125   -
126   - wrppmc_early_printk("prom_init: GT64120 SDRAM Bank 0: 0x%x - 0x%08lx\n",
127   - WRPPMC_SDRAM_SCS0_BASE, (WRPPMC_SDRAM_SCS0_BASE + WRPPMC_SDRAM_SCS0_SIZE));
128   -}
arch/mips/gt64120/wrppmc/time.c
View file @ 9ebc293
1   -/*
2   - * time.c: MIPS CPU Count/Compare timer hookup
3   - *
4   - * Author: Mark.Zhan, <rongkai.zhan@windriver.com>
5   - *
6   - * This file is subject to the terms and conditions of the GNU General Public
7   - * License. See the file "COPYING" in the main directory of this archive
8   - * for more details.
9   - *
10   - * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
11   - * Copyright (C) 2006, Wind River System Inc.
12   - */
13   -#include <linux/init.h>
14   -#include <linux/interrupt.h>
15   -#include <linux/irq.h>
16   -
17   -#include <asm/gt64120.h>
18   -#include <asm/time.h>
19   -
20   -#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
21   -
22   -/*
23   - * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
24   - *
25   - * NOTE: We disable all GT64120 timers, and use MIPS processor internal
26   - * timer as the source of kernel clock tick.
27   - */
28   -void __init plat_time_init(void)
29   -{
30   - /* Disable GT64120 timers */
31   - GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
32   - GT_WRITE(GT_TC0_OFS, 0x00);
33   - GT_WRITE(GT_TC1_OFS, 0x00);
34   - GT_WRITE(GT_TC2_OFS, 0x00);
35   - GT_WRITE(GT_TC3_OFS, 0x00);
36   -
37   - /* Use MIPS compare/count internal timer */
38   - mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ;
39   -}
arch/mips/wrppmc/Makefile
Diff comments   View file @ 9ebc293
  1 +#
  2 +# This file is subject to the terms and conditions of the GNU General Public
  3 +# License. See the file "COPYING" in the main directory of this archive
  4 +# for more details.
  5 +#
  6 +# Copyright 2006 Wind River System, Inc.
  7 +# Author: Rongkai.Zhan <rongkai.zhan@windriver.com>
  8 +#
  9 +# Makefile for the Wind River MIPS 4KC PPMC Eval Board
  10 +#
  11 +
  12 +obj-y += irq.o pci.o reset.o serial.o setup.o time.o
  13 +
  14 +EXTRA_CFLAGS += -Werror
arch/mips/wrppmc/irq.c
Diff comments   View file @ 9ebc293
  1 +/*
  2 + * irq.c: GT64120 Interrupt Controller
  3 + *
  4 + * Copyright (C) 2006, Wind River System Inc.
  5 + * Author: Rongkai.Zhan, <rongkai.zhan@windriver.com>
  6 + *
  7 + * This program is free software; you can redistribute it and/or modify it
  8 + * under the terms of the GNU General Public License as published by the
  9 + * Free Software Foundation; either version 2 of the License, or (at your
  10 + * option) any later version.
  11 + */
  12 +#include <linux/hardirq.h>
  13 +#include <linux/init.h>
  14 +#include <linux/irq.h>
  15 +
  16 +#include <asm/gt64120.h>
  17 +#include <asm/irq_cpu.h>
  18 +#include <asm/mipsregs.h>
  19 +
  20 +asmlinkage void plat_irq_dispatch(void)
  21 +{
  22 + unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  23 +
  24 + if (pending & STATUSF_IP7)
  25 + do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */
  26 + else if (pending & STATUSF_IP6)
  27 + do_IRQ(WRPPMC_UART16550_IRQ); /* UART 16550 port */
  28 + else if (pending & STATUSF_IP3)
  29 + do_IRQ(WRPPMC_PCI_INTA_IRQ); /* PCI INT_A */
  30 + else
  31 + spurious_interrupt();
  32 +}
  33 +
  34 +/**
  35 + * Initialize GT64120 Interrupt Controller
  36 + */
  37 +void gt64120_init_pic(void)
  38 +{
  39 + /* clear CPU Interrupt Cause Registers */
  40 + GT_WRITE(GT_INTRCAUSE_OFS, (0x1F << 21));
  41 + GT_WRITE(GT_HINTRCAUSE_OFS, 0x00);
  42 +
  43 + /* Disable all interrupts from GT64120 bridge chip */
  44 + GT_WRITE(GT_INTRMASK_OFS, 0x00);
  45 + GT_WRITE(GT_HINTRMASK_OFS, 0x00);
  46 + GT_WRITE(GT_PCI0_ICMASK_OFS, 0x00);
  47 + GT_WRITE(GT_PCI0_HICMASK_OFS, 0x00);
  48 +}
  49 +
  50 +void __init arch_init_irq(void)
  51 +{
  52 + /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
  53 + mips_cpu_irq_init();
  54 +
  55 + gt64120_init_pic();
  56 +}
arch/mips/wrppmc/pci.c
Diff comments   View file @ 9ebc293
  1 +/*
  2 + * pci.c: GT64120 PCI support.
  3 + *
  4 + * Copyright (C) 2006, Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
  5 + *
  6 + * This file is subject to the terms and conditions of the GNU General Public
  7 + * License. See the file "COPYING" in the main directory of this archive
  8 + * for more details.
  9 + */
  10 +#include <linux/init.h>
  11 +#include <linux/ioport.h>
  12 +#include <linux/types.h>
  13 +#include <linux/pci.h>
  14 +
  15 +#include <asm/gt64120.h>
  16 +
  17 +extern struct pci_ops gt64xxx_pci0_ops;
  18 +
  19 +static struct resource pci0_io_resource = {
  20 + .name = "pci_0 io",
  21 + .start = GT_PCI_IO_BASE,
  22 + .end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1,
  23 + .flags = IORESOURCE_IO,
  24 +};
  25 +
  26 +static struct resource pci0_mem_resource = {
  27 + .name = "pci_0 memory",
  28 + .start = GT_PCI_MEM_BASE,
  29 + .end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1,
  30 + .flags = IORESOURCE_MEM,
  31 +};
  32 +
  33 +static struct pci_controller hose_0 = {
  34 + .pci_ops = &gt64xxx_pci0_ops,
  35 + .io_resource = &pci0_io_resource,
  36 + .mem_resource = &pci0_mem_resource,
  37 +};
  38 +
  39 +static int __init gt64120_pci_init(void)
  40 +{
  41 + u32 tmp;
  42 +
  43 + tmp = GT_READ(GT_PCI0_CMD_OFS); /* Huh??? -- Ralf */
  44 + tmp = GT_READ(GT_PCI0_BARE_OFS);
  45 +
  46 + /* reset the whole PCI I/O space range */
  47 + ioport_resource.start = GT_PCI_IO_BASE;
  48 + ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
  49 +
  50 + register_pci_controller(&hose_0);
  51 + return 0;
  52 +}
  53 +
  54 +arch_initcall(gt64120_pci_init);
arch/mips/wrppmc/reset.c
Diff comments   View file @ 9ebc293
  1 +/*
  2 + * This file is subject to the terms and conditions of the GNU General Public
  3 + * License. See the file "COPYING" in the main directory of this archive
  4 + * for more details.
  5 + *
  6 + * Copyright (C) 1997 Ralf Baechle
  7 + */
  8 +#include <linux/irqflags.h>
  9 +#include <linux/kernel.h>
  10 +
  11 +#include <asm/cacheflush.h>
  12 +#include <asm/mipsregs.h>
  13 +#include <asm/processor.h>
  14 +
  15 +void wrppmc_machine_restart(char *command)
  16 +{
  17 + /*
  18 + * Ouch, we're still alive ... This time we take the silver bullet ...
  19 + * ... and find that we leave the hardware in a state in which the
  20 + * kernel in the flush locks up somewhen during of after the PCI
  21 + * detection stuff.
  22 + */
  23 + local_irq_disable();
  24 + set_c0_status(ST0_BEV | ST0_ERL);
  25 + change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
  26 + flush_cache_all();
  27 + write_c0_wired(0);
  28 + __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
  29 +}
  30 +
  31 +void wrppmc_machine_halt(void)
  32 +{
  33 + local_irq_disable();
  34 +
  35 + printk(KERN_NOTICE "You can safely turn off the power\n");
  36 + while (1) {
  37 + if (cpu_wait)
  38 + cpu_wait();
  39 + }
  40 +}
arch/mips/wrppmc/serial.c
Diff comments   View file @ 9ebc293
  1 +/*
  2 + * Registration of WRPPMC UART platform device.
  3 + *
  4 + * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org>
  5 + *
  6 + * This program is free software; you can redistribute it and/or modify
  7 + * it under the terms of the GNU General Public License as published by
  8 + * the Free Software Foundation; either version 2 of the License, or
  9 + * (at your option) any later version.
  10 + *
  11 + * This program is distributed in the hope that it will be useful,
  12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14 + * GNU General Public License for more details.
  15 + *
  16 + * You should have received a copy of the GNU General Public License
  17 + * along with this program; if not, write to the Free Software
  18 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  19 + */
  20 +#include <linux/errno.h>
  21 +#include <linux/init.h>
  22 +#include <linux/ioport.h>
  23 +#include <linux/platform_device.h>
  24 +#include <linux/serial_8250.h>
  25 +
  26 +#include <asm/gt64120.h>
  27 +
  28 +static struct resource wrppmc_uart_resource[] __initdata = {
  29 + {
  30 + .start = WRPPMC_UART16550_BASE,
  31 + .end = WRPPMC_UART16550_BASE + 7,
  32 + .flags = IORESOURCE_MEM,
  33 + },
  34 + {
  35 + .start = WRPPMC_UART16550_IRQ,
  36 + .end = WRPPMC_UART16550_IRQ,
  37 + .flags = IORESOURCE_IRQ,
  38 + },
  39 +};
  40 +
  41 +static struct plat_serial8250_port wrppmc_serial8250_port[] = {
  42 + {
  43 + .irq = WRPPMC_UART16550_IRQ,
  44 + .uartclk = WRPPMC_UART16550_CLOCK,
  45 + .iotype = UPIO_MEM,
  46 + .flags = UPF_IOREMAP | UPF_SKIP_TEST,
  47 + .mapbase = WRPPMC_UART16550_BASE,
  48 + },
  49 + {},
  50 +};
  51 +
  52 +static __init int wrppmc_uart_add(void)
  53 +{
  54 + struct platform_device *pdev;
  55 + int retval;
  56 +
  57 + pdev = platform_device_alloc("serial8250", -1);
  58 + if (!pdev)
  59 + return -ENOMEM;
  60 +
  61 + pdev->id = PLAT8250_DEV_PLATFORM;
  62 + pdev->dev.platform_data = wrppmc_serial8250_port;
  63 +
  64 + retval = platform_device_add_resources(pdev, wrppmc_uart_resource,
  65 + ARRAY_SIZE(wrppmc_uart_resource));
  66 + if (retval)
  67 + goto err_free_device;
  68 +
  69 + retval = platform_device_add(pdev);
  70 + if (retval)
  71 + goto err_free_device;
  72 +
  73 + return 0;
  74 +
  75 +err_free_device:
  76 + platform_device_put(pdev);
  77 +
  78 + return retval;
  79 +}
  80 +device_initcall(wrppmc_uart_add);
arch/mips/wrppmc/setup.c
Diff comments   View file @ 9ebc293
  1 +/*
  2 + * setup.c: Setup pointers to hardware dependent routines.
  3 + *
  4 + * This file is subject to the terms and conditions of the GNU General Public
  5 + * License. See the file "COPYING" in the main directory of this archive
  6 + * for more details.
  7 + *
  8 + * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
  9 + * Copyright (C) 2006, Wind River System Inc. Rongkai.zhan <rongkai.zhan@windriver.com>
  10 + */
  11 +#include <linux/init.h>
  12 +#include <linux/string.h>
  13 +#include <linux/kernel.h>
  14 +#include <linux/pm.h>
  15 +
  16 +#include <asm/io.h>
  17 +#include <asm/bootinfo.h>
  18 +#include <asm/reboot.h>
  19 +#include <asm/time.h>
  20 +#include <asm/gt64120.h>
  21 +
  22 +unsigned long gt64120_base = KSEG1ADDR(0x14000000);
  23 +
  24 +#ifdef WRPPMC_EARLY_DEBUG
  25 +
  26 +static volatile unsigned char * wrppmc_led = \
  27 + (volatile unsigned char *)KSEG1ADDR(WRPPMC_LED_BASE);
  28 +
  29 +/*
  30 + * PPMC LED control register:
  31 + * -) bit[0] controls DS1 LED (1 - OFF, 0 - ON)
  32 + * -) bit[1] controls DS2 LED (1 - OFF, 0 - ON)
  33 + * -) bit[2] controls DS4 LED (1 - OFF, 0 - ON)
  34 + */
  35 +void wrppmc_led_on(int mask)
  36 +{
  37 + unsigned char value = *wrppmc_led;
  38 +
  39 + value &= (0xF8 | mask);
  40 + *wrppmc_led = value;
  41 +}
  42 +
  43 +/* If mask = 0, turn off all LEDs */
  44 +void wrppmc_led_off(int mask)
  45 +{
  46 + unsigned char value = *wrppmc_led;
  47 +
  48 + value |= (0x7 & mask);
  49 + *wrppmc_led = value;
  50 +}
  51 +
  52 +/*
  53 + * We assume that bootloader has initialized UART16550 correctly
  54 + */
  55 +void __init wrppmc_early_putc(char ch)
  56 +{
  57 + static volatile unsigned char *wrppmc_uart = \
  58 + (volatile unsigned char *)KSEG1ADDR(WRPPMC_UART16550_BASE);
  59 + unsigned char value;
  60 +
  61 + /* Wait until Transmit-Holding-Register is empty */
  62 + while (1) {
  63 + value = *(wrppmc_uart + 5);
  64 + if (value & 0x20)
  65 + break;
  66 + }
  67 +
  68 + *wrppmc_uart = ch;
  69 +}
  70 +
  71 +void __init wrppmc_early_printk(const char *fmt, ...)
  72 +{
  73 + static char pbuf[256] = {'\0', };
  74 + char *ch = pbuf;
  75 + va_list args;
  76 + unsigned int i;
  77 +
  78 + memset(pbuf, 0, 256);
  79 + va_start(args, fmt);
  80 + i = vsprintf(pbuf, fmt, args);
  81 + va_end(args);
  82 +
  83 + /* Print the string */
  84 + while (*ch != '\0') {
  85 + wrppmc_early_putc(*ch);
  86 + /* if print '\n', also print '\r' */
  87 + if (*ch++ == '\n')
  88 + wrppmc_early_putc('\r');
  89 + }
  90 +}
  91 +#endif /* WRPPMC_EARLY_DEBUG */
  92 +
  93 +void __init prom_free_prom_memory(void)
  94 +{
  95 +}
  96 +
  97 +void __init plat_mem_setup(void)
  98 +{
  99 + extern void wrppmc_machine_restart(char *command);
  100 + extern void wrppmc_machine_halt(void);
  101 +
  102 + _machine_restart = wrppmc_machine_restart;
  103 + _machine_halt = wrppmc_machine_halt;
  104 + pm_power_off = wrppmc_machine_halt;
  105 +
  106 + /* This makes the operations of 'in/out[bwl]' to the
  107 + * physical address ( < KSEG0) can work via KSEG1
  108 + */
  109 + set_io_port_base(KSEG1);
  110 +}
  111 +
  112 +const char *get_system_type(void)
  113 +{
  114 + return "Wind River PPMC (GT64120)";
  115 +}
  116 +
  117 +/*
  118 + * Initializes basic routines and structures pointers, memory size (as
  119 + * given by the bios and saves the command line.
  120 + */
  121 +void __init prom_init(void)
  122 +{
  123 + add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM);
  124 + add_memory_region(WRPPMC_BOOTROM_BASE, WRPPMC_BOOTROM_SIZE, BOOT_MEM_ROM_DATA);
  125 +
  126 + wrppmc_early_printk("prom_init: GT64120 SDRAM Bank 0: 0x%x - 0x%08lx\n",
  127 + WRPPMC_SDRAM_SCS0_BASE, (WRPPMC_SDRAM_SCS0_BASE + WRPPMC_SDRAM_SCS0_SIZE));
  128 +}
arch/mips/wrppmc/time.c
Diff comments   View file @ 9ebc293
  1 +/*
  2 + * time.c: MIPS CPU Count/Compare timer hookup
  3 + *
  4 + * Author: Mark.Zhan, <rongkai.zhan@windriver.com>
  5 + *
  6 + * This file is subject to the terms and conditions of the GNU General Public
  7 + * License. See the file "COPYING" in the main directory of this archive
  8 + * for more details.
  9 + *
  10 + * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
  11 + * Copyright (C) 2006, Wind River System Inc.
  12 + */
  13 +#include <linux/init.h>
  14 +#include <linux/interrupt.h>
  15 +#include <linux/irq.h>
  16 +
  17 +#include <asm/gt64120.h>
  18 +#include <asm/time.h>
  19 +
  20 +#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
  21 +
  22 +/*
  23 + * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
  24 + *
  25 + * NOTE: We disable all GT64120 timers, and use MIPS processor internal
  26 + * timer as the source of kernel clock tick.
  27 + */
  28 +void __init plat_time_init(void)
  29 +{
  30 + /* Disable GT64120 timers */
  31 + GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
  32 + GT_WRITE(GT_TC0_OFS, 0x00);
  33 + GT_WRITE(GT_TC1_OFS, 0x00);
  34 + GT_WRITE(GT_TC2_OFS, 0x00);
  35 + GT_WRITE(GT_TC3_OFS, 0x00);
  36 +
  37 + /* Use MIPS compare/count internal timer */
  38 + mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ;
  39 +}