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Commit a2065a368cc2539d6a48450f367f5033c699cdc4

Authored by Kuninori Morimoto
Committed by Florian Tobias Schandinat
1 parent c2658b70f0
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

fbdev: sh_mipi_dsi: fixup setup timing of SYSCONF 

SYSCONF should be set after PHYCTRL

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

Showing 1 changed file with 11 additions and 12 deletions Side-by-side Diff

drivers/video/sh_mipi_dsi.c
Diff comments   View file @ a2065a3
... ... @@ -246,18 +246,6 @@
246 246 /* setup DSI link */
247 247  
248 248 /*
249   - * Default = ULPS enable |
250   - * Contention detection enabled |
251   - * EoT packet transmission enable |
252   - * CRC check enable |
253   - * ECC check enable
254   - * additionally enable first two lanes
255   - */
256   - bitmap_fill((unsigned long *)&tmp, pdata->lane);
257   - tmp |= 0x00003700;
258   - iowrite32(tmp, base + SYSCONF);
259   -
260   - /*
261 249 * T_wakeup = 0x7000
262 250 * T_hs-trail = 3
263 251 * T_hs-prepare = 3
... ... @@ -286,6 +274,17 @@
286 274 udelay(200);
287 275 /* Deassert resets, power on */
288 276 iowrite32(0x03070001, base + PHYCTRL);
  277 +
  278 + /*
  279 + * Default = ULPS enable |
  280 + * Contention detection enabled |
  281 + * EoT packet transmission enable |
  282 + * CRC check enable |
  283 + * ECC check enable
  284 + */
  285 + bitmap_fill((unsigned long *)&tmp, pdata->lane);
  286 + tmp |= 0x00003700;
  287 + iowrite32(tmp, base + SYSCONF);
289 288  
290 289 /* setup l-bridge */
291 290