Commit a4e71e7937461730998cef56cc924fe731b4d345
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog fixes from Wim Van Sebroeck: "Fix a boot issues and correct the AcpiMmioSel bitmask in the sp5100_tco watchdog device driver" * git://www.linux-watchdog.org/linux-watchdog: watchdog: sp5100_tco: Set the AcpiMmioSel bitmask value to 1 instead of 2 watchdog: sp5100_tco: Remove code that may cause a boot failure
Showing 2 changed files Side-by-side Diff
drivers/watchdog/sp5100_tco.c
... | ... | @@ -40,13 +40,12 @@ |
40 | 40 | #include "sp5100_tco.h" |
41 | 41 | |
42 | 42 | /* Module and version information */ |
43 | -#define TCO_VERSION "0.03" | |
43 | +#define TCO_VERSION "0.05" | |
44 | 44 | #define TCO_MODULE_NAME "SP5100 TCO timer" |
45 | 45 | #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION |
46 | 46 | |
47 | 47 | /* internal variables */ |
48 | 48 | static u32 tcobase_phys; |
49 | -static u32 resbase_phys; | |
50 | 49 | static u32 tco_wdt_fired; |
51 | 50 | static void __iomem *tcobase; |
52 | 51 | static unsigned int pm_iobase; |
... | ... | @@ -54,10 +53,6 @@ |
54 | 53 | static unsigned long timer_alive; |
55 | 54 | static char tco_expect_close; |
56 | 55 | static struct pci_dev *sp5100_tco_pci; |
57 | -static struct resource wdt_res = { | |
58 | - .name = "Watchdog Timer", | |
59 | - .flags = IORESOURCE_MEM, | |
60 | -}; | |
61 | 56 | |
62 | 57 | /* the watchdog platform device */ |
63 | 58 | static struct platform_device *sp5100_tco_platform_device; |
... | ... | @@ -75,12 +70,6 @@ |
75 | 70 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started." |
76 | 71 | " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
77 | 72 | |
78 | -static unsigned int force_addr; | |
79 | -module_param(force_addr, uint, 0); | |
80 | -MODULE_PARM_DESC(force_addr, "Force the use of specified MMIO address." | |
81 | - " ONLY USE THIS PARAMETER IF YOU REALLY KNOW" | |
82 | - " WHAT YOU ARE DOING (default=none)"); | |
83 | - | |
84 | 73 | /* |
85 | 74 | * Some TCO specific functions |
86 | 75 | */ |
... | ... | @@ -176,39 +165,6 @@ |
176 | 165 | } |
177 | 166 | } |
178 | 167 | |
179 | -static void tco_timer_disable(void) | |
180 | -{ | |
181 | - int val; | |
182 | - | |
183 | - if (sp5100_tco_pci->revision >= 0x40) { | |
184 | - /* For SB800 or later */ | |
185 | - /* Enable watchdog decode bit and Disable watchdog timer */ | |
186 | - outb(SB800_PM_WATCHDOG_CONTROL, SB800_IO_PM_INDEX_REG); | |
187 | - val = inb(SB800_IO_PM_DATA_REG); | |
188 | - val |= SB800_PCI_WATCHDOG_DECODE_EN; | |
189 | - val |= SB800_PM_WATCHDOG_DISABLE; | |
190 | - outb(val, SB800_IO_PM_DATA_REG); | |
191 | - } else { | |
192 | - /* For SP5100 or SB7x0 */ | |
193 | - /* Enable watchdog decode bit */ | |
194 | - pci_read_config_dword(sp5100_tco_pci, | |
195 | - SP5100_PCI_WATCHDOG_MISC_REG, | |
196 | - &val); | |
197 | - | |
198 | - val |= SP5100_PCI_WATCHDOG_DECODE_EN; | |
199 | - | |
200 | - pci_write_config_dword(sp5100_tco_pci, | |
201 | - SP5100_PCI_WATCHDOG_MISC_REG, | |
202 | - val); | |
203 | - | |
204 | - /* Disable Watchdog timer */ | |
205 | - outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG); | |
206 | - val = inb(SP5100_IO_PM_DATA_REG); | |
207 | - val |= SP5100_PM_WATCHDOG_DISABLE; | |
208 | - outb(val, SP5100_IO_PM_DATA_REG); | |
209 | - } | |
210 | -} | |
211 | - | |
212 | 168 | /* |
213 | 169 | * /dev/watchdog handling |
214 | 170 | */ |
... | ... | @@ -361,7 +317,7 @@ |
361 | 317 | { |
362 | 318 | struct pci_dev *dev = NULL; |
363 | 319 | const char *dev_name = NULL; |
364 | - u32 val, tmp_val; | |
320 | + u32 val; | |
365 | 321 | u32 index_reg, data_reg, base_addr; |
366 | 322 | |
367 | 323 | /* Match the PCI device */ |
368 | 324 | |
... | ... | @@ -459,64 +415,9 @@ |
459 | 415 | } else |
460 | 416 | pr_debug("SBResource_MMIO is disabled(0x%04x)\n", val); |
461 | 417 | |
462 | - /* | |
463 | - * Lastly re-programming the watchdog timer MMIO address, | |
464 | - * This method is a last resort... | |
465 | - * | |
466 | - * Before re-programming, to ensure that the watchdog timer | |
467 | - * is disabled, disable the watchdog timer. | |
468 | - */ | |
469 | - tco_timer_disable(); | |
418 | + pr_notice("failed to find MMIO address, giving up.\n"); | |
419 | + goto unreg_region; | |
470 | 420 | |
471 | - if (force_addr) { | |
472 | - /* | |
473 | - * Force the use of watchdog timer MMIO address, and aligned to | |
474 | - * 8byte boundary. | |
475 | - */ | |
476 | - force_addr &= ~0x7; | |
477 | - val = force_addr; | |
478 | - | |
479 | - pr_info("Force the use of 0x%04x as MMIO address\n", val); | |
480 | - } else { | |
481 | - /* | |
482 | - * Get empty slot into the resource tree for watchdog timer. | |
483 | - */ | |
484 | - if (allocate_resource(&iomem_resource, | |
485 | - &wdt_res, | |
486 | - SP5100_WDT_MEM_MAP_SIZE, | |
487 | - 0xf0000000, | |
488 | - 0xfffffff8, | |
489 | - 0x8, | |
490 | - NULL, | |
491 | - NULL)) { | |
492 | - pr_err("MMIO allocation failed\n"); | |
493 | - goto unreg_region; | |
494 | - } | |
495 | - | |
496 | - val = resbase_phys = wdt_res.start; | |
497 | - pr_debug("Got 0x%04x from resource tree\n", val); | |
498 | - } | |
499 | - | |
500 | - /* Restore to the low three bits */ | |
501 | - outb(base_addr+0, index_reg); | |
502 | - tmp_val = val | (inb(data_reg) & 0x7); | |
503 | - | |
504 | - /* Re-programming the watchdog timer base address */ | |
505 | - outb(base_addr+0, index_reg); | |
506 | - outb((tmp_val >> 0) & 0xff, data_reg); | |
507 | - outb(base_addr+1, index_reg); | |
508 | - outb((tmp_val >> 8) & 0xff, data_reg); | |
509 | - outb(base_addr+2, index_reg); | |
510 | - outb((tmp_val >> 16) & 0xff, data_reg); | |
511 | - outb(base_addr+3, index_reg); | |
512 | - outb((tmp_val >> 24) & 0xff, data_reg); | |
513 | - | |
514 | - if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE, | |
515 | - dev_name)) { | |
516 | - pr_err("MMIO address 0x%04x already in use\n", val); | |
517 | - goto unreg_resource; | |
518 | - } | |
519 | - | |
520 | 421 | setup_wdt: |
521 | 422 | tcobase_phys = val; |
522 | 423 | |
... | ... | @@ -555,9 +456,6 @@ |
555 | 456 | |
556 | 457 | unreg_mem_region: |
557 | 458 | release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); |
558 | -unreg_resource: | |
559 | - if (resbase_phys) | |
560 | - release_resource(&wdt_res); | |
561 | 459 | unreg_region: |
562 | 460 | release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); |
563 | 461 | exit: |
... | ... | @@ -567,7 +465,6 @@ |
567 | 465 | static int sp5100_tco_init(struct platform_device *dev) |
568 | 466 | { |
569 | 467 | int ret; |
570 | - char addr_str[16]; | |
571 | 468 | |
572 | 469 | /* |
573 | 470 | * Check whether or not the hardware watchdog is there. If found, then |
574 | 471 | |
575 | 472 | |
... | ... | @@ -599,23 +496,14 @@ |
599 | 496 | clear_bit(0, &timer_alive); |
600 | 497 | |
601 | 498 | /* Show module parameters */ |
602 | - if (force_addr == tcobase_phys) | |
603 | - /* The force_addr is vaild */ | |
604 | - sprintf(addr_str, "0x%04x", force_addr); | |
605 | - else | |
606 | - strcpy(addr_str, "none"); | |
499 | + pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n", | |
500 | + tcobase, heartbeat, nowayout); | |
607 | 501 | |
608 | - pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d, " | |
609 | - "force_addr=%s)\n", | |
610 | - tcobase, heartbeat, nowayout, addr_str); | |
611 | - | |
612 | 502 | return 0; |
613 | 503 | |
614 | 504 | exit: |
615 | 505 | iounmap(tcobase); |
616 | 506 | release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); |
617 | - if (resbase_phys) | |
618 | - release_resource(&wdt_res); | |
619 | 507 | release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); |
620 | 508 | return ret; |
621 | 509 | } |
... | ... | @@ -630,8 +518,6 @@ |
630 | 518 | misc_deregister(&sp5100_tco_miscdev); |
631 | 519 | iounmap(tcobase); |
632 | 520 | release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); |
633 | - if (resbase_phys) | |
634 | - release_resource(&wdt_res); | |
635 | 521 | release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); |
636 | 522 | } |
637 | 523 |
drivers/watchdog/sp5100_tco.h
... | ... | @@ -57,7 +57,7 @@ |
57 | 57 | #define SB800_PM_WATCHDOG_DISABLE (1 << 2) |
58 | 58 | #define SB800_PM_WATCHDOG_SECOND_RES (3 << 0) |
59 | 59 | #define SB800_ACPI_MMIO_DECODE_EN (1 << 0) |
60 | -#define SB800_ACPI_MMIO_SEL (1 << 2) | |
60 | +#define SB800_ACPI_MMIO_SEL (1 << 1) | |
61 | 61 | |
62 | 62 | |
63 | 63 | #define SB800_PM_WDT_MMIO_OFFSET 0xB00 |