Commit a724eada8c2a7b62463b73ccf73fd0bb6e928aeb
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Merge branch 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6
* 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6: Add MAINTAINERS entry for ARM/INTEL IXP4xx arch support. ixp4xx: arch_idle() documentation fixup ixp4xx: timer and clocks cleanups
Showing 3 changed files Side-by-side Diff
MAINTAINERS
... | ... | @@ -686,6 +686,13 @@ |
686 | 686 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
687 | 687 | S: Maintained |
688 | 688 | |
689 | +ARM/INTEL IXP4XX ARM ARCHITECTURE | |
690 | +M: Imre Kaloz <kaloz@openwrt.org> | |
691 | +M: Krzysztof Halasa <khc@pm.waw.pl> | |
692 | +L: linux-arm-kernel@lists.infradead.org | |
693 | +S: Maintained | |
694 | +F: arch/arm/mach-ixp4xx/ | |
695 | + | |
689 | 696 | ARM/INTEL XSC3 (MANZANO) ARM CORE |
690 | 697 | M: Lennert Buytenhek <kernel@wantstofly.org> |
691 | 698 | M: Dan Williams <dan.j.williams@intel.com> |
arch/arm/mach-ixp4xx/common.c
... | ... | @@ -41,8 +41,8 @@ |
41 | 41 | #include <asm/mach/irq.h> |
42 | 42 | #include <asm/mach/time.h> |
43 | 43 | |
44 | -static int __init ixp4xx_clocksource_init(void); | |
45 | -static int __init ixp4xx_clockevent_init(void); | |
44 | +static void __init ixp4xx_clocksource_init(void); | |
45 | +static void __init ixp4xx_clockevent_init(void); | |
46 | 46 | static struct clock_event_device clockevent_ixp4xx; |
47 | 47 | |
48 | 48 | /************************************************************************* |
... | ... | @@ -267,7 +267,7 @@ |
267 | 267 | |
268 | 268 | static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id) |
269 | 269 | { |
270 | - struct clock_event_device *evt = &clockevent_ixp4xx; | |
270 | + struct clock_event_device *evt = dev_id; | |
271 | 271 | |
272 | 272 | /* Clear Pending Interrupt by writing '1' to it */ |
273 | 273 | *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND; |
... | ... | @@ -281,6 +281,7 @@ |
281 | 281 | .name = "timer1", |
282 | 282 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
283 | 283 | .handler = ixp4xx_timer_interrupt, |
284 | + .dev_id = &clockevent_ixp4xx, | |
284 | 285 | }; |
285 | 286 | |
286 | 287 | void __init ixp4xx_timer_init(void) |
... | ... | @@ -401,7 +402,7 @@ |
401 | 402 | /* |
402 | 403 | * clocksource |
403 | 404 | */ |
404 | -cycle_t ixp4xx_get_cycles(struct clocksource *cs) | |
405 | +static cycle_t ixp4xx_get_cycles(struct clocksource *cs) | |
405 | 406 | { |
406 | 407 | return *IXP4XX_OSTS; |
407 | 408 | } |
408 | 409 | |
... | ... | @@ -417,14 +418,12 @@ |
417 | 418 | |
418 | 419 | unsigned long ixp4xx_timer_freq = FREQ; |
419 | 420 | EXPORT_SYMBOL(ixp4xx_timer_freq); |
420 | -static int __init ixp4xx_clocksource_init(void) | |
421 | +static void __init ixp4xx_clocksource_init(void) | |
421 | 422 | { |
422 | 423 | clocksource_ixp4xx.mult = |
423 | 424 | clocksource_hz2mult(ixp4xx_timer_freq, |
424 | 425 | clocksource_ixp4xx.shift); |
425 | 426 | clocksource_register(&clocksource_ixp4xx); |
426 | - | |
427 | - return 0; | |
428 | 427 | } |
429 | 428 | |
430 | 429 | /* |
... | ... | @@ -480,7 +479,7 @@ |
480 | 479 | .set_next_event = ixp4xx_set_next_event, |
481 | 480 | }; |
482 | 481 | |
483 | -static int __init ixp4xx_clockevent_init(void) | |
482 | +static void __init ixp4xx_clockevent_init(void) | |
484 | 483 | { |
485 | 484 | clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC, |
486 | 485 | clockevent_ixp4xx.shift); |
... | ... | @@ -491,6 +490,5 @@ |
491 | 490 | clockevent_ixp4xx.cpumask = cpumask_of(0); |
492 | 491 | |
493 | 492 | clockevents_register_device(&clockevent_ixp4xx); |
494 | - return 0; | |
495 | 493 | } |
arch/arm/mach-ixp4xx/include/mach/system.h
... | ... | @@ -13,9 +13,11 @@ |
13 | 13 | |
14 | 14 | static inline void arch_idle(void) |
15 | 15 | { |
16 | + /* ixp4xx does not implement the XScale PWRMODE register, | |
17 | + * so it must not call cpu_do_idle() here. | |
18 | + */ | |
16 | 19 | #if 0 |
17 | - if (!hlt_counter) | |
18 | - cpu_do_idle(0); | |
20 | + cpu_do_idle(); | |
19 | 21 | #endif |
20 | 22 | } |
21 | 23 |