Commit a9633279cf13de15b7002b71a507baf89d0619ca
Committed by
Ralf Baechle
1 parent
c1dcb14ec2
Exists in
master
and in
7 other branches
[MIPS] Alchemy PCI code style cleanup
Fix 15 errors and 4 warnings given by checkpatch.pl: - space between the asterisk and variable name; - space after opening and before closing parentheses; - leading spaces instead of tabs; - printk() without KERN_* facility level; - unnecessary braces for single-statement block; - line over 80 characters. In addition to these changes, also do the following: - combine the nested 'if' statements into one when possible; - remove needless parentheses; - add missing and remove excess spaces between operator and its operands; - fix printk() format specifiers mismatching the argument types; - put the function's result type and name/parameters on the same line; - insert missing and remove excess new lines; - properly indent multi-line expressions; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line; - fix typos, capitalize acronyms, etc. in the comments; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 2 changed files with 56 additions and 66 deletions Side-by-side Diff
arch/mips/pci/fixup-au1000.c
1 | 1 | /* |
2 | 2 | * BRIEF MODULE DESCRIPTION |
3 | - * Board specific pci fixups. | |
3 | + * Board specific PCI fixups. | |
4 | 4 | * |
5 | - * Copyright 2001-2003 MontaVista Software Inc. | |
6 | - * Author: MontaVista Software, Inc. | |
7 | - * ppopov@mvista.com or source@mvista.com | |
5 | + * Copyright 2001-2003, 2008 MontaVista Software Inc. | |
6 | + * Author: MontaVista Software, Inc. <source@mvista.com> | |
8 | 7 | * |
9 | 8 | * This program is free software; you can redistribute it and/or modify it |
10 | 9 | * under the terms of the GNU General Public License as published by the |
arch/mips/pci/ops-au1000.c
1 | 1 | /* |
2 | 2 | * BRIEF MODULE DESCRIPTION |
3 | - * Alchemy/AMD Au1x00 PCI support. | |
3 | + * Alchemy/AMD Au1xx0 PCI support. | |
4 | 4 | * |
5 | - * Copyright 2001-2003, 2007 MontaVista Software Inc. | |
6 | - * Author: MontaVista Software, Inc. | |
7 | - * ppopov@mvista.com or source@mvista.com | |
5 | + * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. | |
6 | + * Author: MontaVista Software, Inc. <source@mvista.com> | |
8 | 7 | * |
9 | 8 | * Support for all devices (greater than 16) added by David Gathright. |
10 | 9 | * |
... | ... | @@ -28,6 +27,7 @@ |
28 | 27 | * with this program; if not, write to the Free Software Foundation, Inc., |
29 | 28 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
30 | 29 | */ |
30 | + | |
31 | 31 | #include <linux/types.h> |
32 | 32 | #include <linux/pci.h> |
33 | 33 | #include <linux/kernel.h> |
... | ... | @@ -36,9 +36,9 @@ |
36 | 36 | |
37 | 37 | #include <asm/mach-au1x00/au1000.h> |
38 | 38 | |
39 | -#undef DEBUG | |
40 | -#ifdef DEBUG | |
41 | -#define DBG(x...) printk(x) | |
39 | +#undef DEBUG | |
40 | +#ifdef DEBUG | |
41 | +#define DBG(x...) printk(KERN_DEBUG x) | |
42 | 42 | #else |
43 | 43 | #define DBG(x...) |
44 | 44 | #endif |
... | ... | @@ -46,7 +46,6 @@ |
46 | 46 | #define PCI_ACCESS_READ 0 |
47 | 47 | #define PCI_ACCESS_WRITE 1 |
48 | 48 | |
49 | - | |
50 | 49 | int (*board_pci_idsel)(unsigned int devsel, int assert); |
51 | 50 | |
52 | 51 | void mod_wired_entry(int entry, unsigned long entrylo0, |
53 | 52 | |
... | ... | @@ -92,10 +91,9 @@ |
92 | 91 | } |
93 | 92 | |
94 | 93 | static int config_access(unsigned char access_type, struct pci_bus *bus, |
95 | - unsigned int dev_fn, unsigned char where, | |
96 | - u32 * data) | |
94 | + unsigned int dev_fn, unsigned char where, u32 *data) | |
97 | 95 | { |
98 | -#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) | |
96 | +#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) | |
99 | 97 | unsigned int device = PCI_SLOT(dev_fn); |
100 | 98 | unsigned int function = PCI_FUNC(dev_fn); |
101 | 99 | unsigned long offset, status; |
102 | 100 | |
103 | 101 | |
104 | 102 | |
105 | 103 | |
106 | 104 | |
... | ... | @@ -114,38 +112,36 @@ |
114 | 112 | Au1500_PCI_STATCMD); |
115 | 113 | au_sync_udelay(1); |
116 | 114 | |
117 | - /* Allow board vendors to implement their own off-chip idsel. | |
115 | + /* | |
116 | + * Allow board vendors to implement their own off-chip IDSEL. | |
118 | 117 | * If it doesn't succeed, may as well bail out at this point. |
119 | 118 | */ |
120 | - if (board_pci_idsel) { | |
121 | - if (board_pci_idsel(device, 1) == 0) { | |
122 | - *data = 0xffffffff; | |
123 | - local_irq_restore(flags); | |
124 | - return -1; | |
125 | - } | |
119 | + if (board_pci_idsel && board_pci_idsel(device, 1) == 0) { | |
120 | + *data = 0xffffffff; | |
121 | + local_irq_restore(flags); | |
122 | + return -1; | |
126 | 123 | } |
127 | 124 | |
128 | - /* setup the config window */ | |
129 | - if (bus->number == 0) { | |
130 | - cfg_base = ((1<<device)<<11); | |
131 | - } else { | |
132 | - cfg_base = 0x80000000 | (bus->number<<16) | (device<<11); | |
133 | - } | |
125 | + /* Setup the config window */ | |
126 | + if (bus->number == 0) | |
127 | + cfg_base = (1 << device) << 11; | |
128 | + else | |
129 | + cfg_base = 0x80000000 | (bus->number << 16) | (device << 11); | |
134 | 130 | |
135 | - /* setup the lower bits of the 36 bit address */ | |
136 | - offset = (function << 8) | (where & ~0x3); | |
137 | - /* pick up any address that falls below the page mask */ | |
131 | + /* Setup the lower bits of the 36-bit address */ | |
132 | + offset = (function << 8) | (where & ~0x3); | |
133 | + /* Pick up any address that falls below the page mask */ | |
138 | 134 | offset |= cfg_base & ~PAGE_MASK; |
139 | 135 | |
140 | - /* page boundary */ | |
136 | + /* Page boundary */ | |
141 | 137 | cfg_base = cfg_base & PAGE_MASK; |
142 | 138 | |
143 | 139 | /* |
144 | 140 | * To improve performance, if the current device is the same as |
145 | 141 | * the last device accessed, we don't touch the TLB. |
146 | 142 | */ |
147 | - entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; | |
148 | - entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; | |
143 | + entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; | |
144 | + entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; | |
149 | 145 | if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { |
150 | 146 | mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, |
151 | 147 | (unsigned long)pci_cfg_vm->addr, PM_4K); |
152 | 148 | |
153 | 149 | |
154 | 150 | |
155 | 151 | |
156 | 152 | |
157 | 153 | |
158 | 154 | |
159 | 155 | |
160 | 156 | |
... | ... | @@ -153,38 +149,37 @@ |
153 | 149 | last_entryLo1 = entryLo1; |
154 | 150 | } |
155 | 151 | |
156 | - if (access_type == PCI_ACCESS_WRITE) { | |
152 | + if (access_type == PCI_ACCESS_WRITE) | |
157 | 153 | au_writel(*data, (int)(pci_cfg_vm->addr + offset)); |
158 | - } else { | |
154 | + else | |
159 | 155 | *data = au_readl((int)(pci_cfg_vm->addr + offset)); |
160 | - } | |
156 | + | |
161 | 157 | au_sync_udelay(2); |
162 | 158 | |
163 | - DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n", | |
164 | - access_type, bus->number, device, where, *data, offset); | |
159 | + DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n", | |
160 | + access_type, bus->number, device, where, *data, offset); | |
165 | 161 | |
166 | - /* check master abort */ | |
162 | + /* Check master abort */ | |
167 | 163 | status = au_readl(Au1500_PCI_STATCMD); |
168 | 164 | |
169 | - if (status & (1<<29)) { | |
165 | + if (status & (1 << 29)) { | |
170 | 166 | *data = 0xffffffff; |
171 | 167 | error = -1; |
172 | 168 | DBG("Au1x Master Abort\n"); |
173 | 169 | } else if ((status >> 28) & 0xf) { |
174 | - DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf)); | |
170 | + DBG("PCI ERR detected: device %u, status %lx\n", | |
171 | + device, (status >> 28) & 0xf); | |
175 | 172 | |
176 | - /* clear errors */ | |
173 | + /* Clear errors */ | |
177 | 174 | au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD); |
178 | 175 | |
179 | 176 | *data = 0xffffffff; |
180 | 177 | error = -1; |
181 | 178 | } |
182 | 179 | |
183 | - /* Take away the idsel. | |
184 | - */ | |
185 | - if (board_pci_idsel) { | |
180 | + /* Take away the IDSEL. */ | |
181 | + if (board_pci_idsel) | |
186 | 182 | (void)board_pci_idsel(device, 0); |
187 | - } | |
188 | 183 | |
189 | 184 | local_irq_restore(flags); |
190 | 185 | return error; |
... | ... | @@ -192,7 +187,7 @@ |
192 | 187 | } |
193 | 188 | |
194 | 189 | static int read_config_byte(struct pci_bus *bus, unsigned int devfn, |
195 | - int where, u8 * val) | |
190 | + int where, u8 *val) | |
196 | 191 | { |
197 | 192 | u32 data; |
198 | 193 | int ret; |
199 | 194 | |
... | ... | @@ -206,9 +201,8 @@ |
206 | 201 | return ret; |
207 | 202 | } |
208 | 203 | |
209 | - | |
210 | 204 | static int read_config_word(struct pci_bus *bus, unsigned int devfn, |
211 | - int where, u16 * val) | |
205 | + int where, u16 *val) | |
212 | 206 | { |
213 | 207 | u32 data; |
214 | 208 | int ret; |
... | ... | @@ -221,7 +215,7 @@ |
221 | 215 | } |
222 | 216 | |
223 | 217 | static int read_config_dword(struct pci_bus *bus, unsigned int devfn, |
224 | - int where, u32 * val) | |
218 | + int where, u32 *val) | |
225 | 219 | { |
226 | 220 | int ret; |
227 | 221 | |
... | ... | @@ -229,9 +223,8 @@ |
229 | 223 | return ret; |
230 | 224 | } |
231 | 225 | |
232 | -static int | |
233 | -write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, | |
234 | - u8 val) | |
226 | +static int write_config_byte(struct pci_bus *bus, unsigned int devfn, | |
227 | + int where, u8 val) | |
235 | 228 | { |
236 | 229 | u32 data = 0; |
237 | 230 | |
... | ... | @@ -239,7 +232,7 @@ |
239 | 232 | return -1; |
240 | 233 | |
241 | 234 | data = (data & ~(0xff << ((where & 3) << 3))) | |
242 | - (val << ((where & 3) << 3)); | |
235 | + (val << ((where & 3) << 3)); | |
243 | 236 | |
244 | 237 | if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) |
245 | 238 | return -1; |
... | ... | @@ -247,9 +240,8 @@ |
247 | 240 | return PCIBIOS_SUCCESSFUL; |
248 | 241 | } |
249 | 242 | |
250 | -static int | |
251 | -write_config_word(struct pci_bus *bus, unsigned int devfn, int where, | |
252 | - u16 val) | |
243 | +static int write_config_word(struct pci_bus *bus, unsigned int devfn, | |
244 | + int where, u16 val) | |
253 | 245 | { |
254 | 246 | u32 data = 0; |
255 | 247 | |
256 | 248 | |
257 | 249 | |
... | ... | @@ -257,18 +249,16 @@ |
257 | 249 | return -1; |
258 | 250 | |
259 | 251 | data = (data & ~(0xffff << ((where & 3) << 3))) | |
260 | - (val << ((where & 3) << 3)); | |
252 | + (val << ((where & 3) << 3)); | |
261 | 253 | |
262 | 254 | if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) |
263 | 255 | return -1; |
264 | 256 | |
265 | - | |
266 | 257 | return PCIBIOS_SUCCESSFUL; |
267 | 258 | } |
268 | 259 | |
269 | -static int | |
270 | -write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, | |
271 | - u32 val) | |
260 | +static int write_config_dword(struct pci_bus *bus, unsigned int devfn, | |
261 | + int where, u32 val) | |
272 | 262 | { |
273 | 263 | if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) |
274 | 264 | return -1; |
275 | 265 | |
276 | 266 | |
277 | 267 | |
... | ... | @@ -277,18 +267,20 @@ |
277 | 267 | } |
278 | 268 | |
279 | 269 | static int config_read(struct pci_bus *bus, unsigned int devfn, |
280 | - int where, int size, u32 * val) | |
270 | + int where, int size, u32 *val) | |
281 | 271 | { |
282 | 272 | switch (size) { |
283 | 273 | case 1: { |
284 | 274 | u8 _val; |
285 | 275 | int rc = read_config_byte(bus, devfn, where, &_val); |
276 | + | |
286 | 277 | *val = _val; |
287 | 278 | return rc; |
288 | 279 | } |
289 | - case 2: { | |
280 | + case 2: { | |
290 | 281 | u16 _val; |
291 | 282 | int rc = read_config_word(bus, devfn, where, &_val); |
283 | + | |
292 | 284 | *val = _val; |
293 | 285 | return rc; |
294 | 286 | } |
... | ... | @@ -309,7 +301,6 @@ |
309 | 301 | return write_config_dword(bus, devfn, where, val); |
310 | 302 | } |
311 | 303 | } |
312 | - | |
313 | 304 | |
314 | 305 | struct pci_ops au1x_pci_ops = { |
315 | 306 | config_read, |