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Commit a99a7d1436f9375662f35ccac8f1a1e1b0302a11

Authored by Linus Torvalds
2 parents bdc7ccfc06 ded7c1ee97
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

Merge branch 'timers-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/ke… 

…rnel/git/tip/linux-2.6-tip

* 'timers-cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  mips: Fix i8253 clockevent fallout
  i8253: Cleanup outb/inb magic
  arm: Footbridge: Use common i8253 clockevent
  mips: Use common i8253 clockevent
  x86: Use common i8253 clockevent
  i8253: Create common clockevent implementation
  i8253: Export i8253_lock unconditionally
  pcpskr: MIPS: Make config dependencies finer grained
  pcspkr: Cleanup Kconfig dependencies
  i8253: Move remaining content and delete asm/i8253.h
  i8253: Consolidate definitions of PIT_LATCH
  x86: i8253: Consolidate definitions of global_clock_event
  i8253: Alpha, PowerPC: Remove unused asm/8253pit.h
  alpha: i8253: Cleanup remaining users of i8253pit.h
  i8253: Remove I8253_LOCK config
  i8253: Make pcsp sound driver use the shared i8253_lock
  i8253: Make pcspkr input driver use the shared i8253_lock
  i8253: Consolidate all kernel definitions of i8253_lock
  i8253: Unify all kernel declarations of i8253_lock
  i8253: Create linux/i8253.h and use it in all 8253 related files

Showing 40 changed files Side-by-side Diff

... ... @@ -6,6 +6,7 @@
6 6 select HAVE_OPROFILE
7 7 select HAVE_SYSCALL_WRAPPERS
8 8 select HAVE_IRQ_WORK
  9 + select HAVE_PCSPKR_PLATFORM
9 10 select HAVE_PERF_EVENTS
10 11 select HAVE_DMA_ATTRS
11 12 select HAVE_GENERIC_HARDIRQS
arch/alpha/include/asm/8253pit.h
View file @ a99a7d1
1   -/*
2   - * 8253/8254 Programmable Interval Timer
3   - */
arch/alpha/kernel/sys_ruffian.c
Diff comments   View file @ a99a7d1
... ... @@ -26,7 +26,6 @@
26 26 #include <asm/pgtable.h>
27 27 #include <asm/core_cia.h>
28 28 #include <asm/tlbflush.h>
29   -#include <asm/8253pit.h>
30 29  
31 30 #include "proto.h"
32 31 #include "irq_impl.h"
arch/alpha/kernel/time.c
Diff comments   View file @ a99a7d1
... ... @@ -46,7 +46,6 @@
46 46 #include <asm/uaccess.h>
47 47 #include <asm/io.h>
48 48 #include <asm/hwrpb.h>
49   -#include <asm/8253pit.h>
50 49 #include <asm/rtc.h>
51 50  
52 51 #include <linux/mc146818rtc.h>
arch/arm/include/asm/i8253.h
View file @ a99a7d1
1   -#ifndef __ASMARM_I8253_H
2   -#define __ASMARM_I8253_H
3   -
4   -/* i8253A PIT registers */
5   -#define PIT_MODE 0x43
6   -#define PIT_CH0 0x40
7   -
8   -#define PIT_LATCH ((PIT_TICK_RATE + HZ / 2) / HZ)
9   -
10   -extern raw_spinlock_t i8253_lock;
11   -
12   -#define outb_pit outb_p
13   -#define inb_pit inb_p
14   -
15   -#endif
arch/arm/mach-footbridge/Kconfig
Diff comments   View file @ a99a7d1
... ... @@ -5,6 +5,7 @@
5 5 config ARCH_CATS
6 6 bool "CATS"
7 7 select CLKSRC_I8253
  8 + select CLKEVT_I8253
8 9 select FOOTBRIDGE_HOST
9 10 select ISA
10 11 select ISA_DMA
arch/arm/mach-footbridge/isa-timer.c
Diff comments   View file @ a99a7d1
... ... @@ -5,64 +5,18 @@
5 5 * Copyright (C) 1998 Phil Blundell
6 6 */
7 7 #include <linux/clockchips.h>
8   -#include <linux/clocksource.h>
  8 +#include <linux/i8253.h>
9 9 #include <linux/init.h>
10 10 #include <linux/interrupt.h>
11 11 #include <linux/irq.h>
12   -#include <linux/io.h>
13 12 #include <linux/spinlock.h>
14 13 #include <linux/timex.h>
15 14  
16 15 #include <asm/irq.h>
17   -#include <asm/i8253.h>
18 16 #include <asm/mach/time.h>
19 17  
20 18 #include "common.h"
21 19  
22   -DEFINE_RAW_SPINLOCK(i8253_lock);
23   -
24   -static void pit_set_mode(enum clock_event_mode mode,
25   - struct clock_event_device *evt)
26   -{
27   - unsigned long flags;
28   -
29   - raw_local_irq_save(flags);
30   -
31   - switch (mode) {
32   - case CLOCK_EVT_MODE_PERIODIC:
33   - outb_p(0x34, PIT_MODE);
34   - outb_p(PIT_LATCH & 0xff, PIT_CH0);
35   - outb_p(PIT_LATCH >> 8, PIT_CH0);
36   - break;
37   -
38   - case CLOCK_EVT_MODE_SHUTDOWN:
39   - case CLOCK_EVT_MODE_UNUSED:
40   - outb_p(0x30, PIT_MODE);
41   - outb_p(0, PIT_CH0);
42   - outb_p(0, PIT_CH0);
43   - break;
44   -
45   - case CLOCK_EVT_MODE_ONESHOT:
46   - case CLOCK_EVT_MODE_RESUME:
47   - break;
48   - }
49   - local_irq_restore(flags);
50   -}
51   -
52   -static int pit_set_next_event(unsigned long delta,
53   - struct clock_event_device *evt)
54   -{
55   - return 0;
56   -}
57   -
58   -static struct clock_event_device pit_ce = {
59   - .name = "pit",
60   - .features = CLOCK_EVT_FEAT_PERIODIC,
61   - .set_mode = pit_set_mode,
62   - .set_next_event = pit_set_next_event,
63   - .shift = 32,
64   -};
65   -
66 20 static irqreturn_t pit_timer_interrupt(int irq, void *dev_id)
67 21 {
68 22 struct clock_event_device *ce = dev_id;
69 23  
70 24  
... ... @@ -74,20 +28,15 @@
74 28 .name = "pit",
75 29 .handler = pit_timer_interrupt,
76 30 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
77   - .dev_id = &pit_ce,
  31 + .dev_id = &i8253_clockevent,
78 32 };
79 33  
80 34 static void __init isa_timer_init(void)
81 35 {
82   - pit_ce.cpumask = cpumask_of(smp_processor_id());
83   - pit_ce.mult = div_sc(PIT_TICK_RATE, NSEC_PER_SEC, pit_ce.shift);
84   - pit_ce.max_delta_ns = clockevent_delta2ns(0x7fff, &pit_ce);
85   - pit_ce.min_delta_ns = clockevent_delta2ns(0x000f, &pit_ce);
86   -
87 36 clocksource_i8253_init();
88 37  
89   - setup_irq(pit_ce.irq, &pit_timer_irq);
90   - clockevents_register_device(&pit_ce);
  38 + setup_irq(i8253_clockevent.irq, &pit_timer_irq);
  39 + clockevent_i8253_init(false);
91 40 }
92 41  
93 42 struct sys_timer isa_timer = {
... ... @@ -185,6 +185,7 @@
185 185 select CSRC_R4K
186 186 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
187 187 select GENERIC_ISA_DMA
  188 + select HAVE_PCSPKR_PLATFORM
188 189 select IRQ_CPU
189 190 select I8253
190 191 select I8259
... ... @@ -266,6 +267,7 @@
266 267 select CSRC_R4K
267 268 select DMA_NONCOHERENT
268 269 select GENERIC_ISA_DMA
  270 + select HAVE_PCSPKR_PLATFORM
269 271 select IRQ_CPU
270 272 select IRQ_GIC
271 273 select HW_HAS_PCI
... ... @@ -640,6 +642,7 @@
640 642 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
641 643 select DMA_NONCOHERENT
642 644 select GENERIC_ISA_DMA
  645 + select HAVE_PCSPKR_PLATFORM
643 646 select HW_HAS_EISA
644 647 select HW_HAS_PCI
645 648 select IRQ_CPU
... ... @@ -2388,6 +2391,7 @@
2388 2391 config I8253
2389 2392 bool
2390 2393 select CLKSRC_I8253
  2394 + select CLKEVT_I8253
2391 2395 select MIPS_EXTERNAL_TIMER
2392 2396  
2393 2397 config ZONE_DMA32
arch/mips/cobalt/time.c
Diff comments   View file @ a99a7d1
... ... @@ -17,10 +17,10 @@
17 17 * along with this program; if not, write to the Free Software
18 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 19 */
  20 +#include <linux/i8253.h>
20 21 #include <linux/init.h>
21 22  
22 23 #include <asm/gt64120.h>
23   -#include <asm/i8253.h>
24 24 #include <asm/time.h>
25 25  
26 26 #define GT641XX_BASE_CLOCK 50000000 /* 50MHz */
arch/mips/include/asm/i8253.h
View file @ a99a7d1
1   -/*
2   - * Machine specific IO port address definition for generic.
3   - * Written by Osamu Tomita <tomita@cinet.co.jp>
4   - */
5   -#ifndef __ASM_I8253_H
6   -#define __ASM_I8253_H
7   -
8   -#include <linux/spinlock.h>
9   -
10   -/* i8253A PIT registers */
11   -#define PIT_MODE 0x43
12   -#define PIT_CH0 0x40
13   -#define PIT_CH2 0x42
14   -
15   -#define PIT_LATCH LATCH
16   -
17   -extern raw_spinlock_t i8253_lock;
18   -
19   -extern void setup_pit_timer(void);
20   -
21   -#define inb_pit inb_p
22   -#define outb_pit outb_p
23   -
24   -#endif /* __ASM_I8253_H */
arch/mips/jazz/irq.c
Diff comments   View file @ a99a7d1
... ... @@ -7,6 +7,7 @@
7 7 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle
8 8 */
9 9 #include <linux/clockchips.h>
  10 +#include <linux/i8253.h>
10 11 #include <linux/init.h>
11 12 #include <linux/interrupt.h>
12 13 #include <linux/kernel.h>
... ... @@ -15,7 +16,6 @@
15 16 #include <linux/irq.h>
16 17  
17 18 #include <asm/irq_cpu.h>
18   -#include <asm/i8253.h>
19 19 #include <asm/i8259.h>
20 20 #include <asm/io.h>
21 21 #include <asm/jazz.h>
arch/mips/kernel/i8253.c
Diff comments   View file @ a99a7d1
... ... @@ -3,96 +3,16 @@
3 3 *
4 4 */
5 5 #include <linux/clockchips.h>
6   -#include <linux/init.h>
7   -#include <linux/interrupt.h>
8   -#include <linux/jiffies.h>
  6 +#include <linux/i8253.h>
9 7 #include <linux/module.h>
10 8 #include <linux/smp.h>
11   -#include <linux/spinlock.h>
12 9 #include <linux/irq.h>
13 10  
14   -#include <asm/delay.h>
15   -#include <asm/i8253.h>
16   -#include <asm/io.h>
17 11 #include <asm/time.h>
18 12  
19   -DEFINE_RAW_SPINLOCK(i8253_lock);
20   -EXPORT_SYMBOL(i8253_lock);
21   -
22   -/*
23   - * Initialize the PIT timer.
24   - *
25   - * This is also called after resume to bring the PIT into operation again.
26   - */
27   -static void init_pit_timer(enum clock_event_mode mode,
28   - struct clock_event_device *evt)
29   -{
30   - raw_spin_lock(&i8253_lock);
31   -
32   - switch(mode) {
33   - case CLOCK_EVT_MODE_PERIODIC:
34   - /* binary, mode 2, LSB/MSB, ch 0 */
35   - outb_p(0x34, PIT_MODE);
36   - outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
37   - outb(LATCH >> 8 , PIT_CH0); /* MSB */
38   - break;
39   -
40   - case CLOCK_EVT_MODE_SHUTDOWN:
41   - case CLOCK_EVT_MODE_UNUSED:
42   - if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
43   - evt->mode == CLOCK_EVT_MODE_ONESHOT) {
44   - outb_p(0x30, PIT_MODE);
45   - outb_p(0, PIT_CH0);
46   - outb_p(0, PIT_CH0);
47   - }
48   - break;
49   -
50   - case CLOCK_EVT_MODE_ONESHOT:
51   - /* One shot setup */
52   - outb_p(0x38, PIT_MODE);
53   - break;
54   -
55   - case CLOCK_EVT_MODE_RESUME:
56   - /* Nothing to do here */
57   - break;
58   - }
59   - raw_spin_unlock(&i8253_lock);
60   -}
61   -
62   -/*
63   - * Program the next event in oneshot mode
64   - *
65   - * Delta is given in PIT ticks
66   - */
67   -static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
68   -{
69   - raw_spin_lock(&i8253_lock);
70   - outb_p(delta & 0xff , PIT_CH0); /* LSB */
71   - outb(delta >> 8 , PIT_CH0); /* MSB */
72   - raw_spin_unlock(&i8253_lock);
73   -
74   - return 0;
75   -}
76   -
77   -/*
78   - * On UP the PIT can serve all of the possible timer functions. On SMP systems
79   - * it can be solely used for the global tick.
80   - *
81   - * The profiling and update capabilites are switched off once the local apic is
82   - * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
83   - * !using_apic_timer decisions in do_timer_interrupt_hook()
84   - */
85   -static struct clock_event_device pit_clockevent = {
86   - .name = "pit",
87   - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
88   - .set_mode = init_pit_timer,
89   - .set_next_event = pit_next_event,
90   - .irq = 0,
91   -};
92   -
93 13 static irqreturn_t timer_interrupt(int irq, void *dev_id)
94 14 {
95   - pit_clockevent.event_handler(&pit_clockevent);
  15 + i8253_clockevent.event_handler(&i8253_clockevent);
96 16  
97 17 return IRQ_HANDLED;
98 18 }
99 19  
... ... @@ -103,25 +23,9 @@
103 23 .name = "timer"
104 24 };
105 25  
106   -/*
107   - * Initialize the conversion factor and the min/max deltas of the clock event
108   - * structure and register the clock event source with the framework.
109   - */
110 26 void __init setup_pit_timer(void)
111 27 {
112   - struct clock_event_device *cd = &pit_clockevent;
113   - unsigned int cpu = smp_processor_id();
114   -
115   - /*
116   - * Start pit with the boot cpu mask and make it global after the
117   - * IO_APIC has been initialized.
118   - */
119   - cd->cpumask = cpumask_of(cpu);
120   - clockevent_set_clock(cd, CLOCK_TICK_RATE);
121   - cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
122   - cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
123   - clockevents_register_device(cd);
124   -
  28 + clockevent_i8253_init(true);
125 29 setup_irq(0, &irq0);
126 30 }
127 31  
arch/mips/mti-malta/malta-time.c
Diff comments   View file @ a99a7d1
... ... @@ -19,6 +19,7 @@
19 19 */
20 20  
21 21 #include <linux/types.h>
  22 +#include <linux/i8253.h>
22 23 #include <linux/init.h>
23 24 #include <linux/kernel_stat.h>
24 25 #include <linux/sched.h>
... ... @@ -31,7 +32,6 @@
31 32 #include <asm/mipsregs.h>
32 33 #include <asm/mipsmtregs.h>
33 34 #include <asm/hardirq.h>
34   -#include <asm/i8253.h>
35 35 #include <asm/irq.h>
36 36 #include <asm/div64.h>
37 37 #include <asm/cpu.h>
arch/mips/sgi-ip22/ip22-time.c
Diff comments   View file @ a99a7d1
... ... @@ -10,6 +10,7 @@
10 10 * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org)
11 11 */
12 12 #include <linux/bcd.h>
  13 +#include <linux/i8253.h>
13 14 #include <linux/init.h>
14 15 #include <linux/irq.h>
15 16 #include <linux/kernel.h>
... ... @@ -20,7 +21,6 @@
20 21  
21 22 #include <asm/cpu.h>
22 23 #include <asm/mipsregs.h>
23   -#include <asm/i8253.h>
24 24 #include <asm/io.h>
25 25 #include <asm/irq.h>
26 26 #include <asm/time.h>
arch/mips/sni/time.c
Diff comments   View file @ a99a7d1
1 1 #include <linux/types.h>
  2 +#include <linux/i8253.h>
2 3 #include <linux/interrupt.h>
3 4 #include <linux/irq.h>
4 5 #include <linux/smp.h>
5 6 #include <linux/time.h>
6 7 #include <linux/clockchips.h>
7 8  
8   -#include <asm/i8253.h>
9 9 #include <asm/sni.h>
10 10 #include <asm/time.h>
11 11 #include <asm-generic/rtc.h>
arch/powerpc/include/asm/8253pit.h
View file @ a99a7d1
1   -/*
2   - * 8253/8254 Programmable Interval Timer
3   - */
arch/powerpc/platforms/amigaone/Kconfig
Diff comments   View file @ a99a7d1
... ... @@ -8,7 +8,7 @@
8 8 select NOT_COHERENT_CACHE
9 9 select CHECK_CACHE_COHERENCY
10 10 select DEFAULT_UIMAGE
11   - select PCSPKR_PLATFORM
  11 + select HAVE_PCSPKR_PLATFORM
12 12 help
13 13 Select AmigaOne for the following machines:
14 14 - AmigaOne SE/Teron CX (G3 only)
arch/powerpc/platforms/chrp/Kconfig
Diff comments   View file @ a99a7d1
1 1 config PPC_CHRP
2 2 bool "Common Hardware Reference Platform (CHRP) based machines"
3 3 depends on 6xx
  4 + select HAVE_PCSPKR_PLATFORM
4 5 select MPIC
5 6 select PPC_I8259
6 7 select PPC_INDIRECT_PCI
arch/powerpc/platforms/prep/Kconfig
Diff comments   View file @ a99a7d1
1 1 config PPC_PREP
2 2 bool "PowerPC Reference Platform (PReP) based machines"
3 3 depends on 6xx && BROKEN
  4 + select HAVE_PCSPKR_PLATFORM
4 5 select MPIC
5 6 select PPC_I8259
6 7 select PPC_INDIRECT_PCI
arch/powerpc/platforms/pseries/Kconfig
Diff comments   View file @ a99a7d1
1 1 config PPC_PSERIES
2 2 depends on PPC64 && PPC_BOOK3S
3 3 bool "IBM pSeries & new (POWER5-based) iSeries"
  4 + select HAVE_PCSPKR_PLATFORM
4 5 select MPIC
5 6 select PCI_MSI
6 7 select PPC_XICS
... ... @@ -20,6 +20,7 @@
20 20 select HAVE_UNSTABLE_SCHED_CLOCK
21 21 select HAVE_IDE
22 22 select HAVE_OPROFILE
  23 + select HAVE_PCSPKR_PLATFORM
23 24 select HAVE_PERF_EVENTS
24 25 select HAVE_IRQ_WORK
25 26 select HAVE_IOREMAP_PROT
... ... @@ -70,6 +71,7 @@
70 71 select IRQ_FORCED_THREADING
71 72 select USE_GENERIC_SMP_HELPERS if SMP
72 73 select HAVE_BPF_JIT if (X86_64 && NET)
  74 + select CLKEVT_I8253
73 75  
74 76 config INSTRUCTION_DECODER
75 77 def_bool (KPROBES || PERF_EVENTS)
arch/x86/include/asm/apb_timer.h
Diff comments   View file @ a99a7d1
... ... @@ -50,7 +50,6 @@
50 50 #define APBT_DEV_USED 1
51 51  
52 52 extern void apbt_time_init(void);
53   -extern struct clock_event_device *global_clock_event;
54 53 extern unsigned long apbt_quick_calibrate(void);
55 54 extern int arch_setup_apbt_irqs(int irq, int trigger, int mask, int cpu);
56 55 extern void apbt_setup_secondary_clock(void);
arch/x86/include/asm/i8253.h
View file @ a99a7d1
1   -#ifndef _ASM_X86_I8253_H
2   -#define _ASM_X86_I8253_H
3   -
4   -/* i8253A PIT registers */
5   -#define PIT_MODE 0x43
6   -#define PIT_CH0 0x40
7   -#define PIT_CH2 0x42
8   -
9   -#define PIT_LATCH LATCH
10   -
11   -extern raw_spinlock_t i8253_lock;
12   -
13   -extern struct clock_event_device *global_clock_event;
14   -
15   -extern void setup_pit_timer(void);
16   -
17   -#define inb_pit inb_p
18   -#define outb_pit outb_p
19   -
20   -#endif /* _ASM_X86_I8253_H */
arch/x86/include/asm/time.h
Diff comments   View file @ a99a7d1
1 1 #ifndef _ASM_X86_TIME_H
2 2 #define _ASM_X86_TIME_H
3 3  
4   -extern void hpet_time_init(void);
5   -
  4 +#include <linux/clocksource.h>
6 5 #include <asm/mc146818rtc.h>
7 6  
  7 +extern void hpet_time_init(void);
8 8 extern void time_init(void);
  9 +
  10 +extern struct clock_event_device *global_clock_event;
9 11  
10 12 #endif /* _ASM_X86_TIME_H */
arch/x86/kernel/apb_timer.c
Diff comments   View file @ a99a7d1
... ... @@ -44,6 +44,7 @@
44 44 #include <asm/fixmap.h>
45 45 #include <asm/apb_timer.h>
46 46 #include <asm/mrst.h>
  47 +#include <asm/time.h>
47 48  
48 49 #define APBT_MASK CLOCKSOURCE_MASK(32)
49 50 #define APBT_SHIFT 22
arch/x86/kernel/apic/apic.c
Diff comments   View file @ a99a7d1
... ... @@ -27,6 +27,7 @@
27 27 #include <linux/syscore_ops.h>
28 28 #include <linux/delay.h>
29 29 #include <linux/timex.h>
  30 +#include <linux/i8253.h>
30 31 #include <linux/dmar.h>
31 32 #include <linux/init.h>
32 33 #include <linux/cpu.h>
... ... @@ -39,7 +40,6 @@
39 40 #include <asm/pgalloc.h>
40 41 #include <asm/atomic.h>
41 42 #include <asm/mpspec.h>
42   -#include <asm/i8253.h>
43 43 #include <asm/i8259.h>
44 44 #include <asm/proto.h>
45 45 #include <asm/apic.h>
... ... @@ -48,6 +48,7 @@
48 48 #include <asm/hpet.h>
49 49 #include <asm/idle.h>
50 50 #include <asm/mtrr.h>
  51 +#include <asm/time.h>
51 52 #include <asm/smp.h>
52 53 #include <asm/mce.h>
53 54 #include <asm/tsc.h>
arch/x86/kernel/apm_32.c
Diff comments   View file @ a99a7d1
... ... @@ -229,11 +229,11 @@
229 229 #include <linux/jiffies.h>
230 230 #include <linux/acpi.h>
231 231 #include <linux/syscore_ops.h>
  232 +#include <linux/i8253.h>
232 233  
233 234 #include <asm/system.h>
234 235 #include <asm/uaccess.h>
235 236 #include <asm/desc.h>
236   -#include <asm/i8253.h>
237 237 #include <asm/olpc.h>
238 238 #include <asm/paravirt.h>
239 239 #include <asm/reboot.h>
240 240  
241 241  
... ... @@ -1220,11 +1220,11 @@
1220 1220  
1221 1221 raw_spin_lock_irqsave(&i8253_lock, flags);
1222 1222 /* set the clock to HZ */
1223   - outb_pit(0x34, PIT_MODE); /* binary, mode 2, LSB/MSB, ch 0 */
  1223 + outb_p(0x34, PIT_MODE); /* binary, mode 2, LSB/MSB, ch 0 */
1224 1224 udelay(10);
1225   - outb_pit(LATCH & 0xff, PIT_CH0); /* LSB */
  1225 + outb_p(LATCH & 0xff, PIT_CH0); /* LSB */
1226 1226 udelay(10);
1227   - outb_pit(LATCH >> 8, PIT_CH0); /* MSB */
  1227 + outb_p(LATCH >> 8, PIT_CH0); /* MSB */
1228 1228 udelay(10);
1229 1229 raw_spin_unlock_irqrestore(&i8253_lock, flags);
1230 1230 #endif
arch/x86/kernel/hpet.c
Diff comments   View file @ a99a7d1
... ... @@ -4,6 +4,7 @@
4 4 #include <linux/sysdev.h>
5 5 #include <linux/delay.h>
6 6 #include <linux/errno.h>
  7 +#include <linux/i8253.h>
7 8 #include <linux/slab.h>
8 9 #include <linux/hpet.h>
9 10 #include <linux/init.h>
10 11  
... ... @@ -12,8 +13,8 @@
12 13 #include <linux/io.h>
13 14  
14 15 #include <asm/fixmap.h>
15   -#include <asm/i8253.h>
16 16 #include <asm/hpet.h>
  17 +#include <asm/time.h>
17 18  
18 19 #define HPET_MASK CLOCKSOURCE_MASK(32)
19 20  
arch/x86/kernel/i8253.c
Diff comments   View file @ a99a7d1
... ... @@ -3,113 +3,24 @@
3 3 *
4 4 */
5 5 #include <linux/clockchips.h>
6   -#include <linux/interrupt.h>
7   -#include <linux/spinlock.h>
8   -#include <linux/jiffies.h>
9 6 #include <linux/module.h>
10 7 #include <linux/timex.h>
11   -#include <linux/delay.h>
12   -#include <linux/init.h>
13   -#include <linux/io.h>
  8 +#include <linux/i8253.h>
14 9  
15   -#include <asm/i8253.h>
16 10 #include <asm/hpet.h>
  11 +#include <asm/time.h>
17 12 #include <asm/smp.h>
18 13  
19   -DEFINE_RAW_SPINLOCK(i8253_lock);
20   -EXPORT_SYMBOL(i8253_lock);
21   -
22 14 /*
23 15 * HPET replaces the PIT, when enabled. So we need to know, which of
24 16 * the two timers is used
25 17 */
26 18 struct clock_event_device *global_clock_event;
27 19  
28   -/*
29   - * Initialize the PIT timer.
30   - *
31   - * This is also called after resume to bring the PIT into operation again.
32   - */
33   -static void init_pit_timer(enum clock_event_mode mode,
34   - struct clock_event_device *evt)
35   -{
36   - raw_spin_lock(&i8253_lock);
37   -
38   - switch (mode) {
39   - case CLOCK_EVT_MODE_PERIODIC:
40   - /* binary, mode 2, LSB/MSB, ch 0 */
41   - outb_pit(0x34, PIT_MODE);
42   - outb_pit(LATCH & 0xff , PIT_CH0); /* LSB */
43   - outb_pit(LATCH >> 8 , PIT_CH0); /* MSB */
44   - break;
45   -
46   - case CLOCK_EVT_MODE_SHUTDOWN:
47   - case CLOCK_EVT_MODE_UNUSED:
48   - if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
49   - evt->mode == CLOCK_EVT_MODE_ONESHOT) {
50   - outb_pit(0x30, PIT_MODE);
51   - outb_pit(0, PIT_CH0);
52   - outb_pit(0, PIT_CH0);
53   - }
54   - break;
55   -
56   - case CLOCK_EVT_MODE_ONESHOT:
57   - /* One shot setup */
58   - outb_pit(0x38, PIT_MODE);
59   - break;
60   -
61   - case CLOCK_EVT_MODE_RESUME:
62   - /* Nothing to do here */
63   - break;
64   - }
65   - raw_spin_unlock(&i8253_lock);
66   -}
67   -
68   -/*
69   - * Program the next event in oneshot mode
70   - *
71   - * Delta is given in PIT ticks
72   - */
73   -static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
74   -{
75   - raw_spin_lock(&i8253_lock);
76   - outb_pit(delta & 0xff , PIT_CH0); /* LSB */
77   - outb_pit(delta >> 8 , PIT_CH0); /* MSB */
78   - raw_spin_unlock(&i8253_lock);
79   -
80   - return 0;
81   -}
82   -
83   -/*
84   - * On UP the PIT can serve all of the possible timer functions. On SMP systems
85   - * it can be solely used for the global tick.
86   - *
87   - * The profiling and update capabilities are switched off once the local apic is
88   - * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
89   - * !using_apic_timer decisions in do_timer_interrupt_hook()
90   - */
91   -static struct clock_event_device pit_ce = {
92   - .name = "pit",
93   - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
94   - .set_mode = init_pit_timer,
95   - .set_next_event = pit_next_event,
96   - .irq = 0,
97   -};
98   -
99   -/*
100   - * Initialize the conversion factor and the min/max deltas of the clock event
101   - * structure and register the clock event source with the framework.
102   - */
103 20 void __init setup_pit_timer(void)
104 21 {
105   - /*
106   - * Start pit with the boot cpu mask and make it global after the
107   - * IO_APIC has been initialized.
108   - */
109   - pit_ce.cpumask = cpumask_of(smp_processor_id());
110   -
111   - clockevents_config_and_register(&pit_ce, CLOCK_TICK_RATE, 0xF, 0x7FFF);
112   - global_clock_event = &pit_ce;
  22 + clockevent_i8253_init(true);
  23 + global_clock_event = &i8253_clockevent;
113 24 }
114 25  
115 26 #ifndef CONFIG_X86_64
... ... @@ -123,7 +34,7 @@
123 34 * - when local APIC timer is active (PIT is switched off)
124 35 */
125 36 if (num_possible_cpus() > 1 || is_hpet_enabled() ||
126   - pit_ce.mode != CLOCK_EVT_MODE_PERIODIC)
  37 + i8253_clockevent.mode != CLOCK_EVT_MODE_PERIODIC)
127 38 return 0;
128 39  
129 40 return clocksource_i8253_init();
arch/x86/kernel/time.c
Diff comments   View file @ a99a7d1
... ... @@ -11,13 +11,13 @@
11 11  
12 12 #include <linux/clockchips.h>
13 13 #include <linux/interrupt.h>
  14 +#include <linux/i8253.h>
14 15 #include <linux/time.h>
15 16 #include <linux/mca.h>
16 17  
17 18 #include <asm/vsyscall.h>
18 19 #include <asm/x86_init.h>
19 20 #include <asm/i8259.h>
20   -#include <asm/i8253.h>
21 21 #include <asm/timer.h>
22 22 #include <asm/hpet.h>
23 23 #include <asm/time.h>
... ... @@ -155,7 +155,7 @@
155 155  
156 156 #if (HD_DELAY > 0)
157 157  
158   -#include <asm/i8253.h>
  158 +#include <linux/i8253.h>
159 159  
160 160 unsigned long last_req;
161 161  
drivers/clocksource/Kconfig
Diff comments   View file @ a99a7d1
1 1 config CLKSRC_I8253
2 2 bool
3 3  
  4 +config CLKEVT_I8253
  5 + bool
  6 +
  7 +config I8253_LOCK
  8 + bool
  9 +
  10 +config CLKBLD_I8253
  11 + def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
  12 +
4 13 config CLKSRC_MMIO
5 14 bool
drivers/clocksource/Makefile
Diff comments   View file @ a99a7d1
... ... @@ -6,6 +6,6 @@
6 6 obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o
7 7 obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o
8 8 obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
9   -obj-$(CONFIG_CLKSRC_I8253) += i8253.o
  9 +obj-$(CONFIG_CLKBLD_I8253) += i8253.o
10 10 obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
drivers/clocksource/i8253.c
Diff comments   View file @ a99a7d1
1 1 /*
2 2 * i8253 PIT clocksource
3 3 */
4   -#include <linux/clocksource.h>
  4 +#include <linux/clockchips.h>
5 5 #include <linux/init.h>
6 6 #include <linux/io.h>
7 7 #include <linux/spinlock.h>
8 8 #include <linux/timex.h>
  9 +#include <linux/module.h>
  10 +#include <linux/i8253.h>
  11 +#include <linux/smp.h>
9 12  
10   -#include <asm/i8253.h>
  13 +/*
  14 + * Protects access to I/O ports
  15 + *
  16 + * 0040-0043 : timer0, i8253 / i8254
  17 + * 0061-0061 : NMI Control Register which contains two speaker control bits.
  18 + */
  19 +DEFINE_RAW_SPINLOCK(i8253_lock);
  20 +EXPORT_SYMBOL(i8253_lock);
11 21  
  22 +#ifdef CONFIG_CLKSRC_I8253
12 23 /*
13 24 * Since the PIT overflows every tick, its not very useful
14 25 * to just read by itself. So use jiffies to emulate a free
15 26  
... ... @@ -37,15 +48,15 @@
37 48 * count), it cannot be newer.
38 49 */
39 50 jifs = jiffies;
40   - outb_pit(0x00, PIT_MODE); /* latch the count ASAP */
41   - count = inb_pit(PIT_CH0); /* read the latched count */
42   - count |= inb_pit(PIT_CH0) << 8;
  51 + outb_p(0x00, PIT_MODE); /* latch the count ASAP */
  52 + count = inb_p(PIT_CH0); /* read the latched count */
  53 + count |= inb_p(PIT_CH0) << 8;
43 54  
44 55 /* VIA686a test code... reset the latch if count > max + 1 */
45 56 if (count > LATCH) {
46   - outb_pit(0x34, PIT_MODE);
47   - outb_pit(PIT_LATCH & 0xff, PIT_CH0);
48   - outb_pit(PIT_LATCH >> 8, PIT_CH0);
  57 + outb_p(0x34, PIT_MODE);
  58 + outb_p(PIT_LATCH & 0xff, PIT_CH0);
  59 + outb_p(PIT_LATCH >> 8, PIT_CH0);
49 60 count = PIT_LATCH - 1;
50 61 }
51 62  
... ... @@ -86,4 +97,91 @@
86 97 {
87 98 return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
88 99 }
  100 +#endif
  101 +
  102 +#ifdef CONFIG_CLKEVT_I8253
  103 +/*
  104 + * Initialize the PIT timer.
  105 + *
  106 + * This is also called after resume to bring the PIT into operation again.
  107 + */
  108 +static void init_pit_timer(enum clock_event_mode mode,
  109 + struct clock_event_device *evt)
  110 +{
  111 + raw_spin_lock(&i8253_lock);
  112 +
  113 + switch (mode) {
  114 + case CLOCK_EVT_MODE_PERIODIC:
  115 + /* binary, mode 2, LSB/MSB, ch 0 */
  116 + outb_p(0x34, PIT_MODE);
  117 + outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
  118 + outb_p(LATCH >> 8 , PIT_CH0); /* MSB */
  119 + break;
  120 +
  121 + case CLOCK_EVT_MODE_SHUTDOWN:
  122 + case CLOCK_EVT_MODE_UNUSED:
  123 + if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
  124 + evt->mode == CLOCK_EVT_MODE_ONESHOT) {
  125 + outb_p(0x30, PIT_MODE);
  126 + outb_p(0, PIT_CH0);
  127 + outb_p(0, PIT_CH0);
  128 + }
  129 + break;
  130 +
  131 + case CLOCK_EVT_MODE_ONESHOT:
  132 + /* One shot setup */
  133 + outb_p(0x38, PIT_MODE);
  134 + break;
  135 +
  136 + case CLOCK_EVT_MODE_RESUME:
  137 + /* Nothing to do here */
  138 + break;
  139 + }
  140 + raw_spin_unlock(&i8253_lock);
  141 +}
  142 +
  143 +/*
  144 + * Program the next event in oneshot mode
  145 + *
  146 + * Delta is given in PIT ticks
  147 + */
  148 +static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
  149 +{
  150 + raw_spin_lock(&i8253_lock);
  151 + outb_p(delta & 0xff , PIT_CH0); /* LSB */
  152 + outb_p(delta >> 8 , PIT_CH0); /* MSB */
  153 + raw_spin_unlock(&i8253_lock);
  154 +
  155 + return 0;
  156 +}
  157 +
  158 +/*
  159 + * On UP the PIT can serve all of the possible timer functions. On SMP systems
  160 + * it can be solely used for the global tick.
  161 + */
  162 +struct clock_event_device i8253_clockevent = {
  163 + .name = "pit",
  164 + .features = CLOCK_EVT_FEAT_PERIODIC,
  165 + .set_mode = init_pit_timer,
  166 + .set_next_event = pit_next_event,
  167 +};
  168 +
  169 +/*
  170 + * Initialize the conversion factor and the min/max deltas of the clock event
  171 + * structure and register the clock event source with the framework.
  172 + */
  173 +void __init clockevent_i8253_init(bool oneshot)
  174 +{
  175 + if (oneshot)
  176 + i8253_clockevent.features |= CLOCK_EVT_FEAT_ONESHOT;
  177 + /*
  178 + * Start pit with the boot cpu mask. x86 might make it global
  179 + * when it is used as broadcast device later.
  180 + */
  181 + i8253_clockevent.cpumask = cpumask_of(smp_processor_id());
  182 +
  183 + clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,
  184 + 0xF, 0x7FFF);
  185 +}
  186 +#endif
drivers/input/gameport/gameport.c
Diff comments   View file @ a99a7d1
... ... @@ -47,7 +47,7 @@
47 47  
48 48 #if defined(__i386__)
49 49  
50   -#include <asm/i8253.h>
  50 +#include <linux/i8253.h>
51 51  
52 52 #define DELTA(x,y) ((y)-(x)+((y)<(x)?1193182/HZ:0))
53 53 #define GET_TIME(x) do { x = get_time_pit(); } while (0)
drivers/input/joystick/analog.c
Diff comments   View file @ a99a7d1
... ... @@ -136,7 +136,7 @@
136 136  
137 137 #ifdef __i386__
138 138  
139   -#include <asm/i8253.h>
  139 +#include <linux/i8253.h>
140 140  
141 141 #define GET_TIME(x) do { if (cpu_has_tsc) rdtscl(x); else x = get_time_pit(); } while (0)
142 142 #define DELTA(x,y) (cpu_has_tsc ? ((y) - (x)) : ((x) - (y) + ((x) < (y) ? CLOCK_TICK_RATE / HZ : 0)))
drivers/input/misc/pcspkr.c
Diff comments   View file @ a99a7d1
... ... @@ -14,6 +14,7 @@
14 14  
15 15 #include <linux/kernel.h>
16 16 #include <linux/module.h>
  17 +#include <linux/i8253.h>
17 18 #include <linux/init.h>
18 19 #include <linux/input.h>
19 20 #include <linux/platform_device.h>
... ... @@ -24,14 +25,6 @@
24 25 MODULE_DESCRIPTION("PC Speaker beeper driver");
25 26 MODULE_LICENSE("GPL");
26 27 MODULE_ALIAS("platform:pcspkr");
27   -
28   -#if defined(CONFIG_MIPS) || defined(CONFIG_X86)
29   -/* Use the global PIT lock ! */
30   -#include <asm/i8253.h>
31   -#else
32   -#include <asm/8253pit.h>
33   -static DEFINE_RAW_SPINLOCK(i8253_lock);
34   -#endif
35 28  
36 29 static int pcspkr_event(struct input_dev *dev, unsigned int type, unsigned int code, int value)
37 30 {
include/linux/i8253.h
Diff comments   View file @ a99a7d1
  1 +/*
  2 + * This file is subject to the terms and conditions of the GNU General Public
  3 + * License. See the file "COPYING" in the main directory of this archive
  4 + * for more details.
  5 + *
  6 + * Machine specific IO port address definition for generic.
  7 + * Written by Osamu Tomita <tomita@cinet.co.jp>
  8 + */
  9 +#ifndef __LINUX_I8253_H
  10 +#define __LINUX_I8253_H
  11 +
  12 +#include <linux/param.h>
  13 +#include <linux/spinlock.h>
  14 +#include <linux/timex.h>
  15 +
  16 +/* i8253A PIT registers */
  17 +#define PIT_MODE 0x43
  18 +#define PIT_CH0 0x40
  19 +#define PIT_CH2 0x42
  20 +
  21 +#define PIT_LATCH ((PIT_TICK_RATE + HZ/2) / HZ)
  22 +
  23 +extern raw_spinlock_t i8253_lock;
  24 +extern struct clock_event_device i8253_clockevent;
  25 +extern void clockevent_i8253_init(bool oneshot);
  26 +
  27 +extern void setup_pit_timer(void);
  28 +
  29 +#endif /* __LINUX_I8253_H */
... ... @@ -1007,13 +1007,18 @@
1007 1007 help
1008 1008 Enable support for generating core dumps. Disabling saves about 4k.
1009 1009  
  1010 +
1010 1011 config PCSPKR_PLATFORM
1011 1012 bool "Enable PC-Speaker support" if EXPERT
1012   - depends on ALPHA || X86 || MIPS || PPC_PREP || PPC_CHRP || PPC_PSERIES
  1013 + depends on HAVE_PCSPKR_PLATFORM
  1014 + select I8253_LOCK
1013 1015 default y
1014 1016 help
1015 1017 This option allows to disable the internal PC-Speaker
1016 1018 support, saving some memory.
  1019 +
  1020 +config HAVE_PCSPKR_PLATFORM
  1021 + bool
1017 1022  
1018 1023 config BASE_FULL
1019 1024 default y
sound/drivers/pcsp/pcsp.h
Diff comments   View file @ a99a7d1
... ... @@ -10,14 +10,8 @@
10 10 #define __PCSP_H__
11 11  
12 12 #include <linux/hrtimer.h>
  13 +#include <linux/i8253.h>
13 14 #include <linux/timex.h>
14   -#if defined(CONFIG_MIPS) || defined(CONFIG_X86)
15   -/* Use the global PIT lock ! */
16   -#include <asm/i8253.h>
17   -#else
18   -#include <asm/8253pit.h>
19   -static DEFINE_RAW_SPINLOCK(i8253_lock);
20   -#endif
21 15  
22 16 #define PCSP_SOUND_VERSION 0x400 /* read 4.00 */
23 17 #define PCSP_DEBUG 0