Commit ab5e59dbdb6d2e2d784381bd194e0229b8b990b5

Authored by Ido Shayevitz
Committed by Felipe Balbi
1 parent 07e7f47b6d

usb: dwc3: omap: add dwc3_omap_readl/writel functions

We separate between dwc3-omap helper functions to dwc3-core helper
functions. This will allow us to change the helper functions
implementation according to each module need.

Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Showing 1 changed file with 21 additions and 11 deletions Side-by-side Diff

drivers/usb/dwc3/dwc3-omap.c
... ... @@ -49,7 +49,6 @@
49 49 #include <linux/of.h>
50 50  
51 51 #include "core.h"
52   -#include "io.h"
53 52  
54 53 /*
55 54 * All these registers belong to OMAP's Wrapper around the
... ... @@ -143,6 +142,17 @@
143 142 u32 dma_status:1;
144 143 };
145 144  
  145 +static inline u32 dwc3_omap_readl(void __iomem *base, u32 offset)
  146 +{
  147 + return readl(base + offset);
  148 +}
  149 +
  150 +static inline void dwc3_omap_writel(void __iomem *base, u32 offset, u32 value)
  151 +{
  152 + writel(value, base + offset);
  153 +}
  154 +
  155 +
146 156 static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
147 157 {
148 158 struct dwc3_omap *omap = _omap;
... ... @@ -150,7 +160,7 @@
150 160  
151 161 spin_lock(&omap->lock);
152 162  
153   - reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_1);
  163 + reg = dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_1);
154 164  
155 165 if (reg & USBOTGSS_IRQ1_DMADISABLECLR) {
156 166 dev_dbg(omap->dev, "DMA Disable was Cleared\n");
157 167  
... ... @@ -184,10 +194,10 @@
184 194 if (reg & USBOTGSS_IRQ1_IDPULLUP_FALL)
185 195 dev_dbg(omap->dev, "IDPULLUP Fall\n");
186 196  
187   - dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_1, reg);
  197 + dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_1, reg);
188 198  
189   - reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_0);
190   - dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_0, reg);
  199 + reg = dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_0);
  200 + dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_0, reg);
191 201  
192 202 spin_unlock(&omap->lock);
193 203  
... ... @@ -270,7 +280,7 @@
270 280 omap->base = base;
271 281 omap->dwc3 = dwc3;
272 282  
273   - reg = dwc3_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS);
  283 + reg = dwc3_omap_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS);
274 284  
275 285 utmi_mode = of_get_property(node, "utmi-mode", &size);
276 286 if (utmi_mode && size == sizeof(*utmi_mode)) {
277 287  
... ... @@ -293,10 +303,10 @@
293 303 }
294 304 }
295 305  
296   - dwc3_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS, reg);
  306 + dwc3_omap_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS, reg);
297 307  
298 308 /* check the DMA Status */
299   - reg = dwc3_readl(omap->base, USBOTGSS_SYSCONFIG);
  309 + reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG);
300 310 omap->dma_status = !!(reg & USBOTGSS_SYSCONFIG_DMADISABLE);
301 311  
302 312 /* Set No-Idle and No-Standby */
... ... @@ -306,7 +316,7 @@
306 316 reg |= (USBOTGSS_SYSCONFIG_STANDBYMODE(USBOTGSS_STANDBYMODE_NO_STANDBY)
307 317 | USBOTGSS_SYSCONFIG_IDLEMODE(USBOTGSS_IDLEMODE_NO_IDLE));
308 318  
309   - dwc3_writel(omap->base, USBOTGSS_SYSCONFIG, reg);
  319 + dwc3_omap_writel(omap->base, USBOTGSS_SYSCONFIG, reg);
310 320  
311 321 ret = devm_request_irq(dev, omap->irq, dwc3_omap_interrupt, 0,
312 322 "dwc3-omap", omap);
... ... @@ -318,7 +328,7 @@
318 328  
319 329 /* enable all IRQs */
320 330 reg = USBOTGSS_IRQO_COREIRQ_ST;
321   - dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_0, reg);
  331 + dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_0, reg);
322 332  
323 333 reg = (USBOTGSS_IRQ1_OEVT |
324 334 USBOTGSS_IRQ1_DRVVBUS_RISE |
... ... @@ -330,7 +340,7 @@
330 340 USBOTGSS_IRQ1_DISCHRGVBUS_FALL |
331 341 USBOTGSS_IRQ1_IDPULLUP_FALL);
332 342  
333   - dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg);
  343 + dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg);
334 344  
335 345 ret = platform_device_add_resources(dwc3, pdev->resource,
336 346 pdev->num_resources);