Commit aeb8eede8ef5e22a2e7658c3f4e0629b4e5c1265
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "A number of fixes all across the MIPS tree. No area is particularly standing out and things have cooled down quite nicely for a release." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Function tracer: Fix broken function tracing mips: Move __virt_addr_valid() to a place for MIPS 64 MIPS: Netlogic: Fix UP compilation on XLR MIPS: AR71xx: Fix AR71XX_PCI_MEM_SIZE MIPS: AR724x: Fix AR724X_PCI_MEM_SIZE MIPS: Lantiq: Fix cp0_perfcount_irq mapping MIPS: DSP: Fix DSP mask for registers. MIPS: Fix build failure by adding definition of pfn_pmd(). MIPS: Octeon: Fix warning. MIPS: delay.c: Check BITS_PER_LONG instead of __SIZEOF_LONG__ MIPS: PNX833x: Fix comment. MIPS: Add struct p_format to union mips_instruction. MIPS: Export <asm/break.h>. MIPS: BCM47xx: Enable SSB prerequisite SSB_DRIVER_PCICORE. MIPS: BCM47xx: Select GPIOLIB for BCMA on bcm47xx platform MIPS: vpe.c: Fix null pointer dereference in print arguments.
Showing 19 changed files Side-by-side Diff
- arch/mips/bcm47xx/Kconfig
- arch/mips/cavium-octeon/executive/cvmx-l2c.c
- arch/mips/include/asm/break.h
- arch/mips/include/asm/dsp.h
- arch/mips/include/asm/inst.h
- arch/mips/include/asm/mach-pnx833x/war.h
- arch/mips/include/asm/pgtable-64.h
- arch/mips/include/uapi/asm/Kbuild
- arch/mips/include/uapi/asm/break.h
- arch/mips/kernel/ftrace.c
- arch/mips/kernel/mcount.S
- arch/mips/kernel/vpe.c
- arch/mips/lantiq/irq.c
- arch/mips/lib/delay.c
- arch/mips/mm/ioremap.c
- arch/mips/mm/mmap.c
- arch/mips/netlogic/xlr/setup.c
- arch/mips/pci/pci-ar71xx.c
- arch/mips/pci/pci-ar724x.c
arch/mips/bcm47xx/Kconfig
... | ... | @@ -8,8 +8,10 @@ |
8 | 8 | select SSB_DRIVER_EXTIF |
9 | 9 | select SSB_EMBEDDED |
10 | 10 | select SSB_B43_PCI_BRIDGE if PCI |
11 | + select SSB_DRIVER_PCICORE if PCI | |
11 | 12 | select SSB_PCICORE_HOSTMODE if PCI |
12 | 13 | select SSB_DRIVER_GPIO |
14 | + select GPIOLIB | |
13 | 15 | default y |
14 | 16 | help |
15 | 17 | Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. |
... | ... | @@ -25,6 +27,7 @@ |
25 | 27 | select BCMA_HOST_PCI if PCI |
26 | 28 | select BCMA_DRIVER_PCI_HOSTMODE if PCI |
27 | 29 | select BCMA_DRIVER_GPIO |
30 | + select GPIOLIB | |
28 | 31 | default y |
29 | 32 | help |
30 | 33 | Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus. |
arch/mips/cavium-octeon/executive/cvmx-l2c.c
... | ... | @@ -30,6 +30,7 @@ |
30 | 30 | * measurement, and debugging facilities. |
31 | 31 | */ |
32 | 32 | |
33 | +#include <linux/compiler.h> | |
33 | 34 | #include <linux/irqflags.h> |
34 | 35 | #include <asm/octeon/cvmx.h> |
35 | 36 | #include <asm/octeon/cvmx-l2c.h> |
36 | 37 | |
37 | 38 | |
... | ... | @@ -285,22 +286,22 @@ |
285 | 286 | */ |
286 | 287 | static void fault_in(uint64_t addr, int len) |
287 | 288 | { |
288 | - volatile char *ptr; | |
289 | - volatile char dummy; | |
289 | + char *ptr; | |
290 | + | |
290 | 291 | /* |
291 | 292 | * Adjust addr and length so we get all cache lines even for |
292 | 293 | * small ranges spanning two cache lines. |
293 | 294 | */ |
294 | 295 | len += addr & CVMX_CACHE_LINE_MASK; |
295 | 296 | addr &= ~CVMX_CACHE_LINE_MASK; |
296 | - ptr = (volatile char *)cvmx_phys_to_ptr(addr); | |
297 | + ptr = cvmx_phys_to_ptr(addr); | |
297 | 298 | /* |
298 | 299 | * Invalidate L1 cache to make sure all loads result in data |
299 | 300 | * being in L2. |
300 | 301 | */ |
301 | 302 | CVMX_DCACHE_INVALIDATE; |
302 | 303 | while (len > 0) { |
303 | - dummy += *ptr; | |
304 | + ACCESS_ONCE(*ptr); | |
304 | 305 | len -= CVMX_CACHE_LINE_SIZE; |
305 | 306 | ptr += CVMX_CACHE_LINE_SIZE; |
306 | 307 | } |
arch/mips/include/asm/break.h
1 | -/* | |
2 | - * This file is subject to the terms and conditions of the GNU General Public | |
3 | - * License. See the file "COPYING" in the main directory of this archive | |
4 | - * for more details. | |
5 | - * | |
6 | - * Copyright (C) 1995, 2003 by Ralf Baechle | |
7 | - * Copyright (C) 1999 Silicon Graphics, Inc. | |
8 | - */ | |
9 | -#ifndef __ASM_BREAK_H | |
10 | -#define __ASM_BREAK_H | |
11 | - | |
12 | -/* | |
13 | - * The following break codes are or were in use for specific purposes in | |
14 | - * other MIPS operating systems. Linux/MIPS doesn't use all of them. The | |
15 | - * unused ones are here as placeholders; we might encounter them in | |
16 | - * non-Linux/MIPS object files or make use of them in the future. | |
17 | - */ | |
18 | -#define BRK_USERBP 0 /* User bp (used by debuggers) */ | |
19 | -#define BRK_KERNELBP 1 /* Break in the kernel */ | |
20 | -#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */ | |
21 | -#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */ | |
22 | -#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */ | |
23 | -#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */ | |
24 | -#define BRK_OVERFLOW 6 /* Overflow check */ | |
25 | -#define BRK_DIVZERO 7 /* Divide by zero check */ | |
26 | -#define BRK_RANGE 8 /* Range error check */ | |
27 | -#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */ | |
28 | -#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */ | |
29 | -#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */ | |
30 | -#define BRK_BUG 512 /* Used by BUG() */ | |
31 | -#define BRK_KDB 513 /* Used in KDB_ENTER() */ | |
32 | -#define BRK_MEMU 514 /* Used by FPU emulator */ | |
33 | -#define BRK_KPROBE_BP 515 /* Kprobe break */ | |
34 | -#define BRK_KPROBE_SSTEPBP 516 /* Kprobe single step software implementation */ | |
35 | -#define BRK_MULOVF 1023 /* Multiply overflow */ | |
36 | - | |
37 | -#endif /* __ASM_BREAK_H */ |
arch/mips/include/asm/dsp.h
arch/mips/include/asm/inst.h
arch/mips/include/asm/mach-pnx833x/war.h
arch/mips/include/asm/pgtable-64.h
... | ... | @@ -230,6 +230,7 @@ |
230 | 230 | #else |
231 | 231 | #define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) |
232 | 232 | #define pfn_pte(pfn, prot) __pte(((pfn) << _PFN_SHIFT) | pgprot_val(prot)) |
233 | +#define pfn_pmd(pfn, prot) __pmd(((pfn) << _PFN_SHIFT) | pgprot_val(prot)) | |
233 | 234 | #endif |
234 | 235 | |
235 | 236 | #define __pgd_offset(address) pgd_index(address) |
arch/mips/include/uapi/asm/Kbuild
arch/mips/include/uapi/asm/break.h
1 | +/* | |
2 | + * This file is subject to the terms and conditions of the GNU General Public | |
3 | + * License. See the file "COPYING" in the main directory of this archive | |
4 | + * for more details. | |
5 | + * | |
6 | + * Copyright (C) 1995, 2003 by Ralf Baechle | |
7 | + * Copyright (C) 1999 Silicon Graphics, Inc. | |
8 | + */ | |
9 | +#ifndef __ASM_BREAK_H | |
10 | +#define __ASM_BREAK_H | |
11 | + | |
12 | +/* | |
13 | + * The following break codes are or were in use for specific purposes in | |
14 | + * other MIPS operating systems. Linux/MIPS doesn't use all of them. The | |
15 | + * unused ones are here as placeholders; we might encounter them in | |
16 | + * non-Linux/MIPS object files or make use of them in the future. | |
17 | + */ | |
18 | +#define BRK_USERBP 0 /* User bp (used by debuggers) */ | |
19 | +#define BRK_KERNELBP 1 /* Break in the kernel */ | |
20 | +#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */ | |
21 | +#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */ | |
22 | +#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */ | |
23 | +#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */ | |
24 | +#define BRK_OVERFLOW 6 /* Overflow check */ | |
25 | +#define BRK_DIVZERO 7 /* Divide by zero check */ | |
26 | +#define BRK_RANGE 8 /* Range error check */ | |
27 | +#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */ | |
28 | +#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */ | |
29 | +#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */ | |
30 | +#define BRK_BUG 512 /* Used by BUG() */ | |
31 | +#define BRK_KDB 513 /* Used in KDB_ENTER() */ | |
32 | +#define BRK_MEMU 514 /* Used by FPU emulator */ | |
33 | +#define BRK_KPROBE_BP 515 /* Kprobe break */ | |
34 | +#define BRK_KPROBE_SSTEPBP 516 /* Kprobe single step software implementation */ | |
35 | +#define BRK_MULOVF 1023 /* Multiply overflow */ | |
36 | + | |
37 | +#endif /* __ASM_BREAK_H */ |
arch/mips/kernel/ftrace.c
... | ... | @@ -25,6 +25,12 @@ |
25 | 25 | #define MCOUNT_OFFSET_INSNS 4 |
26 | 26 | #endif |
27 | 27 | |
28 | +/* Arch override because MIPS doesn't need to run this from stop_machine() */ | |
29 | +void arch_ftrace_update_code(int command) | |
30 | +{ | |
31 | + ftrace_modify_all_code(command); | |
32 | +} | |
33 | + | |
28 | 34 | /* |
29 | 35 | * Check if the address is in kernel space |
30 | 36 | * |
... | ... | @@ -89,6 +95,24 @@ |
89 | 95 | return 0; |
90 | 96 | } |
91 | 97 | |
98 | +#ifndef CONFIG_64BIT | |
99 | +static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1, | |
100 | + unsigned int new_code2) | |
101 | +{ | |
102 | + int faulted; | |
103 | + | |
104 | + safe_store_code(new_code1, ip, faulted); | |
105 | + if (unlikely(faulted)) | |
106 | + return -EFAULT; | |
107 | + ip += 4; | |
108 | + safe_store_code(new_code2, ip, faulted); | |
109 | + if (unlikely(faulted)) | |
110 | + return -EFAULT; | |
111 | + flush_icache_range(ip, ip + 8); /* original ip + 12 */ | |
112 | + return 0; | |
113 | +} | |
114 | +#endif | |
115 | + | |
92 | 116 | /* |
93 | 117 | * The details about the calling site of mcount on MIPS |
94 | 118 | * |
95 | 119 | |
... | ... | @@ -131,8 +155,18 @@ |
131 | 155 | * needed. |
132 | 156 | */ |
133 | 157 | new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F; |
134 | - | |
158 | +#ifdef CONFIG_64BIT | |
135 | 159 | return ftrace_modify_code(ip, new); |
160 | +#else | |
161 | + /* | |
162 | + * On 32 bit MIPS platforms, gcc adds a stack adjust | |
163 | + * instruction in the delay slot after the branch to | |
164 | + * mcount and expects mcount to restore the sp on return. | |
165 | + * This is based on a legacy API and does nothing but | |
166 | + * waste instructions so it's being removed at runtime. | |
167 | + */ | |
168 | + return ftrace_modify_code_2(ip, new, INSN_NOP); | |
169 | +#endif | |
136 | 170 | } |
137 | 171 | |
138 | 172 | int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) |
arch/mips/kernel/mcount.S
... | ... | @@ -46,9 +46,8 @@ |
46 | 46 | PTR_L a5, PT_R9(sp) |
47 | 47 | PTR_L a6, PT_R10(sp) |
48 | 48 | PTR_L a7, PT_R11(sp) |
49 | - PTR_ADDIU sp, PT_SIZE | |
50 | 49 | #else |
51 | - PTR_ADDIU sp, (PT_SIZE + 8) | |
50 | + PTR_ADDIU sp, PT_SIZE | |
52 | 51 | #endif |
53 | 52 | .endm |
54 | 53 | |
... | ... | @@ -69,7 +68,9 @@ |
69 | 68 | .globl _mcount |
70 | 69 | _mcount: |
71 | 70 | b ftrace_stub |
72 | - nop | |
71 | + addiu sp,sp,8 | |
72 | + | |
73 | + /* When tracing is activated, it calls ftrace_caller+8 (aka here) */ | |
73 | 74 | lw t1, function_trace_stop |
74 | 75 | bnez t1, ftrace_stub |
75 | 76 | nop |
arch/mips/kernel/vpe.c
arch/mips/lantiq/irq.c
arch/mips/lib/delay.c
arch/mips/mm/ioremap.c
arch/mips/mm/mmap.c
arch/mips/netlogic/xlr/setup.c
... | ... | @@ -193,8 +193,11 @@ |
193 | 193 | |
194 | 194 | void __init prom_init(void) |
195 | 195 | { |
196 | - int i, *argv, *envp; /* passed as 32 bit ptrs */ | |
196 | + int *argv, *envp; /* passed as 32 bit ptrs */ | |
197 | 197 | struct psb_info *prom_infop; |
198 | +#ifdef CONFIG_SMP | |
199 | + int i; | |
200 | +#endif | |
198 | 201 | |
199 | 202 | /* truncate to 32 bit and sign extend all args */ |
200 | 203 | argv = (int *)(long)(int)fw_arg1; |
arch/mips/pci/pci-ar71xx.c
arch/mips/pci/pci-ar724x.c