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Commit b3c004542229099e18198061c737e13eafc8d4d6

Authored by Kenji Kaneshige
Committed by Jesse Barnes
1 parent 0027cb3e19
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

PCI: pciehp: wait 100 ms after Link Training check 

If the port supports Link speeds greater than 5.0 GT/s, we must wait
for 100 ms after Link training completes before sending configuration
request.

Acked-by: Yinghai Lu <yinghai@kernel.org>
Tested-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Showing 1 changed file with 8 additions and 0 deletions Side-by-side Diff

drivers/pci/hotplug/pciehp_hpc.c
Diff comments   View file @ b3c0045
... ... @@ -302,6 +302,14 @@
302 302 return retval;
303 303 }
304 304  
  305 + /*
  306 + * If the port supports Link speeds greater than 5.0 GT/s, we
  307 + * must wait for 100 ms after Link training completes before
  308 + * sending configuration request.
  309 + */
  310 + if (ctrl->pcie->port->subordinate->max_bus_speed > PCIE_SPEED_5_0GT)
  311 + msleep(100);
  312 +
305 313 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
306 314  
307 315 return retval;