Commit b65a75b8c91c0f05047399401407371678fe9549

Authored by Ralf Baechle
1 parent 60724ca59e

MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 1 changed file with 24 additions and 11 deletions Side-by-side Diff

arch/mips/lib/csum_partial.S
... ... @@ -270,13 +270,20 @@
270 270 #endif
271 271  
272 272 /* odd buffer alignment? */
273   - beqz t7, 1f
274   - nop
275   - sll v1, sum, 8
  273 +#ifdef CPU_MIPSR2
  274 + wsbh v1, sum
  275 + movn sum, v1, t7
  276 +#else
  277 + beqz t7, 1f /* odd buffer alignment? */
  278 + lui v1, 0x00ff
  279 + addu v1, 0x00ff
  280 + and t0, sum, v1
  281 + sll t0, t0, 8
276 282 srl sum, sum, 8
277   - or sum, v1
278   - andi sum, 0xffff
  283 + and sum, sum, v1
  284 + or sum, sum, t0
279 285 1:
  286 +#endif
280 287 .set reorder
281 288 /* Add the passed partial csum. */
282 289 ADDC32(sum, a2)
283 290  
284 291  
... ... @@ -663,14 +670,20 @@
663 670 addu sum, v1
664 671 #endif
665 672  
666   - /* odd buffer alignment? */
667   - beqz odd, 1f
668   - nop
669   - sll v1, sum, 8
  673 +#ifdef CPU_MIPSR2
  674 + wsbh v1, sum
  675 + movn sum, v1, odd
  676 +#else
  677 + beqz odd, 1f /* odd buffer alignment? */
  678 + lui v1, 0x00ff
  679 + addu v1, 0x00ff
  680 + and t0, sum, v1
  681 + sll t0, t0, 8
670 682 srl sum, sum, 8
671   - or sum, v1
672   - andi sum, 0xffff
  683 + and sum, sum, v1
  684 + or sum, sum, t0
673 685 1:
  686 +#endif
674 687 .set reorder
675 688 ADDC32(sum, psum)
676 689 jr ra