[POWERPC] Refactor DCR code

Previously, DCR support was configured at compile time to either use MMIO or native dcr instructions. Although this works for most platforms, it fails on FPGA platforms: 1) Systems may include more than one DCR bus. 2) Systems may be native DCR capable and still use memory mapped DCR interface. This patch provides runtime support based on the device trees for the case where CONFIG_PPC_DCR_MMIO and CONFIG_PPC_DCR_NATIVE are both selected. Previously, this was a poorly defined configuration, which happened to provide NATIVE support. The runtime selection is made based on the dcr-controller having a 'dcr-access-method' attribute in the device tree. If only one of the above options is selected, then the code uses #defines to select only the used code in order to avoid introducing overhead in existing usage. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

[POWERPC] Refactor DCR code
Previously, DCR support was configured at compile time to either use MMIO or native dcr instructions. Although this works for most platforms, it fails on FPGA platforms: 1) Systems may include more than one DCR bus. 2) Systems may be native DCR capable and still use memory mapped DCR interface. This patch provides runtime support based on the device trees for the case where CONFIG_PPC_DCR_MMIO and CONFIG_PPC_DCR_NATIVE are both selected. Previously, this was a poorly defined configuration, which happened to provide NATIVE support. The runtime selection is made based on the dcr-controller having a 'dcr-access-method' attribute in the device tree. If only one of the above options is selected, then the code uses #defines to select only the used code in order to avoid introducing overhead in existing usage. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Stephen Neuendorffer · Josh Boyer
1 parent acf464817d
Showing 5 changed files with 231 additions and 47 deletions Side-by-side Diff
arch/powerpc/sysdev/dcr.c
include/asm-powerpc/dcr-generic.h
include/asm-powerpc/dcr-mmio.h
include/asm-powerpc/dcr-native.h
include/asm-powerpc/dcr.h
@@ -23,6 +23,105 @@
 #include <asm/prom.h>
 #include <asm/dcr.h>
  
+static struct device_node *find_dcr_parent(struct device_node *node)
+{
+	struct device_node *par, *tmp;
+	const u32 *p;
+
+	for (par = of_node_get(node); par;) {
+		if (of_get_property(par, "dcr-controller", NULL))
+			break;
+		p = of_get_property(par, "dcr-parent", NULL);
+		tmp = par;
+		if (p == NULL)
+			par = of_get_parent(par);
+		else
+			par = of_find_node_by_phandle(*p);
+		of_node_put(tmp);
+	}
+	return par;
+}
+
+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
+
+bool dcr_map_ok_generic(dcr_host_t host)
+{
+	if (host.type == DCR_HOST_NATIVE)
+		return dcr_map_ok_native(host.host.native);
+	else if (host.type == DCR_HOST_MMIO)
+		return dcr_map_ok_mmio(host.host.mmio);
+	else
+		return 0;
+}
+EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
+
+dcr_host_t dcr_map_generic(struct device_node *dev,
+			   unsigned int dcr_n,
+			   unsigned int dcr_c)
+{
+	dcr_host_t host;
+	struct device_node *dp;
+	const char *prop;
+
+	host.type = DCR_HOST_INVALID;
+
+	dp = find_dcr_parent(dev);
+	if (dp == NULL)
+		return host;
+
+	prop = of_get_property(dp, "dcr-access-method", NULL);
+
+	pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);
+
+	if (!strcmp(prop, "native")) {
+		host.type = DCR_HOST_NATIVE;
+		host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
+	} else if (!strcmp(prop, "mmio")) {
+		host.type = DCR_HOST_MMIO;
+		host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
+	}
+
+	of_node_put(dp);
+	return host;
+}
+EXPORT_SYMBOL_GPL(dcr_map_generic);
+
+void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
+{
+	if (host.type == DCR_HOST_NATIVE)
+		dcr_unmap_native(host.host.native, dcr_c);
+	else if (host.type == DCR_HOST_MMIO)
+		dcr_unmap_mmio(host.host.mmio, dcr_c);
+	else /* host.type == DCR_HOST_INVALID */
+		WARN_ON(true);
+}
+EXPORT_SYMBOL_GPL(dcr_unmap_generic);
+
+u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)
+{
+	if (host.type == DCR_HOST_NATIVE)
+		return dcr_read_native(host.host.native, dcr_n);
+	else if (host.type == DCR_HOST_MMIO)
+		return dcr_read_mmio(host.host.mmio, dcr_n);
+	else /* host.type == DCR_HOST_INVALID */
+		WARN_ON(true);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(dcr_read_generic);
+
+void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)
+{
+	if (host.type == DCR_HOST_NATIVE)
+		dcr_write_native(host.host.native, dcr_n, value);
+	else if (host.type == DCR_HOST_MMIO)
+		dcr_write_mmio(host.host.mmio, dcr_n, value);
+	else /* host.type == DCR_HOST_INVALID */
+		WARN_ON(true);
+}
+EXPORT_SYMBOL_GPL(dcr_write_generic);
+
+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
+
 unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
 {
 	unsigned int ds;
  
@@ -47,27 +146,8 @@
 }
 EXPORT_SYMBOL_GPL(dcr_resource_len);
  
-#ifndef CONFIG_PPC_DCR_NATIVE
+#ifdef CONFIG_PPC_DCR_MMIO
  
-static struct device_node * find_dcr_parent(struct device_node * node)
-{
-	struct device_node *par, *tmp;
-	const u32 *p;
-
-	for (par = of_node_get(node); par;) {
-		if (of_get_property(par, "dcr-controller", NULL))
-			break;
-		p = of_get_property(par, "dcr-parent", NULL);
-		tmp = par;
-		if (p == NULL)
-			par = of_get_parent(par);
-		else
-			par = of_find_node_by_phandle(*p);
-		of_node_put(tmp);
-	}
-	return par;
-}
-
 u64 of_translate_dcr_address(struct device_node *dev,
 			     unsigned int dcr_n,
 			     unsigned int *out_stride)
@@ -75,7 +155,7 @@
 	struct device_node *dp;
 	const u32 *p;
 	unsigned int stride;
-	u64 ret;
+	u64 ret = OF_BAD_ADDR;
  
 	dp = find_dcr_parent(dev);
 	if (dp == NULL)
@@ -90,7 +170,7 @@
 	if (p == NULL)
 		p = of_get_property(dp, "dcr-mmio-space", NULL);
 	if (p == NULL)
-		return OF_BAD_ADDR;
+		goto done;
  
 	/* Maybe could do some better range checking here */
 	ret = of_translate_address(dp, p);
  
  
  
@@ -98,21 +178,25 @@
 		ret += (u64)(stride) * (u64)dcr_n;
 	if (out_stride)
 		*out_stride = stride;
+
+ done:
+	of_node_put(dp);
 	return ret;
 }
  
-dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
-		   unsigned int dcr_c)
+dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
+			     unsigned int dcr_n,
+			     unsigned int dcr_c)
 {
-	dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
+	dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
 	u64 addr;
  
 	pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
 		 dev->full_name, dcr_n, dcr_c);
  
 	addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
-	pr_debug("translates to addr: 0x%lx, stride: 0x%x\n",
-		 addr, ret.stride);
+	pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",
+		 (unsigned long long) addr, ret.stride);
 	if (addr == OF_BAD_ADDR)
 		return ret;
 	pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
  
  
@@ -124,11 +208,11 @@
 	ret.token -= dcr_n * ret.stride;
 	return ret;
 }
-EXPORT_SYMBOL_GPL(dcr_map);
+EXPORT_SYMBOL_GPL(dcr_map_mmio);
  
-void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
+void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)
 {
-	dcr_host_t h = host;
+	dcr_host_mmio_t h = host;
  
 	if (h.token == NULL)
 		return;
  
@@ -136,8 +220,11 @@
 	iounmap(h.token);
 	h.token = NULL;
 }
-EXPORT_SYMBOL_GPL(dcr_unmap);
-#else	/* defined(CONFIG_PPC_DCR_NATIVE) */
+EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
+
+#endif /* defined(CONFIG_PPC_DCR_MMIO) */
+
+#ifdef CONFIG_PPC_DCR_NATIVE
 DEFINE_SPINLOCK(dcr_ind_lock);
-#endif	/* !defined(CONFIG_PPC_DCR_NATIVE) */
+#endif	/* defined(CONFIG_PPC_DCR_NATIVE) */
+/*
+ * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
+ *                    <benh@kernel.crashing.org>
+ *
+ *   This program is free software;  you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY;  without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ *   the GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program;  if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef _ASM_POWERPC_DCR_GENERIC_H
+#define _ASM_POWERPC_DCR_GENERIC_H
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID};
+
+typedef struct {
+	enum host_type_t type;
+	union {
+		dcr_host_mmio_t mmio;
+		dcr_host_native_t native;
+	} host;
+} dcr_host_t;
+
+extern bool dcr_map_ok_generic(dcr_host_t host);
+
+extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n,
+			  unsigned int dcr_c);
+extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c);
+
+extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n);
+
+extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_DCR_GENERIC_H */
@@ -27,20 +27,26 @@
 	void __iomem *token;
 	unsigned int stride;
 	unsigned int base;
-} dcr_host_t;
+} dcr_host_mmio_t;
  
-#define DCR_MAP_OK(host)	((host).token != NULL)
+static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host)
+{
+	return host.token != NULL;
+}
  
-extern dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
-			  unsigned int dcr_c);
-extern void dcr_unmap(dcr_host_t host, unsigned int dcr_c);
+extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
+				    unsigned int dcr_n,
+				    unsigned int dcr_c);
+extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c);
  
-static inline u32 dcr_read(dcr_host_t host, unsigned int dcr_n)
+static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n)
 {
 	return in_be32(host.token + ((host.base + dcr_n) * host.stride));
 }
  
-static inline void dcr_write(dcr_host_t host, unsigned int dcr_n, u32 value)
+static inline void dcr_write_mmio(dcr_host_mmio_t host,
+				  unsigned int dcr_n,
+				  u32 value)
 {
 	out_be32(host.token + ((host.base + dcr_n) * host.stride), value);
 }
@@ -26,14 +26,18 @@
  
 typedef struct {
 	unsigned int base;
-} dcr_host_t;
+} dcr_host_native_t;
  
-#define DCR_MAP_OK(host)	(1)
+static inline bool dcr_map_ok_native(dcr_host_native_t host)
+{
+	return 1;
+}
  
-#define dcr_map(dev, dcr_n, dcr_c)	((dcr_host_t){ .base = (dcr_n) })
-#define dcr_unmap(host, dcr_c)		do {} while (0)
-#define dcr_read(host, dcr_n)		mfdcr(dcr_n + host.base)
-#define dcr_write(host, dcr_n, value)	mtdcr(dcr_n + host.base, value)
+#define dcr_map_native(dev, dcr_n, dcr_c) \
+	((dcr_host_native_t){ .base = (dcr_n) })
+#define dcr_unmap_native(host, dcr_c)		do {} while (0)
+#define dcr_read_native(host, dcr_n)		mfdcr(dcr_n + host.base)
+#define dcr_write_native(host, dcr_n, value)	mtdcr(dcr_n + host.base, value)
  
 /* Device Control Registers */
 void __mtdcr(int reg, unsigned int val);
@@ -20,14 +20,50 @@
 #ifndef _ASM_POWERPC_DCR_H
 #define _ASM_POWERPC_DCR_H
 #ifdef __KERNEL__
+#ifndef __ASSEMBLY__
 #ifdef CONFIG_PPC_DCR
  
 #ifdef CONFIG_PPC_DCR_NATIVE
 #include <asm/dcr-native.h>
-#else
+#endif
+
+#ifdef CONFIG_PPC_DCR_MMIO
 #include <asm/dcr-mmio.h>
 #endif
  
+
+/* Indirection layer for providing both NATIVE and MMIO support. */
+
+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
+
+#include <asm/dcr-generic.h>
+
+#define DCR_MAP_OK(host)	dcr_map_ok_generic(host)
+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c)
+#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c)
+#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n)
+#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value)
+
+#else
+
+#ifdef CONFIG_PPC_DCR_NATIVE
+typedef dcr_host_native_t dcr_host_t;
+#define DCR_MAP_OK(host)	dcr_map_ok_native(host)
+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c)
+#define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c)
+#define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n)
+#define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value)
+#else
+typedef dcr_host_mmio_t dcr_host_t;
+#define DCR_MAP_OK(host)	dcr_map_ok_mmio(host)
+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c)
+#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c)
+#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n)
+#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value)
+#endif
+
+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
+
 /*
  * On CONFIG_PPC_MERGE, we have additional helpers to read the DCR
  * base from the device-tree
@@ -41,6 +77,7 @@
 #endif /* CONFIG_PPC_MERGE */
  
 #endif /* CONFIG_PPC_DCR */
+#endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_DCR_H */
...	...	@@ -23,6 +23,105 @@
23	23	#include <asm/prom.h>
24	24	#include <asm/dcr.h>
25	25
	26	+static struct device_node find_dcr_parent(struct device_node node)
	27	+{
	28	+ struct device_node par, tmp;
	29	+ const u32 *p;
	30	+
	31	+ for (par = of_node_get(node); par;) {
	32	+ if (of_get_property(par, "dcr-controller", NULL))
	33	+ break;
	34	+ p = of_get_property(par, "dcr-parent", NULL);
	35	+ tmp = par;
	36	+ if (p == NULL)
	37	+ par = of_get_parent(par);
	38	+ else
	39	+ par = of_find_node_by_phandle(*p);
	40	+ of_node_put(tmp);
	41	+ }
	42	+ return par;
	43	+}
	44	+
	45	+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
	46	+
	47	+bool dcr_map_ok_generic(dcr_host_t host)
	48	+{
	49	+ if (host.type == DCR_HOST_NATIVE)
	50	+ return dcr_map_ok_native(host.host.native);
	51	+ else if (host.type == DCR_HOST_MMIO)
	52	+ return dcr_map_ok_mmio(host.host.mmio);
	53	+ else
	54	+ return 0;
	55	+}
	56	+EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
	57	+
	58	+dcr_host_t dcr_map_generic(struct device_node *dev,
	59	+ unsigned int dcr_n,
	60	+ unsigned int dcr_c)
	61	+{
	62	+ dcr_host_t host;
	63	+ struct device_node *dp;
	64	+ const char *prop;
	65	+
	66	+ host.type = DCR_HOST_INVALID;
	67	+
	68	+ dp = find_dcr_parent(dev);
	69	+ if (dp == NULL)
	70	+ return host;
	71	+
	72	+ prop = of_get_property(dp, "dcr-access-method", NULL);
	73	+
	74	+ pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);
	75	+
	76	+ if (!strcmp(prop, "native")) {
	77	+ host.type = DCR_HOST_NATIVE;
	78	+ host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
	79	+ } else if (!strcmp(prop, "mmio")) {
	80	+ host.type = DCR_HOST_MMIO;
	81	+ host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
	82	+ }
	83	+
	84	+ of_node_put(dp);
	85	+ return host;
	86	+}
	87	+EXPORT_SYMBOL_GPL(dcr_map_generic);
	88	+
	89	+void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
	90	+{
	91	+ if (host.type == DCR_HOST_NATIVE)
	92	+ dcr_unmap_native(host.host.native, dcr_c);
	93	+ else if (host.type == DCR_HOST_MMIO)
	94	+ dcr_unmap_mmio(host.host.mmio, dcr_c);
	95	+ else /* host.type == DCR_HOST_INVALID */
	96	+ WARN_ON(true);
	97	+}
	98	+EXPORT_SYMBOL_GPL(dcr_unmap_generic);
	99	+
	100	+u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)
	101	+{
	102	+ if (host.type == DCR_HOST_NATIVE)
	103	+ return dcr_read_native(host.host.native, dcr_n);
	104	+ else if (host.type == DCR_HOST_MMIO)
	105	+ return dcr_read_mmio(host.host.mmio, dcr_n);
	106	+ else /* host.type == DCR_HOST_INVALID */
	107	+ WARN_ON(true);
	108	+ return 0;
	109	+}
	110	+EXPORT_SYMBOL_GPL(dcr_read_generic);
	111	+
	112	+void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)
	113	+{
	114	+ if (host.type == DCR_HOST_NATIVE)
	115	+ dcr_write_native(host.host.native, dcr_n, value);
	116	+ else if (host.type == DCR_HOST_MMIO)
	117	+ dcr_write_mmio(host.host.mmio, dcr_n, value);
	118	+ else /* host.type == DCR_HOST_INVALID */
	119	+ WARN_ON(true);
	120	+}
	121	+EXPORT_SYMBOL_GPL(dcr_write_generic);
	122	+
	123	+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
	124	+
26	125	unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
27	126	{
28	127	unsigned int ds;
29	128
...	...	@@ -47,27 +146,8 @@
47	146	}
48	147	EXPORT_SYMBOL_GPL(dcr_resource_len);
49	148
50		-#ifndef CONFIG_PPC_DCR_NATIVE
	149	+#ifdef CONFIG_PPC_DCR_MMIO
51	150
52		-static struct device_node * find_dcr_parent(struct device_node * node)
53		-{
54		- struct device_node par, tmp;
55		- const u32 *p;
56		-
57		- for (par = of_node_get(node); par;) {
58		- if (of_get_property(par, "dcr-controller", NULL))
59		- break;
60		- p = of_get_property(par, "dcr-parent", NULL);
61		- tmp = par;
62		- if (p == NULL)
63		- par = of_get_parent(par);
64		- else
65		- par = of_find_node_by_phandle(*p);
66		- of_node_put(tmp);
67		- }
68		- return par;
69		-}
70		-
71	151	u64 of_translate_dcr_address(struct device_node *dev,
72	152	unsigned int dcr_n,
73	153	unsigned int *out_stride)
...	...	@@ -75,7 +155,7 @@
75	155	struct device_node *dp;
76	156	const u32 *p;
77	157	unsigned int stride;
78		- u64 ret;
	158	+ u64 ret = OF_BAD_ADDR;
79	159
80	160	dp = find_dcr_parent(dev);
81	161	if (dp == NULL)
...	...	@@ -90,7 +170,7 @@
90	170	if (p == NULL)
91	171	p = of_get_property(dp, "dcr-mmio-space", NULL);
92	172	if (p == NULL)
93		- return OF_BAD_ADDR;
	173	+ goto done;
94	174
95	175	/* Maybe could do some better range checking here */
96	176	ret = of_translate_address(dp, p);
97	177
98	178
99	179
...	...	@@ -98,21 +178,25 @@
98	178	ret += (u64)(stride) * (u64)dcr_n;
99	179	if (out_stride)
100	180	*out_stride = stride;
	181	+
	182	+ done:
	183	+ of_node_put(dp);
101	184	return ret;
102	185	}
103	186
104		-dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
105		- unsigned int dcr_c)
	187	+dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
	188	+ unsigned int dcr_n,
	189	+ unsigned int dcr_c)
106	190	{
107		- dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
	191	+ dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
108	192	u64 addr;
109	193
110	194	pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
111	195	dev->full_name, dcr_n, dcr_c);
112	196
113	197	addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
114		- pr_debug("translates to addr: 0x%lx, stride: 0x%x\n",
115		- addr, ret.stride);
	198	+ pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",
	199	+ (unsigned long long) addr, ret.stride);
116	200	if (addr == OF_BAD_ADDR)
117	201	return ret;
118	202	pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
119	203
120	204
...	...	@@ -124,11 +208,11 @@
124	208	ret.token -= dcr_n * ret.stride;
125	209	return ret;
126	210	}
127		-EXPORT_SYMBOL_GPL(dcr_map);
	211	+EXPORT_SYMBOL_GPL(dcr_map_mmio);
128	212
129		-void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
	213	+void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)
130	214	{
131		- dcr_host_t h = host;
	215	+ dcr_host_mmio_t h = host;
132	216
133	217	if (h.token == NULL)
134	218	return;
135	219
...	...	@@ -136,8 +220,11 @@
136	220	iounmap(h.token);
137	221	h.token = NULL;
138	222	}
139		-EXPORT_SYMBOL_GPL(dcr_unmap);
140		-#else /* defined(CONFIG_PPC_DCR_NATIVE) */
	223	+EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
	224	+
	225	+#endif /* defined(CONFIG_PPC_DCR_MMIO) */
	226	+
	227	+#ifdef CONFIG_PPC_DCR_NATIVE
141	228	DEFINE_SPINLOCK(dcr_ind_lock);
142		-#endif /* !defined(CONFIG_PPC_DCR_NATIVE) */
	229	+#endif /* defined(CONFIG_PPC_DCR_NATIVE) */
	1	+/*
	2	+ * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
	3	+ * <benh@kernel.crashing.org>
	4	+ *
	5	+ * This program is free software; you can redistribute it and/or modify
	6	+ * it under the terms of the GNU General Public License as published by
	7	+ * the Free Software Foundation; either version 2 of the License, or
	8	+ * (at your option) any later version.
	9	+ *
	10	+ * This program is distributed in the hope that it will be useful,
	11	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
	13	+ * the GNU General Public License for more details.
	14	+ *
	15	+ * You should have received a copy of the GNU General Public License
	16	+ * along with this program; if not, write to the Free Software
	17	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	18	+ */
	19	+
	20	+#ifndef _ASM_POWERPC_DCR_GENERIC_H
	21	+#define _ASM_POWERPC_DCR_GENERIC_H
	22	+#ifdef __KERNEL__
	23	+#ifndef __ASSEMBLY__
	24	+
	25	+enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID};
	26	+
	27	+typedef struct {
	28	+ enum host_type_t type;
	29	+ union {
	30	+ dcr_host_mmio_t mmio;
	31	+ dcr_host_native_t native;
	32	+ } host;
	33	+} dcr_host_t;
	34	+
	35	+extern bool dcr_map_ok_generic(dcr_host_t host);
	36	+
	37	+extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n,
	38	+ unsigned int dcr_c);
	39	+extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c);
	40	+
	41	+extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n);
	42	+
	43	+extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value);
	44	+
	45	+#endif /* __ASSEMBLY__ */
	46	+#endif /* __KERNEL__ */
	47	+#endif /* _ASM_POWERPC_DCR_GENERIC_H */
...	...	@@ -27,20 +27,26 @@
27	27	void __iomem *token;
28	28	unsigned int stride;
29	29	unsigned int base;
30		-} dcr_host_t;
	30	+} dcr_host_mmio_t;
31	31
32		-#define DCR_MAP_OK(host) ((host).token != NULL)
	32	+static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host)
	33	+{
	34	+ return host.token != NULL;
	35	+}
33	36
34		-extern dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
35		- unsigned int dcr_c);
36		-extern void dcr_unmap(dcr_host_t host, unsigned int dcr_c);
	37	+extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
	38	+ unsigned int dcr_n,
	39	+ unsigned int dcr_c);
	40	+extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c);
37	41
38		-static inline u32 dcr_read(dcr_host_t host, unsigned int dcr_n)
	42	+static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n)
39	43	{
40	44	return in_be32(host.token + ((host.base + dcr_n) * host.stride));
41	45	}
42	46
43		-static inline void dcr_write(dcr_host_t host, unsigned int dcr_n, u32 value)
	47	+static inline void dcr_write_mmio(dcr_host_mmio_t host,
	48	+ unsigned int dcr_n,
	49	+ u32 value)
44	50	{
45	51	out_be32(host.token + ((host.base + dcr_n) * host.stride), value);
46	52	}
...	...	@@ -26,14 +26,18 @@
26	26
27	27	typedef struct {
28	28	unsigned int base;
29		-} dcr_host_t;
	29	+} dcr_host_native_t;
30	30
31		-#define DCR_MAP_OK(host) (1)
	31	+static inline bool dcr_map_ok_native(dcr_host_native_t host)
	32	+{
	33	+ return 1;
	34	+}
32	35
33		-#define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){ .base = (dcr_n) })
34		-#define dcr_unmap(host, dcr_c) do {} while (0)
35		-#define dcr_read(host, dcr_n) mfdcr(dcr_n + host.base)
36		-#define dcr_write(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
	36	+#define dcr_map_native(dev, dcr_n, dcr_c) \
	37	+ ((dcr_host_native_t){ .base = (dcr_n) })
	38	+#define dcr_unmap_native(host, dcr_c) do {} while (0)
	39	+#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
	40	+#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
37	41
38	42	/* Device Control Registers */
39	43	void __mtdcr(int reg, unsigned int val);
...	...	@@ -20,14 +20,50 @@
20	20	#ifndef _ASM_POWERPC_DCR_H
21	21	#define _ASM_POWERPC_DCR_H
22	22	#ifdef __KERNEL__
	23	+#ifndef __ASSEMBLY__
23	24	#ifdef CONFIG_PPC_DCR
24	25
25	26	#ifdef CONFIG_PPC_DCR_NATIVE
26	27	#include <asm/dcr-native.h>
27		-#else
	28	+#endif
	29	+
	30	+#ifdef CONFIG_PPC_DCR_MMIO
28	31	#include <asm/dcr-mmio.h>
29	32	#endif
30	33
	34	+
	35	+/* Indirection layer for providing both NATIVE and MMIO support. */
	36	+
	37	+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
	38	+
	39	+#include <asm/dcr-generic.h>
	40	+
	41	+#define DCR_MAP_OK(host) dcr_map_ok_generic(host)
	42	+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c)
	43	+#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c)
	44	+#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n)
	45	+#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value)
	46	+
	47	+#else
	48	+
	49	+#ifdef CONFIG_PPC_DCR_NATIVE
	50	+typedef dcr_host_native_t dcr_host_t;
	51	+#define DCR_MAP_OK(host) dcr_map_ok_native(host)
	52	+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c)
	53	+#define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c)
	54	+#define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n)
	55	+#define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value)
	56	+#else
	57	+typedef dcr_host_mmio_t dcr_host_t;
	58	+#define DCR_MAP_OK(host) dcr_map_ok_mmio(host)
	59	+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c)
	60	+#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c)
	61	+#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n)
	62	+#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value)
	63	+#endif
	64	+
	65	+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
	66	+
31	67	/*
32	68	* On CONFIG_PPC_MERGE, we have additional helpers to read the DCR
33	69	* base from the device-tree
...	...	@@ -41,6 +77,7 @@
41	77	#endif /* CONFIG_PPC_MERGE */
42	78
43	79	#endif /* CONFIG_PPC_DCR */
	80	+#endif /* __ASSEMBLY__ */
44	81	#endif /* __KERNEL__ */
45	82	#endif /* _ASM_POWERPC_DCR_H */