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Commit c10b4f033e7c0ddba2b7b699d01109e4de46e831

Authored by Peter Chen
Committed by Greg Kroah-Hartman
1 parent d66895f9df
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

usb: chipidea: otg: add otg file used to access otgsc 

This file is mainly used to access otgsc currently, it may
add otg related things in the future.

Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 5 changed files with 80 additions and 2 deletions Side-by-side Diff

drivers/usb/chipidea/Makefile
Diff comments   View file @ c10b4f0
... ... @@ -2,7 +2,7 @@
2 2  
3 3 obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc.o
4 4  
5   -ci_hdrc-y := core.o
  5 +ci_hdrc-y := core.o otg.o
6 6 ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
7 7 ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o
8 8 ci_hdrc-$(CONFIG_USB_CHIPIDEA_DEBUG) += debug.o
drivers/usb/chipidea/bits.h
Diff comments   View file @ c10b4f0
... ... @@ -79,11 +79,21 @@
79 79 #define OTGSC_ASVIS BIT(18)
80 80 #define OTGSC_BSVIS BIT(19)
81 81 #define OTGSC_BSEIS BIT(20)
  82 +#define OTGSC_1MSIS BIT(21)
  83 +#define OTGSC_DPIS BIT(22)
82 84 #define OTGSC_IDIE BIT(24)
83 85 #define OTGSC_AVVIE BIT(25)
84 86 #define OTGSC_ASVIE BIT(26)
85 87 #define OTGSC_BSVIE BIT(27)
86 88 #define OTGSC_BSEIE BIT(28)
  89 +#define OTGSC_1MSIE BIT(29)
  90 +#define OTGSC_DPIE BIT(30)
  91 +#define OTGSC_INT_EN_BITS (OTGSC_IDIE | OTGSC_AVVIE | OTGSC_ASVIE \
  92 + | OTGSC_BSVIE | OTGSC_BSEIE | OTGSC_1MSIE \
  93 + | OTGSC_DPIE)
  94 +#define OTGSC_INT_STATUS_BITS (OTGSC_IDIS | OTGSC_AVVIS | OTGSC_ASVIS \
  95 + | OTGSC_BSVIS | OTGSC_BSEIS | OTGSC_1MSIS \
  96 + | OTGSC_DPIS)
87 97  
88 98 /* USBMODE */
89 99 #define USBMODE_CM (0x03UL << 0)
drivers/usb/chipidea/core.c
Diff comments   View file @ c10b4f0
... ... @@ -72,6 +72,7 @@
72 72 #include "bits.h"
73 73 #include "host.h"
74 74 #include "debug.h"
  75 +#include "otg.h"
75 76  
76 77 /* Controller register map */
77 78 static uintptr_t ci_regs_nolpm[] = {
... ... @@ -528,7 +529,7 @@
528 529 goto stop;
529 530  
530 531 if (ci->is_otg)
531   - hw_write(ci, OP_OTGSC, OTGSC_IDIE, OTGSC_IDIE);
  532 + ci_hdrc_otg_init(ci);
532 533  
533 534 ret = dbg_create_files(ci);
534 535 if (!ret)
drivers/usb/chipidea/otg.c
Diff comments   View file @ c10b4f0
  1 +/*
  2 + * otg.c - ChipIdea USB IP core OTG driver
  3 + *
  4 + * Copyright (C) 2013 Freescale Semiconductor, Inc.
  5 + *
  6 + * Author: Peter Chen
  7 + *
  8 + * This program is free software; you can redistribute it and/or modify
  9 + * it under the terms of the GNU General Public License version 2 as
  10 + * published by the Free Software Foundation.
  11 + */
  12 +
  13 +/*
  14 + * This file mainly handles otgsc register, it may include OTG operation
  15 + * in the future.
  16 + */
  17 +
  18 +#include <linux/usb/otg.h>
  19 +#include <linux/usb/gadget.h>
  20 +#include <linux/usb/chipidea.h>
  21 +
  22 +#include "ci.h"
  23 +#include "bits.h"
  24 +#include "otg.h"
  25 +
  26 +/**
  27 + * ci_hdrc_otg_init - initialize otgsc bits
  28 + * ci: the controller
  29 + */
  30 +int ci_hdrc_otg_init(struct ci_hdrc *ci)
  31 +{
  32 + ci_enable_otg_interrupt(ci, OTGSC_IDIE);
  33 +
  34 + return 0;
  35 +}
drivers/usb/chipidea/otg.h
Diff comments   View file @ c10b4f0
  1 +/*
  2 + * Copyright (C) 2013 Freescale Semiconductor, Inc.
  3 + *
  4 + * Author: Peter Chen
  5 + *
  6 + * This program is free software; you can redistribute it and/or modify
  7 + * it under the terms of the GNU General Public License version 2 as
  8 + * published by the Free Software Foundation.
  9 + */
  10 +
  11 +#ifndef __DRIVERS_USB_CHIPIDEA_OTG_H
  12 +#define __DRIVERS_USB_CHIPIDEA_OTG_H
  13 +
  14 +static inline void ci_clear_otg_interrupt(struct ci_hdrc *ci, u32 bits)
  15 +{
  16 + /* Only clear request bits */
  17 + hw_write(ci, OP_OTGSC, OTGSC_INT_STATUS_BITS, bits);
  18 +}
  19 +
  20 +static inline void ci_enable_otg_interrupt(struct ci_hdrc *ci, u32 bits)
  21 +{
  22 + hw_write(ci, OP_OTGSC, bits, bits);
  23 +}
  24 +
  25 +static inline void ci_disable_otg_interrupt(struct ci_hdrc *ci, u32 bits)
  26 +{
  27 + hw_write(ci, OP_OTGSC, bits, 0);
  28 +}
  29 +
  30 +int ci_hdrc_otg_init(struct ci_hdrc *ci);
  31 +
  32 +#endif /* __DRIVERS_USB_CHIPIDEA_OTG_H */