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Commit c1191b0e3b5fc080e0b09859024f39c4a8c5d4d5

Authored by Nicolas Pitre
1 parent fc63b7239a
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[ARM] Kirkwood: create a mapping for the Security Accelerator SRAM 

Always creating the physical mapping should do no harm, so let's remove
the interface that was provided for its optional creation and make the
mapping static.

Signed-off-by: Nicolas Pitre <nico@marvell.com>

Showing 4 changed files with 12 additions and 8 deletions Side-by-side Diff

arch/arm/include/asm/sizes.h
Diff comments   View file @ c1191b0
... ... @@ -29,6 +29,7 @@
29 29 #define SZ_512 0x00000200
30 30  
31 31 #define SZ_1K 0x00000400
  32 +#define SZ_2K 0x00000800
32 33 #define SZ_4K 0x00001000
33 34 #define SZ_8K 0x00002000
34 35 #define SZ_16K 0x00004000
arch/arm/mach-kirkwood/addr-map.c
Diff comments   View file @ c1191b0
... ... @@ -20,6 +20,7 @@
20 20 */
21 21 #define TARGET_DDR 0
22 22 #define TARGET_DEV_BUS 1
  23 +#define TARGET_SRAM 3
23 24 #define TARGET_PCIE 4
24 25 #define ATTR_DEV_SPI_ROM 0x1e
25 26 #define ATTR_DEV_BOOT 0x1d
... ... @@ -30,6 +31,7 @@
30 31 #define ATTR_DEV_CS0 0x3e
31 32 #define ATTR_PCIE_IO 0xe0
32 33 #define ATTR_PCIE_MEM 0xe8
  34 +#define ATTR_SRAM 0x01
33 35  
34 36 /*
35 37 * Helpers to get DDR bank info
... ... @@ -48,7 +50,6 @@
48 50  
49 51  
50 52 struct mbus_dram_target_info kirkwood_mbus_dram_info;
51   -static int __initdata win_alloc_count;
52 53  
53 54 static int __init cpu_win_can_remap(int win)
54 55 {
... ... @@ -112,7 +113,11 @@
112 113 setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
113 114 TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
114 115  
115   - win_alloc_count = 3;
  116 + /*
  117 + * Setup window for SRAM.
  118 + */
  119 + setup_cpu_win(3, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
  120 + TARGET_SRAM, ATTR_SRAM, -1);
116 121  
117 122 /*
118 123 * Setup MBUS dram target info.
... ... @@ -139,10 +144,5 @@
139 144 }
140 145 }
141 146 kirkwood_mbus_dram_info.num_cs = cs;
142   -}
143   -
144   -void __init kirkwood_setup_sram_win(u32 base, u32 size)
145   -{
146   - setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1);
147 147 }
arch/arm/mach-kirkwood/common.h
Diff comments   View file @ c1191b0
... ... @@ -26,7 +26,6 @@
26 26  
27 27 extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
28 28 void kirkwood_setup_cpu_mbus(void);
29   -void kirkwood_setup_sram_win(u32 base, u32 size);
30 29  
31 30 void kirkwood_pcie_id(u32 *dev, u32 *rev);
32 31  
arch/arm/mach-kirkwood/include/mach/kirkwood.h
Diff comments   View file @ c1191b0
... ... @@ -20,11 +20,15 @@
20 20 * f1000000 on-chip peripheral registers
21 21 * f2000000 PCIe I/O space
22 22 * f3000000 NAND controller address window
  23 + * f4000000 Security Accelerator SRAM
23 24 *
24 25 * virt phys size
25 26 * fee00000 f1000000 1M on-chip peripheral registers
26 27 * fef00000 f2000000 1M PCIe I/O space
27 28 */
  29 +
  30 +#define KIRKWOOD_SRAM_PHYS_BASE 0xf4000000
  31 +#define KIRKWOOD_SRAM_SIZE SZ_2K
28 32  
29 33 #define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf3000000
30 34 #define KIRKWOOD_NAND_MEM_SIZE SZ_1K