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Commit c1dcfd9d199043ff0e8805484a736ad36d9dd04a

Authored by Scott Wood
Committed by Kumar Gala
1 parent 7ae870368d
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[POWERPC] cpm_uart: sparse fixes 

Mostly a bunch of direct access to in/out conversions, plus a few
cast removals, __iomem annotations, and miscellaneous cleanup.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Showing 6 changed files with 192 additions and 183 deletions Side-by-side Diff

drivers/serial/cpm_uart/cpm_uart.h
Diff comments   View file @ c1dcfd9
... ... @@ -56,21 +56,21 @@
56 56 u16 rx_fifosize;
57 57 u16 tx_nrfifos;
58 58 u16 tx_fifosize;
59   - smc_t *smcp;
60   - smc_uart_t *smcup;
61   - scc_t *sccp;
62   - scc_uart_t *sccup;
63   - volatile cbd_t *rx_bd_base;
64   - volatile cbd_t *rx_cur;
65   - volatile cbd_t *tx_bd_base;
66   - volatile cbd_t *tx_cur;
  59 + smc_t __iomem *smcp;
  60 + smc_uart_t __iomem *smcup;
  61 + scc_t __iomem *sccp;
  62 + scc_uart_t __iomem *sccup;
  63 + cbd_t __iomem *rx_bd_base;
  64 + cbd_t __iomem *rx_cur;
  65 + cbd_t __iomem *tx_bd_base;
  66 + cbd_t __iomem *tx_cur;
67 67 unsigned char *tx_buf;
68 68 unsigned char *rx_buf;
69 69 u32 flags;
70 70 void (*set_lineif)(struct uart_cpm_port *);
71 71 u8 brg;
72 72 uint dp_addr;
73   - void *mem_addr;
  73 + void *mem_addr;
74 74 dma_addr_t dma_addr;
75 75 u32 mem_size;
76 76 /* helpers */
77 77  
78 78  
79 79  
80 80  
81 81  
82 82  
... ... @@ -106,34 +106,36 @@
106 106 /*
107 107 virtual to phys transtalion
108 108 */
109   -static inline unsigned long cpu2cpm_addr(void* addr, struct uart_cpm_port *pinfo)
  109 +static inline unsigned long cpu2cpm_addr(void *addr,
  110 + struct uart_cpm_port *pinfo)
110 111 {
111 112 int offset;
112 113 u32 val = (u32)addr;
  114 + u32 mem = (u32)pinfo->mem_addr;
113 115 /* sane check */
114   - if (likely((val >= (u32)pinfo->mem_addr)) &&
115   - (val<((u32)pinfo->mem_addr + pinfo->mem_size))) {
116   - offset = val - (u32)pinfo->mem_addr;
117   - return pinfo->dma_addr+offset;
  116 + if (likely(val >= mem && val < mem + pinfo->mem_size)) {
  117 + offset = val - mem;
  118 + return pinfo->dma_addr + offset;
118 119 }
119 120 /* something nasty happened */
120 121 BUG();
121 122 return 0;
122 123 }
123 124  
124   -static inline void *cpm2cpu_addr(unsigned long addr, struct uart_cpm_port *pinfo)
  125 +static inline void *cpm2cpu_addr(unsigned long addr,
  126 + struct uart_cpm_port *pinfo)
125 127 {
126 128 int offset;
127 129 u32 val = addr;
  130 + u32 dma = (u32)pinfo->dma_addr;
128 131 /* sane check */
129   - if (likely((val >= pinfo->dma_addr) &&
130   - (val<(pinfo->dma_addr + pinfo->mem_size)))) {
131   - offset = val - (u32)pinfo->dma_addr;
132   - return (void*)(pinfo->mem_addr+offset);
  132 + if (likely(val >= dma && val < dma + pinfo->mem_size)) {
  133 + offset = val - dma;
  134 + return pinfo->mem_addr + offset;
133 135 }
134 136 /* something nasty happened */
135 137 BUG();
136   - return 0;
  138 + return NULL;
137 139 }
138 140  
139 141  
drivers/serial/cpm_uart/cpm_uart_core.c
Diff comments   View file @ c1dcfd9
... ... @@ -131,14 +131,14 @@
131 131 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
132 132 {
133 133 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
134   - volatile cbd_t *bdp = pinfo->tx_bd_base;
  134 + cbd_t __iomem *bdp = pinfo->tx_bd_base;
135 135 int ret = 0;
136 136  
137 137 while (1) {
138   - if (bdp->cbd_sc & BD_SC_READY)
  138 + if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
139 139 break;
140 140  
141   - if (bdp->cbd_sc & BD_SC_WRAP) {
  141 + if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
142 142 ret = TIOCSER_TEMT;
143 143 break;
144 144 }
145 145  
146 146  
... ... @@ -167,15 +167,15 @@
167 167 static void cpm_uart_stop_tx(struct uart_port *port)
168 168 {
169 169 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
170   - volatile smc_t *smcp = pinfo->smcp;
171   - volatile scc_t *sccp = pinfo->sccp;
  170 + smc_t __iomem *smcp = pinfo->smcp;
  171 + scc_t __iomem *sccp = pinfo->sccp;
172 172  
173 173 pr_debug("CPM uart[%d]:stop tx\n", port->line);
174 174  
175 175 if (IS_SMC(pinfo))
176   - smcp->smc_smcm &= ~SMCM_TX;
  176 + clrbits8(&smcp->smc_smcm, SMCM_TX);
177 177 else
178   - sccp->scc_sccm &= ~UART_SCCM_TX;
  178 + clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
179 179 }
180 180  
181 181 /*
182 182  
183 183  
184 184  
185 185  
... ... @@ -184,24 +184,24 @@
184 184 static void cpm_uart_start_tx(struct uart_port *port)
185 185 {
186 186 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
187   - volatile smc_t *smcp = pinfo->smcp;
188   - volatile scc_t *sccp = pinfo->sccp;
  187 + smc_t __iomem *smcp = pinfo->smcp;
  188 + scc_t __iomem *sccp = pinfo->sccp;
189 189  
190 190 pr_debug("CPM uart[%d]:start tx\n", port->line);
191 191  
192 192 if (IS_SMC(pinfo)) {
193   - if (smcp->smc_smcm & SMCM_TX)
  193 + if (in_8(&smcp->smc_smcm) & SMCM_TX)
194 194 return;
195 195 } else {
196   - if (sccp->scc_sccm & UART_SCCM_TX)
  196 + if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
197 197 return;
198 198 }
199 199  
200 200 if (cpm_uart_tx_pump(port) != 0) {
201 201 if (IS_SMC(pinfo)) {
202   - smcp->smc_smcm |= SMCM_TX;
  202 + setbits8(&smcp->smc_smcm, SMCM_TX);
203 203 } else {
204   - sccp->scc_sccm |= UART_SCCM_TX;
  204 + setbits16(&sccp->scc_sccm, UART_SCCM_TX);
205 205 }
206 206 }
207 207 }
208 208  
209 209  
... ... @@ -212,15 +212,15 @@
212 212 static void cpm_uart_stop_rx(struct uart_port *port)
213 213 {
214 214 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
215   - volatile smc_t *smcp = pinfo->smcp;
216   - volatile scc_t *sccp = pinfo->sccp;
  215 + smc_t __iomem *smcp = pinfo->smcp;
  216 + scc_t __iomem *sccp = pinfo->sccp;
217 217  
218 218 pr_debug("CPM uart[%d]:stop rx\n", port->line);
219 219  
220 220 if (IS_SMC(pinfo))
221   - smcp->smc_smcm &= ~SMCM_RX;
  221 + clrbits8(&smcp->smc_smcm, SMCM_RX);
222 222 else
223   - sccp->scc_sccm &= ~UART_SCCM_RX;
  223 + clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
224 224 }
225 225  
226 226 /*
227 227  
... ... @@ -263,10 +263,11 @@
263 263 static void cpm_uart_int_rx(struct uart_port *port)
264 264 {
265 265 int i;
266   - unsigned char ch, *cp;
  266 + unsigned char ch;
  267 + u8 *cp;
267 268 struct tty_struct *tty = port->info->tty;
268 269 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
269   - volatile cbd_t *bdp;
  270 + cbd_t __iomem *bdp;
270 271 u16 status;
271 272 unsigned int flg;
272 273  
273 274  
... ... @@ -278,13 +279,13 @@
278 279 bdp = pinfo->rx_cur;
279 280 for (;;) {
280 281 /* get status */
281   - status = bdp->cbd_sc;
  282 + status = in_be16(&bdp->cbd_sc);
282 283 /* If this one is empty, return happy */
283 284 if (status & BD_SC_EMPTY)
284 285 break;
285 286  
286 287 /* get number of characters, and check spce in flip-buffer */
287   - i = bdp->cbd_datlen;
  288 + i = in_be16(&bdp->cbd_datlen);
288 289  
289 290 /* If we have not enough room in tty flip buffer, then we try
290 291 * later, which will be the next rx-interrupt or a timeout
... ... @@ -295,7 +296,7 @@
295 296 }
296 297  
297 298 /* get pointer */
298   - cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
  299 + cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
299 300  
300 301 /* loop through the buffer */
301 302 while (i-- > 0) {
302 303  
... ... @@ -315,10 +316,11 @@
315 316 } /* End while (i--) */
316 317  
317 318 /* This BD is ready to be used again. Clear status. get next */
318   - bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
319   - bdp->cbd_sc |= BD_SC_EMPTY;
  319 + clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
  320 + BD_SC_OV | BD_SC_ID);
  321 + setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
320 322  
321   - if (bdp->cbd_sc & BD_SC_WRAP)
  323 + if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
322 324 bdp = pinfo->rx_bd_base;
323 325 else
324 326 bdp++;
... ... @@ -326,7 +328,7 @@
326 328 } /* End for (;;) */
327 329  
328 330 /* Write back buffer pointer */
329   - pinfo->rx_cur = (volatile cbd_t *) bdp;
  331 + pinfo->rx_cur = bdp;
330 332  
331 333 /* activate BH processing */
332 334 tty_flip_buffer_push(tty);
333 335  
... ... @@ -380,14 +382,14 @@
380 382 u8 events;
381 383 struct uart_port *port = (struct uart_port *)data;
382 384 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
383   - volatile smc_t *smcp = pinfo->smcp;
384   - volatile scc_t *sccp = pinfo->sccp;
  385 + smc_t __iomem *smcp = pinfo->smcp;
  386 + scc_t __iomem *sccp = pinfo->sccp;
385 387  
386 388 pr_debug("CPM uart[%d]:IRQ\n", port->line);
387 389  
388 390 if (IS_SMC(pinfo)) {
389   - events = smcp->smc_smce;
390   - smcp->smc_smce = events;
  391 + events = in_8(&smcp->smc_smce);
  392 + out_8(&smcp->smc_smce, events);
391 393 if (events & SMCM_BRKE)
392 394 uart_handle_break(port);
393 395 if (events & SMCM_RX)
... ... @@ -395,8 +397,8 @@
395 397 if (events & SMCM_TX)
396 398 cpm_uart_int_tx(port);
397 399 } else {
398   - events = sccp->scc_scce;
399   - sccp->scc_scce = events;
  400 + events = in_be16(&sccp->scc_scce);
  401 + out_be16(&sccp->scc_scce, events);
400 402 if (events & UART_SCCM_BRKE)
401 403 uart_handle_break(port);
402 404 if (events & UART_SCCM_RX)
403 405  
... ... @@ -421,11 +423,11 @@
421 423  
422 424 /* Startup rx-int */
423 425 if (IS_SMC(pinfo)) {
424   - pinfo->smcp->smc_smcm |= SMCM_RX;
425   - pinfo->smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
  426 + setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
  427 + setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
426 428 } else {
427   - pinfo->sccp->scc_sccm |= UART_SCCM_RX;
428   - pinfo->sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  429 + setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
  430 + setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
429 431 }
430 432  
431 433 if (!(pinfo->flags & FLAG_CONSOLE))
432 434  
... ... @@ -464,13 +466,13 @@
464 466  
465 467 /* Stop uarts */
466 468 if (IS_SMC(pinfo)) {
467   - volatile smc_t *smcp = pinfo->smcp;
468   - smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
469   - smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
  469 + smc_t __iomem *smcp = pinfo->smcp;
  470 + clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
  471 + clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
470 472 } else {
471   - volatile scc_t *sccp = pinfo->sccp;
472   - sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
473   - sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
  473 + scc_t __iomem *sccp = pinfo->sccp;
  474 + clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  475 + clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
474 476 }
475 477  
476 478 /* Shut them really down and reinit buffer descriptors */
... ... @@ -492,8 +494,8 @@
492 494 u16 cval, scval, prev_mode;
493 495 int bits, sbits;
494 496 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
495   - volatile smc_t *smcp = pinfo->smcp;
496   - volatile scc_t *sccp = pinfo->sccp;
  497 + smc_t __iomem *smcp = pinfo->smcp;
  498 + scc_t __iomem *sccp = pinfo->sccp;
497 499  
498 500 pr_debug("CPM uart[%d]:set_termios\n", port->line);
499 501  
500 502  
... ... @@ -588,11 +590,11 @@
588 590 * enables, because we want to put them back if they were
589 591 * present.
590 592 */
591   - prev_mode = smcp->smc_smcmr;
592   - smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
593   - smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
  593 + prev_mode = in_be16(&smcp->smc_smcmr);
  594 + out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval | SMCMR_SM_UART);
  595 + setbits16(&smcp->smc_smcmr, (prev_mode & (SMCMR_REN | SMCMR_TEN)));
594 596 } else {
595   - sccp->scc_psmr = (sbits << 12) | scval;
  597 + out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
596 598 }
597 599  
598 600 cpm_set_brg(pinfo->brg - 1, baud);
... ... @@ -630,8 +632,8 @@
630 632 */
631 633 static int cpm_uart_tx_pump(struct uart_port *port)
632 634 {
633   - volatile cbd_t *bdp;
634   - unsigned char *p;
  635 + cbd_t __iomem *bdp;
  636 + u8 *p;
635 637 int count;
636 638 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
637 639 struct circ_buf *xmit = &port->info->xmit;
638 640  
639 641  
... ... @@ -641,13 +643,14 @@
641 643 /* Pick next descriptor and fill from buffer */
642 644 bdp = pinfo->tx_cur;
643 645  
644   - p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
  646 + p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
645 647  
646 648 *p++ = port->x_char;
647   - bdp->cbd_datlen = 1;
648   - bdp->cbd_sc |= BD_SC_READY;
  649 +
  650 + out_be16(&bdp->cbd_datlen, 1);
  651 + setbits16(&bdp->cbd_sc, BD_SC_READY);
649 652 /* Get next BD. */
650   - if (bdp->cbd_sc & BD_SC_WRAP)
  653 + if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
651 654 bdp = pinfo->tx_bd_base;
652 655 else
653 656 bdp++;
654 657  
... ... @@ -666,9 +669,10 @@
666 669 /* Pick next descriptor and fill from buffer */
667 670 bdp = pinfo->tx_cur;
668 671  
669   - while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) {
  672 + while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
  673 + xmit->tail != xmit->head) {
670 674 count = 0;
671   - p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
  675 + p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
672 676 while (count < pinfo->tx_fifosize) {
673 677 *p++ = xmit->buf[xmit->tail];
674 678 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
675 679  
... ... @@ -677,11 +681,10 @@
677 681 if (xmit->head == xmit->tail)
678 682 break;
679 683 }
680   - bdp->cbd_datlen = count;
681   - bdp->cbd_sc |= BD_SC_READY;
682   - eieio();
  684 + out_be16(&bdp->cbd_datlen, count);
  685 + setbits16(&bdp->cbd_sc, BD_SC_READY);
683 686 /* Get next BD. */
684   - if (bdp->cbd_sc & BD_SC_WRAP)
  687 + if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
685 688 bdp = pinfo->tx_bd_base;
686 689 else
687 690 bdp++;
... ... @@ -706,7 +709,7 @@
706 709 {
707 710 int i;
708 711 u8 *mem_addr;
709   - volatile cbd_t *bdp;
  712 + cbd_t __iomem *bdp;
710 713  
711 714 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
712 715  
713 716  
... ... @@ -717,13 +720,13 @@
717 720 mem_addr = pinfo->mem_addr;
718 721 bdp = pinfo->rx_cur = pinfo->rx_bd_base;
719 722 for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
720   - bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
721   - bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
  723 + out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
  724 + out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
722 725 mem_addr += pinfo->rx_fifosize;
723 726 }
724 727  
725   - bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
726   - bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
  728 + out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
  729 + out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
727 730  
728 731 /* Set the physical address of the host memory
729 732 * buffers in the buffer descriptors, and the
730 733  
731 734  
... ... @@ -732,19 +735,19 @@
732 735 mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
733 736 bdp = pinfo->tx_cur = pinfo->tx_bd_base;
734 737 for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
735   - bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
736   - bdp->cbd_sc = BD_SC_INTRPT;
  738 + out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
  739 + out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
737 740 mem_addr += pinfo->tx_fifosize;
738 741 }
739 742  
740   - bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo);
741   - bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT;
  743 + out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
  744 + out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
742 745 }
743 746  
744 747 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
745 748 {
746   - volatile scc_t *scp;
747   - volatile scc_uart_t *sup;
  749 + scc_t __iomem *scp;
  750 + scc_uart_t __iomem *sup;
748 751  
749 752 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
750 753  
... ... @@ -752,8 +755,10 @@
752 755 sup = pinfo->sccup;
753 756  
754 757 /* Store address */
755   - pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE;
756   - pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE;
  758 + out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
  759 + (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
  760 + out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
  761 + (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
757 762  
758 763 /* Set up the uart parameters in the
759 764 * parameter ram.
... ... @@ -761,25 +766,25 @@
761 766  
762 767 cpm_set_scc_fcr(sup);
763 768  
764   - sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize;
765   - sup->scc_maxidl = pinfo->rx_fifosize;
766   - sup->scc_brkcr = 1;
767   - sup->scc_parec = 0;
768   - sup->scc_frmec = 0;
769   - sup->scc_nosec = 0;
770   - sup->scc_brkec = 0;
771   - sup->scc_uaddr1 = 0;
772   - sup->scc_uaddr2 = 0;
773   - sup->scc_toseq = 0;
774   - sup->scc_char1 = 0x8000;
775   - sup->scc_char2 = 0x8000;
776   - sup->scc_char3 = 0x8000;
777   - sup->scc_char4 = 0x8000;
778   - sup->scc_char5 = 0x8000;
779   - sup->scc_char6 = 0x8000;
780   - sup->scc_char7 = 0x8000;
781   - sup->scc_char8 = 0x8000;
782   - sup->scc_rccm = 0xc0ff;
  769 + out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
  770 + out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
  771 + out_be16(&sup->scc_brkcr, 1);
  772 + out_be16(&sup->scc_parec, 0);
  773 + out_be16(&sup->scc_frmec, 0);
  774 + out_be16(&sup->scc_nosec, 0);
  775 + out_be16(&sup->scc_brkec, 0);
  776 + out_be16(&sup->scc_uaddr1, 0);
  777 + out_be16(&sup->scc_uaddr2, 0);
  778 + out_be16(&sup->scc_toseq, 0);
  779 + out_be16(&sup->scc_char1, 0x8000);
  780 + out_be16(&sup->scc_char2, 0x8000);
  781 + out_be16(&sup->scc_char3, 0x8000);
  782 + out_be16(&sup->scc_char4, 0x8000);
  783 + out_be16(&sup->scc_char5, 0x8000);
  784 + out_be16(&sup->scc_char6, 0x8000);
  785 + out_be16(&sup->scc_char7, 0x8000);
  786 + out_be16(&sup->scc_char8, 0x8000);
  787 + out_be16(&sup->scc_rccm, 0xc0ff);
783 788  
784 789 /* Send the CPM an initialize command.
785 790 */
786 791  
787 792  
788 793  
... ... @@ -788,23 +793,23 @@
788 793 /* Set UART mode, 8 bit, no parity, one stop.
789 794 * Enable receive and transmit.
790 795 */
791   - scp->scc_gsmrh = 0;
792   - scp->scc_gsmrl =
793   - (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
  796 + out_be32(&scp->scc_gsmrh, 0);
  797 + out_be32(&scp->scc_gsmrl,
  798 + SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
794 799  
795 800 /* Enable rx interrupts and clear all pending events. */
796   - scp->scc_sccm = 0;
797   - scp->scc_scce = 0xffff;
798   - scp->scc_dsr = 0x7e7e;
799   - scp->scc_psmr = 0x3000;
  801 + out_be16(&scp->scc_sccm, 0);
  802 + out_be16(&scp->scc_scce, 0xffff);
  803 + out_be16(&scp->scc_dsr, 0x7e7e);
  804 + out_be16(&scp->scc_psmr, 0x3000);
800 805  
801   - scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  806 + setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
802 807 }
803 808  
804 809 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
805 810 {
806   - volatile smc_t *sp;
807   - volatile smc_uart_t *up;
  811 + smc_t __iomem *sp;
  812 + smc_uart_t __iomem *up;
808 813  
809 814 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
810 815  
811 816  
... ... @@ -812,19 +817,21 @@
812 817 up = pinfo->smcup;
813 818  
814 819 /* Store address */
815   - pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE;
816   - pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE;
  820 + out_be16(&pinfo->smcup->smc_rbase,
  821 + (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
  822 + out_be16(&pinfo->smcup->smc_tbase,
  823 + (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
817 824  
818 825 /*
819 826 * In case SMC1 is being relocated...
820 827 */
821 828 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
822   - up->smc_rbptr = pinfo->smcup->smc_rbase;
823   - up->smc_tbptr = pinfo->smcup->smc_tbase;
824   - up->smc_rstate = 0;
825   - up->smc_tstate = 0;
826   - up->smc_brkcr = 1; /* number of break chars */
827   - up->smc_brkec = 0;
  829 + out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
  830 + out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
  831 + out_be32(&up->smc_rstate, 0);
  832 + out_be32(&up->smc_tstate, 0);
  833 + out_be16(&up->smc_brkcr, 1); /* number of break chars */
  834 + out_be16(&up->smc_brkec, 0);
828 835 #endif
829 836  
830 837 /* Set up the uart parameters in the
831 838  
832 839  
833 840  
... ... @@ -833,24 +840,24 @@
833 840 cpm_set_smc_fcr(up);
834 841  
835 842 /* Using idle charater time requires some additional tuning. */
836   - up->smc_mrblr = pinfo->rx_fifosize;
837   - up->smc_maxidl = pinfo->rx_fifosize;
838   - up->smc_brklen = 0;
839   - up->smc_brkec = 0;
840   - up->smc_brkcr = 1;
  843 + out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
  844 + out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
  845 + out_be16(&up->smc_brklen, 0);
  846 + out_be16(&up->smc_brkec, 0);
  847 + out_be16(&up->smc_brkcr, 1);
841 848  
842 849 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
843 850  
844 851 /* Set UART mode, 8 bit, no parity, one stop.
845 852 * Enable receive and transmit.
846 853 */
847   - sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
  854 + out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
848 855  
849 856 /* Enable only rx interrupts clear all pending events. */
850   - sp->smc_smcm = 0;
851   - sp->smc_smce = 0xff;
  857 + out_8(&sp->smc_smcm, 0);
  858 + out_8(&sp->smc_smce, 0xff);
852 859  
853   - sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
  860 + setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
854 861 }
855 862  
856 863 /*
857 864  
... ... @@ -868,11 +875,11 @@
868 875 return 0;
869 876  
870 877 if (IS_SMC(pinfo)) {
871   - pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
872   - pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
  878 + clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
  879 + clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
873 880 } else {
874   - pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
875   - pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  881 + clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
  882 + clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
876 883 }
877 884  
878 885 ret = cpm_uart_allocbuf(pinfo, 0);
879 886  
... ... @@ -931,10 +938,11 @@
931 938 #ifdef CONFIG_PPC_CPM_NEW_BINDING
932 939 struct uart_cpm_port cpm_uart_ports[UART_NR];
933 940  
934   -int cpm_uart_init_port(struct device_node *np, struct uart_cpm_port *pinfo)
  941 +static int cpm_uart_init_port(struct device_node *np,
  942 + struct uart_cpm_port *pinfo)
935 943 {
936 944 const u32 *data;
937   - void __iomem *mem, __iomem *pram;
  945 + void __iomem *mem, *pram;
938 946 int len;
939 947 int ret;
940 948  
... ... @@ -1169,8 +1177,8 @@
1169 1177 &cpm_uart_ports[cpm_uart_port_map[co->index]];
1170 1178 #endif
1171 1179 unsigned int i;
1172   - volatile cbd_t *bdp, *bdbase;
1173   - volatile unsigned char *cp;
  1180 + cbd_t __iomem *bdp, *bdbase;
  1181 + unsigned char *cp;
1174 1182  
1175 1183 /* Get the address of the host memory buffer.
1176 1184 */
1177 1185  
1178 1186  
1179 1187  
1180 1188  
1181 1189  
1182 1190  
1183 1191  
... ... @@ -1188,37 +1196,36 @@
1188 1196 * Ready indicates output is ready, and xmt is doing
1189 1197 * that, not that it is ready for us to send.
1190 1198 */
1191   - while ((bdp->cbd_sc & BD_SC_READY) != 0)
  1199 + while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1192 1200 ;
1193 1201  
1194 1202 /* Send the character out.
1195 1203 * If the buffer address is in the CPM DPRAM, don't
1196 1204 * convert it.
1197 1205 */
1198   - cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1199   -
  1206 + cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1200 1207 *cp = *s;
1201 1208  
1202   - bdp->cbd_datlen = 1;
1203   - bdp->cbd_sc |= BD_SC_READY;
  1209 + out_be16(&bdp->cbd_datlen, 1);
  1210 + setbits16(&bdp->cbd_sc, BD_SC_READY);
1204 1211  
1205   - if (bdp->cbd_sc & BD_SC_WRAP)
  1212 + if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1206 1213 bdp = bdbase;
1207 1214 else
1208 1215 bdp++;
1209 1216  
1210 1217 /* if a LF, also do CR... */
1211 1218 if (*s == 10) {
1212   - while ((bdp->cbd_sc & BD_SC_READY) != 0)
  1219 + while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1213 1220 ;
1214 1221  
1215   - cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1216   -
  1222 + cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1217 1223 *cp = 13;
1218   - bdp->cbd_datlen = 1;
1219   - bdp->cbd_sc |= BD_SC_READY;
1220 1224  
1221   - if (bdp->cbd_sc & BD_SC_WRAP)
  1225 + out_be16(&bdp->cbd_datlen, 1);
  1226 + setbits16(&bdp->cbd_sc, BD_SC_READY);
  1227 +
  1228 + if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1222 1229 bdp = bdbase;
1223 1230 else
1224 1231 bdp++;
1225 1232  
... ... @@ -1229,10 +1236,10 @@
1229 1236 * Finally, Wait for transmitter & holding register to empty
1230 1237 * and restore the IER
1231 1238 */
1232   - while ((bdp->cbd_sc & BD_SC_READY) != 0)
  1239 + while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1233 1240 ;
1234 1241  
1235   - pinfo->tx_cur = (volatile cbd_t *) bdp;
  1242 + pinfo->tx_cur = bdp;
1236 1243 }
1237 1244  
1238 1245  
1239 1246  
... ... @@ -1319,11 +1326,11 @@
1319 1326 #endif
1320 1327  
1321 1328 if (IS_SMC(pinfo)) {
1322   - pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
1323   - pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
  1329 + clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
  1330 + clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1324 1331 } else {
1325   - pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
1326   - pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  1332 + clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
  1333 + clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1327 1334 }
1328 1335  
1329 1336 ret = cpm_uart_allocbuf(pinfo, 1);
... ... @@ -1354,7 +1361,7 @@
1354 1361 .data = &cpm_reg,
1355 1362 };
1356 1363  
1357   -int __init cpm_uart_console_init(void)
  1364 +static int __init cpm_uart_console_init(void)
1358 1365 {
1359 1366 register_console(&cpm_scc_uart_console);
1360 1367 return 0;
drivers/serial/cpm_uart/cpm_uart_cpm1.c
Diff comments   View file @ c1dcfd9
... ... @@ -179,7 +179,7 @@
179 179 pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
180 180 * pinfo->rx_fifosize);
181 181  
182   - pinfo->rx_bd_base = (volatile cbd_t *)dp_mem;
  182 + pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem;
183 183 pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
184 184  
185 185 return 0;
drivers/serial/cpm_uart/cpm_uart_cpm1.h
Diff comments   View file @ c1dcfd9
... ... @@ -27,19 +27,19 @@
27 27 cpm_setbrg(brg, baud);
28 28 }
29 29  
30   -static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup)
  30 +static inline void cpm_set_scc_fcr(scc_uart_t __iomem * sup)
31 31 {
32   - sup->scc_genscc.scc_rfcr = SMC_EB;
33   - sup->scc_genscc.scc_tfcr = SMC_EB;
  32 + out_8(&sup->scc_genscc.scc_rfcr, SMC_EB);
  33 + out_8(&sup->scc_genscc.scc_tfcr, SMC_EB);
34 34 }
35 35  
36   -static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
  36 +static inline void cpm_set_smc_fcr(smc_uart_t __iomem * up)
37 37 {
38   - up->smc_rfcr = SMC_EB;
39   - up->smc_tfcr = SMC_EB;
  38 + out_8(&up->smc_rfcr, SMC_EB);
  39 + out_8(&up->smc_tfcr, SMC_EB);
40 40 }
41 41  
42   -#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0))
  42 +#define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0))
43 43  
44 44 #endif
drivers/serial/cpm_uart/cpm_uart_cpm2.c
Diff comments   View file @ c1dcfd9
... ... @@ -278,7 +278,7 @@
278 278 pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
279 279 * pinfo->rx_fifosize);
280 280  
281   - pinfo->rx_bd_base = (volatile cbd_t *)dp_mem;
  281 + pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem;
282 282 pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
283 283  
284 284 return 0;
... ... @@ -289,7 +289,7 @@
289 289 dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos *
290 290 pinfo->rx_fifosize) +
291 291 L1_CACHE_ALIGN(pinfo->tx_nrfifos *
292   - pinfo->tx_fifosize), pinfo->mem_addr,
  292 + pinfo->tx_fifosize), (void __force *)pinfo->mem_addr,
293 293 pinfo->dma_addr);
294 294  
295 295 cpm_dpfree(pinfo->dp_addr);
drivers/serial/cpm_uart/cpm_uart_cpm2.h
Diff comments   View file @ c1dcfd9
... ... @@ -27,19 +27,19 @@
27 27 cpm_setbrg(brg, baud);
28 28 }
29 29  
30   -static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup)
  30 +static inline void cpm_set_scc_fcr(scc_uart_t __iomem *sup)
31 31 {
32   - sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
33   - sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
  32 + out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB);
  33 + out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB);
34 34 }
35 35  
36   -static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
  36 +static inline void cpm_set_smc_fcr(smc_uart_t __iomem *up)
37 37 {
38   - up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
39   - up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
  38 + out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB);
  39 + out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB);
40 40 }
41 41  
42   -#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0))
  42 +#define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0))
43 43  
44 44 #endif