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Commit c3b1c2de2254aa4721e7e3c8d418fa9302e6acb0

Authored by Kumba
Committed by Ralf Baechle
1 parent 2493921c28
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[MIPS] Fix R4K cache macro names 

Several machines have the R4K cache macro name spelled incorrectly.  Namely,
they have cpu_has_4kcache defined instead of cpu_has_4k_cache.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 4 changed files with 6 additions and 6 deletions Side-by-side Diff

include/asm-mips/mach-ip22/cpu-feature-overrides.h
Diff comments   View file @ c3b1c2d
... ... @@ -13,7 +13,7 @@
13 13 */
14 14 #define cpu_has_tlb 1
15 15 #define cpu_has_4kex 1
16   -#define cpu_has_4kcache 1
  16 +#define cpu_has_4k_cache 1
17 17 #define cpu_has_fpu 1
18 18 #define cpu_has_32fpr 1
19 19 #define cpu_has_counter 1
include/asm-mips/mach-mips/cpu-feature-overrides.h
Diff comments   View file @ c3b1c2d
... ... @@ -17,7 +17,7 @@
17 17 #ifdef CONFIG_CPU_MIPS32
18 18 #define cpu_has_tlb 1
19 19 #define cpu_has_4kex 1
20   -#define cpu_has_4kcache 1
  20 +#define cpu_has_4k_cache 1
21 21 /* #define cpu_has_fpu ? */
22 22 /* #define cpu_has_32fpr ? */
23 23 #define cpu_has_counter 1
... ... @@ -47,7 +47,7 @@
47 47 #ifdef CONFIG_CPU_MIPS64
48 48 #define cpu_has_tlb 1
49 49 #define cpu_has_4kex 1
50   -#define cpu_has_4kcache 1
  50 +#define cpu_has_4k_cache 1
51 51 /* #define cpu_has_fpu ? */
52 52 /* #define cpu_has_32fpr ? */
53 53 #define cpu_has_counter 1
include/asm-mips/mach-rm200/cpu-feature-overrides.h
Diff comments   View file @ c3b1c2d
... ... @@ -14,7 +14,7 @@
14 14  
15 15 #define cpu_has_tlb 1
16 16 #define cpu_has_4kex 1
17   -#define cpu_has_4kcache 1
  17 +#define cpu_has_4k_cache 1
18 18 #define cpu_has_fpu 1
19 19 #define cpu_has_32fpr 1
20 20 #define cpu_has_counter 1
include/asm-mips/mach-sim/cpu-feature-overrides.h
Diff comments   View file @ c3b1c2d
... ... @@ -16,7 +16,7 @@
16 16 #ifdef CONFIG_CPU_MIPS32
17 17 #define cpu_has_tlb 1
18 18 #define cpu_has_4kex 1
19   -#define cpu_has_4kcache 1
  19 +#define cpu_has_4k_cache 1
20 20 #define cpu_has_fpu 0
21 21 /* #define cpu_has_32fpr ? */
22 22 #define cpu_has_counter 1
... ... @@ -41,7 +41,7 @@
41 41 #ifdef CONFIG_CPU_MIPS64
42 42 #define cpu_has_tlb 1
43 43 #define cpu_has_4kex 1
44   -#define cpu_has_4kcache 1
  44 +#define cpu_has_4k_cache 1
45 45 /* #define cpu_has_fpu ? */
46 46 /* #define cpu_has_32fpr ? */
47 47 #define cpu_has_counter 1