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Commit c8b5d9dcbc94ae5e7d9ed647246df4454d25332e

Authored by Paul Mundt
1 parent c170f86e31
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

sh: Move out individual boards without mach groups. 

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Showing 23 changed files with 1238 additions and 1251 deletions Side-by-side Diff

... ... @@ -97,10 +97,10 @@
97 97  
98 98 LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
99 99  
100   -core-y += arch/sh/kernel/ arch/sh/mm/
  100 +core-y += arch/sh/kernel/ arch/sh/mm/ arch/sh/boards/
101 101 core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
102 102  
103   -# Boards and Mach groups
  103 +# Mach groups
104 104 machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se
105 105 machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx
106 106 machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast
107 107  
108 108  
109 109  
... ... @@ -114,15 +114,11 @@
114 114 machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
115 115 machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
116 116 machdir-$(CONFIG_SH_RSK7203) += mach-rsk7203
117   -machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
118 117 machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
119   -machdir-$(CONFIG_SH_SH7785LCR) += mach-sh7785lcr
120 118 machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev
121 119 machdir-$(CONFIG_SH_LANDISK) += mach-landisk
122 120 machdir-$(CONFIG_SH_TITAN) += mach-titan
123   -machdir-$(CONFIG_SH_SHMIN) += mach-shmin
124 121 machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
125   -machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += mach-magicpanelr2
126 122 machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
127 123  
128 124 ifneq ($(machdir-y),)
arch/sh/boards/Kconfig
Diff comments   View file @ c8b5d9d
... ... @@ -242,5 +242,18 @@
242 242 source "arch/sh/boards/mach-highlander/Kconfig"
243 243 source "arch/sh/boards/mach-sdk7780/Kconfig"
244 244 source "arch/sh/boards/mach-migor/Kconfig"
245   -source "arch/sh/boards/mach-magicpanelr2/Kconfig"
  245 +
  246 +if SH_MAGIC_PANEL_R2
  247 +
  248 +menu "Magic Panel R2 options"
  249 +
  250 +config SH_MAGIC_PANEL_R2_VERSION
  251 + int SH_MAGIC_PANEL_R2_VERSION
  252 + default "3"
  253 + help
  254 + Set the version of the Magic Panel R2
  255 +
  256 +endmenu
  257 +
  258 +endif
arch/sh/boards/Makefile
Diff comments   View file @ c8b5d9d
  1 +#
  2 +# Specific board support, not covered by a mach group.
  3 +#
  4 +obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
  5 +obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
  6 +obj-$(CONFIG_SH_RSK7203) += board-rsk7203.o
  7 +obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
  8 +obj-$(CONFIG_SH_SHMIN) += board-shmin..o
arch/sh/boards/board-ap325rxa.c
Diff comments   View file @ c8b5d9d
  1 +/*
  2 + * Renesas - AP-325RXA
  3 + * (Compatible with Algo System ., LTD. - AP-320A)
  4 + *
  5 + * Copyright (C) 2008 Renesas Solutions Corp.
  6 + * Author : Yusuke Goda <goda.yuske@renesas.com>
  7 + *
  8 + * This file is subject to the terms and conditions of the GNU General Public
  9 + * License. See the file "COPYING" in the main directory of this archive
  10 + * for more details.
  11 + */
  12 +
  13 +#include <linux/init.h>
  14 +#include <linux/device.h>
  15 +#include <linux/interrupt.h>
  16 +#include <linux/platform_device.h>
  17 +#include <linux/mtd/physmap.h>
  18 +#include <linux/delay.h>
  19 +#include <linux/i2c.h>
  20 +#include <linux/delay.h>
  21 +#include <linux/smc911x.h>
  22 +#include <media/soc_camera_platform.h>
  23 +#include <media/sh_mobile_ceu.h>
  24 +#include <asm/sh_mobile_lcdc.h>
  25 +#include <asm/io.h>
  26 +#include <asm/clock.h>
  27 +
  28 +static struct smc911x_platdata smc911x_info = {
  29 + .flags = SMC911X_USE_32BIT,
  30 + .irq_flags = IRQF_TRIGGER_LOW,
  31 +};
  32 +
  33 +static struct resource smc9118_resources[] = {
  34 + [0] = {
  35 + .start = 0xb6080000,
  36 + .end = 0xb60fffff,
  37 + .flags = IORESOURCE_MEM,
  38 + },
  39 + [1] = {
  40 + .start = 35,
  41 + .end = 35,
  42 + .flags = IORESOURCE_IRQ,
  43 + }
  44 +};
  45 +
  46 +static struct platform_device smc9118_device = {
  47 + .name = "smc911x",
  48 + .id = -1,
  49 + .num_resources = ARRAY_SIZE(smc9118_resources),
  50 + .resource = smc9118_resources,
  51 + .dev = {
  52 + .platform_data = &smc911x_info,
  53 + },
  54 +};
  55 +
  56 +static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
  57 + {
  58 + .name = "uboot",
  59 + .offset = 0,
  60 + .size = (1 * 1024 * 1024),
  61 + .mask_flags = MTD_WRITEABLE, /* Read-only */
  62 + }, {
  63 + .name = "kernel",
  64 + .offset = MTDPART_OFS_APPEND,
  65 + .size = (2 * 1024 * 1024),
  66 + }, {
  67 + .name = "other",
  68 + .offset = MTDPART_OFS_APPEND,
  69 + .size = MTDPART_SIZ_FULL,
  70 + },
  71 +};
  72 +
  73 +static struct physmap_flash_data ap325rxa_nor_flash_data = {
  74 + .width = 2,
  75 + .parts = ap325rxa_nor_flash_partitions,
  76 + .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
  77 +};
  78 +
  79 +static struct resource ap325rxa_nor_flash_resources[] = {
  80 + [0] = {
  81 + .name = "NOR Flash",
  82 + .start = 0x00000000,
  83 + .end = 0x00ffffff,
  84 + .flags = IORESOURCE_MEM,
  85 + }
  86 +};
  87 +
  88 +static struct platform_device ap325rxa_nor_flash_device = {
  89 + .name = "physmap-flash",
  90 + .resource = ap325rxa_nor_flash_resources,
  91 + .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
  92 + .dev = {
  93 + .platform_data = &ap325rxa_nor_flash_data,
  94 + },
  95 +};
  96 +
  97 +#define FPGA_LCDREG 0xB4100180
  98 +#define FPGA_BKLREG 0xB4100212
  99 +#define FPGA_LCDREG_VAL 0x0018
  100 +#define PORT_PHCR 0xA405010E
  101 +#define PORT_PLCR 0xA4050114
  102 +#define PORT_PMCR 0xA4050116
  103 +#define PORT_PRCR 0xA405011C
  104 +#define PORT_PSCR 0xA405011E
  105 +#define PORT_PZCR 0xA405014C
  106 +#define PORT_HIZCRA 0xA4050158
  107 +#define PORT_MSELCRB 0xA4050182
  108 +#define PORT_PSDR 0xA405013E
  109 +#define PORT_PZDR 0xA405016C
  110 +#define PORT_PSELD 0xA4050154
  111 +
  112 +static void ap320_wvga_power_on(void *board_data)
  113 +{
  114 + msleep(100);
  115 +
  116 + /* ASD AP-320/325 LCD ON */
  117 + ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
  118 +
  119 + /* backlight */
  120 + ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
  121 + ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
  122 + ctrl_outw(0x100, FPGA_BKLREG);
  123 +}
  124 +
  125 +static struct sh_mobile_lcdc_info lcdc_info = {
  126 + .clock_source = LCDC_CLK_EXTERNAL,
  127 + .ch[0] = {
  128 + .chan = LCDC_CHAN_MAINLCD,
  129 + .bpp = 16,
  130 + .interface_type = RGB18,
  131 + .clock_divider = 1,
  132 + .lcd_cfg = {
  133 + .name = "LB070WV1",
  134 + .xres = 800,
  135 + .yres = 480,
  136 + .left_margin = 40,
  137 + .right_margin = 160,
  138 + .hsync_len = 8,
  139 + .upper_margin = 63,
  140 + .lower_margin = 80,
  141 + .vsync_len = 1,
  142 + .sync = 0, /* hsync and vsync are active low */
  143 + },
  144 + .board_cfg = {
  145 + .display_on = ap320_wvga_power_on,
  146 + },
  147 + }
  148 +};
  149 +
  150 +static struct resource lcdc_resources[] = {
  151 + [0] = {
  152 + .name = "LCDC",
  153 + .start = 0xfe940000, /* P4-only space */
  154 + .end = 0xfe941fff,
  155 + .flags = IORESOURCE_MEM,
  156 + },
  157 +};
  158 +
  159 +static struct platform_device lcdc_device = {
  160 + .name = "sh_mobile_lcdc_fb",
  161 + .num_resources = ARRAY_SIZE(lcdc_resources),
  162 + .resource = lcdc_resources,
  163 + .dev = {
  164 + .platform_data = &lcdc_info,
  165 + },
  166 +};
  167 +
  168 +#ifdef CONFIG_I2C
  169 +static unsigned char camera_ncm03j_magic[] =
  170 +{
  171 + 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
  172 + 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
  173 + 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
  174 + 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
  175 + 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
  176 + 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
  177 + 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
  178 + 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
  179 + 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
  180 + 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
  181 + 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
  182 + 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
  183 + 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
  184 + 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
  185 + 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
  186 + 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
  187 +};
  188 +
  189 +static int camera_set_capture(struct soc_camera_platform_info *info,
  190 + int enable)
  191 +{
  192 + struct i2c_adapter *a = i2c_get_adapter(0);
  193 + struct i2c_msg msg;
  194 + int ret = 0;
  195 + int i;
  196 +
  197 + if (!enable)
  198 + return 0; /* no disable for now */
  199 +
  200 + for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
  201 + u_int8_t buf[8];
  202 +
  203 + msg.addr = 0x6e;
  204 + msg.buf = buf;
  205 + msg.len = 2;
  206 + msg.flags = 0;
  207 +
  208 + buf[0] = camera_ncm03j_magic[i];
  209 + buf[1] = camera_ncm03j_magic[i + 1];
  210 +
  211 + ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
  212 + }
  213 +
  214 + return ret;
  215 +}
  216 +
  217 +static struct soc_camera_platform_info camera_info = {
  218 + .iface = 0,
  219 + .format_name = "UYVY",
  220 + .format_depth = 16,
  221 + .format = {
  222 + .pixelformat = V4L2_PIX_FMT_UYVY,
  223 + .colorspace = V4L2_COLORSPACE_SMPTE170M,
  224 + .width = 640,
  225 + .height = 480,
  226 + },
  227 + .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
  228 + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
  229 + .set_capture = camera_set_capture,
  230 +};
  231 +
  232 +static struct platform_device camera_device = {
  233 + .name = "soc_camera_platform",
  234 + .dev = {
  235 + .platform_data = &camera_info,
  236 + },
  237 +};
  238 +#endif /* CONFIG_I2C */
  239 +
  240 +static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  241 + .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
  242 + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
  243 +};
  244 +
  245 +static struct resource ceu_resources[] = {
  246 + [0] = {
  247 + .name = "CEU",
  248 + .start = 0xfe910000,
  249 + .end = 0xfe91009f,
  250 + .flags = IORESOURCE_MEM,
  251 + },
  252 + [1] = {
  253 + .start = 52,
  254 + .flags = IORESOURCE_IRQ,
  255 + },
  256 + [2] = {
  257 + /* place holder for contiguous memory */
  258 + },
  259 +};
  260 +
  261 +static struct platform_device ceu_device = {
  262 + .name = "sh_mobile_ceu",
  263 + .num_resources = ARRAY_SIZE(ceu_resources),
  264 + .resource = ceu_resources,
  265 + .dev = {
  266 + .platform_data = &sh_mobile_ceu_info,
  267 + },
  268 +};
  269 +
  270 +static struct platform_device *ap325rxa_devices[] __initdata = {
  271 + &smc9118_device,
  272 + &ap325rxa_nor_flash_device,
  273 + &lcdc_device,
  274 + &ceu_device,
  275 +#ifdef CONFIG_I2C
  276 + &camera_device,
  277 +#endif
  278 +};
  279 +
  280 +static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
  281 +};
  282 +
  283 +static int __init ap325rxa_devices_setup(void)
  284 +{
  285 + clk_always_enable("mstp200"); /* LCDC */
  286 + clk_always_enable("mstp203"); /* CEU */
  287 +
  288 + platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
  289 +
  290 + i2c_register_board_info(0, ap325rxa_i2c_devices,
  291 + ARRAY_SIZE(ap325rxa_i2c_devices));
  292 +
  293 + return platform_add_devices(ap325rxa_devices,
  294 + ARRAY_SIZE(ap325rxa_devices));
  295 +}
  296 +device_initcall(ap325rxa_devices_setup);
  297 +
  298 +static void __init ap325rxa_setup(char **cmdline_p)
  299 +{
  300 + /* LCDC configuration */
  301 + ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
  302 + ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
  303 + ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
  304 + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
  305 + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
  306 +
  307 + /* CEU */
  308 + ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
  309 + ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
  310 + ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
  311 + ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
  312 +}
  313 +
  314 +static struct sh_machine_vector mv_ap325rxa __initmv = {
  315 + .mv_name = "AP-325RXA",
  316 + .mv_setup = ap325rxa_setup,
  317 +};
arch/sh/boards/board-magicpanelr2.c
Diff comments   View file @ c8b5d9d
  1 +/*
  2 + * linux/arch/sh/boards/magicpanel/setup.c
  3 + *
  4 + * Copyright (C) 2007 Markus Brunner, Mark Jonas
  5 + *
  6 + * Magic Panel Release 2 board setup
  7 + *
  8 + * This file is subject to the terms and conditions of the GNU General Public
  9 + * License. See the file "COPYING" in the main directory of this archive
  10 + * for more details.
  11 + */
  12 +#include <linux/init.h>
  13 +#include <linux/irq.h>
  14 +#include <linux/platform_device.h>
  15 +#include <linux/delay.h>
  16 +#include <linux/mtd/mtd.h>
  17 +#include <linux/mtd/partitions.h>
  18 +#include <linux/mtd/physmap.h>
  19 +#include <linux/mtd/map.h>
  20 +#include <asm/magicpanelr2.h>
  21 +#include <asm/heartbeat.h>
  22 +
  23 +#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL)
  24 +
  25 +/* Prefer cmdline over RedBoot */
  26 +static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
  27 +
  28 +/* Wait until reset finished. Timeout is 100ms. */
  29 +static int __init ethernet_reset_finished(void)
  30 +{
  31 + int i;
  32 +
  33 + if (LAN9115_READY)
  34 + return 1;
  35 +
  36 + for (i = 0; i < 10; ++i) {
  37 + mdelay(10);
  38 + if (LAN9115_READY)
  39 + return 1;
  40 + }
  41 +
  42 + return 0;
  43 +}
  44 +
  45 +static void __init reset_ethernet(void)
  46 +{
  47 + /* PMDR: LAN_RESET=on */
  48 + CLRBITS_OUTB(0x10, PORT_PMDR);
  49 +
  50 + udelay(200);
  51 +
  52 + /* PMDR: LAN_RESET=off */
  53 + SETBITS_OUTB(0x10, PORT_PMDR);
  54 +}
  55 +
  56 +static void __init setup_chip_select(void)
  57 +{
  58 + /* CS2: LAN (0x08000000 - 0x0bffffff) */
  59 + /* no idle cycles, normal space, 8 bit data bus */
  60 + ctrl_outl(0x36db0400, CS2BCR);
  61 + /* (SW:1.5 WR:3 HW:1.5), ext. wait */
  62 + ctrl_outl(0x000003c0, CS2WCR);
  63 +
  64 + /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
  65 + /* no idle cycles, normal space, 8 bit data bus */
  66 + ctrl_outl(0x00000200, CS4BCR);
  67 + /* (SW:1.5 WR:3 HW:1.5), ext. wait */
  68 + ctrl_outl(0x00100981, CS4WCR);
  69 +
  70 + /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
  71 + /* no idle cycles, normal space, 8 bit data bus */
  72 + ctrl_outl(0x00000200, CS5ABCR);
  73 + /* (SW:1.5 WR:3 HW:1.5), ext. wait */
  74 + ctrl_outl(0x00100981, CS5AWCR);
  75 +
  76 + /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
  77 + /* no idle cycles, normal space, 8 bit data bus */
  78 + ctrl_outl(0x00000200, CS5BBCR);
  79 + /* (SW:1.5 WR:3 HW:1.5), ext. wait */
  80 + ctrl_outl(0x00100981, CS5BWCR);
  81 +
  82 + /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
  83 + /* no idle cycles, normal space, 8 bit data bus */
  84 + ctrl_outl(0x00000200, CS6ABCR);
  85 + /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
  86 + ctrl_outl(0x001009C1, CS6AWCR);
  87 +}
  88 +
  89 +static void __init setup_port_multiplexing(void)
  90 +{
  91 + /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
  92 + * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
  93 + */
  94 + ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
  95 +
  96 + /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
  97 + * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
  98 + */
  99 + ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
  100 +
  101 + /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
  102 + * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
  103 + */
  104 + ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
  105 +
  106 + /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
  107 + * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
  108 + */
  109 + ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
  110 +
  111 + /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
  112 + * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
  113 + */
  114 + ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
  115 +
  116 + /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
  117 + * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
  118 + */
  119 + ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
  120 +
  121 + /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
  122 + * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
  123 + */
  124 + ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
  125 +
  126 + /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
  127 + * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
  128 + */
  129 + ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
  130 +
  131 + /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
  132 + * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
  133 + */
  134 + ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
  135 +
  136 + /* K7 (x); K6 (x); K5 (x); K4 (x);
  137 + * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
  138 + */
  139 + ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
  140 +
  141 + /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
  142 + * L3 TCK; L2 (x); L1 (x); L0 (x);
  143 + */
  144 + ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
  145 +
  146 + /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
  147 + * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
  148 + * M1 CS5B(CAN3_CS); M0 GPI+(nc);
  149 + */
  150 + ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
  151 +
  152 + /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
  153 + * LAN_RESET=off, BUZZER=off, LCD_BL=off
  154 + */
  155 +#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
  156 + ctrl_outb(0x30, PORT_PMDR);
  157 +#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
  158 + ctrl_outb(0xF0, PORT_PMDR);
  159 +#else
  160 +#error Unknown revision of PLATFORM_MP_R2
  161 +#endif
  162 +
  163 + /* P7 (x); P6 (x); P5 (x);
  164 + * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
  165 + * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
  166 + */
  167 + ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
  168 + ctrl_outb(0x10, PORT_PPDR);
  169 +
  170 + /* R7 A25; R6 A24; R5 A23; R4 A22;
  171 + * R3 A21; R2 A20; R1 A19; R0 A0;
  172 + */
  173 + ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */
  174 +
  175 + /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
  176 + * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
  177 + */
  178 + ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
  179 +
  180 + /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
  181 + * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
  182 + */
  183 + ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
  184 +
  185 + /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
  186 + * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
  187 + */
  188 + ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
  189 +
  190 + /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
  191 + * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
  192 + */
  193 + ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
  194 +}
  195 +
  196 +static void __init mpr2_setup(char **cmdline_p)
  197 +{
  198 + __set_io_port_base(0xa0000000);
  199 +
  200 + /* set Pin Select Register A:
  201 + * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
  202 + * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
  203 + */
  204 + ctrl_outw(0xAABC, PORT_PSELA);
  205 + /* set Pin Select Register B:
  206 + * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
  207 + * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
  208 + */
  209 + ctrl_outw(0x3C00, PORT_PSELB);
  210 + /* set Pin Select Register C:
  211 + * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
  212 + */
  213 + ctrl_outw(0x0000, PORT_PSELC);
  214 + /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
  215 + * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
  216 + */
  217 + ctrl_outw(0x0000, PORT_PSELD);
  218 + /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
  219 + ctrl_outw(0x0101, PORT_UTRCTL);
  220 + /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
  221 + ctrl_outw(0xA5C0, PORT_UCLKCR_W);
  222 +
  223 + setup_chip_select();
  224 +
  225 + setup_port_multiplexing();
  226 +
  227 + reset_ethernet();
  228 +
  229 + printk(KERN_INFO "Magic Panel Release 2 A.%i\n",
  230 + CONFIG_SH_MAGIC_PANEL_R2_VERSION);
  231 +
  232 + if (ethernet_reset_finished() == 0)
  233 + printk(KERN_WARNING "Ethernet not ready\n");
  234 +}
  235 +
  236 +static struct resource smc911x_resources[] = {
  237 + [0] = {
  238 + .start = 0xa8000000,
  239 + .end = 0xabffffff,
  240 + .flags = IORESOURCE_MEM,
  241 + },
  242 + [1] = {
  243 + .start = 35,
  244 + .end = 35,
  245 + .flags = IORESOURCE_IRQ,
  246 + },
  247 +};
  248 +
  249 +static struct platform_device smc911x_device = {
  250 + .name = "smc911x",
  251 + .id = -1,
  252 + .num_resources = ARRAY_SIZE(smc911x_resources),
  253 + .resource = smc911x_resources,
  254 +};
  255 +
  256 +static struct resource heartbeat_resources[] = {
  257 + [0] = {
  258 + .start = PA_LED,
  259 + .end = PA_LED,
  260 + .flags = IORESOURCE_MEM,
  261 + },
  262 +};
  263 +
  264 +static struct heartbeat_data heartbeat_data = {
  265 + .flags = HEARTBEAT_INVERTED,
  266 +};
  267 +
  268 +static struct platform_device heartbeat_device = {
  269 + .name = "heartbeat",
  270 + .id = -1,
  271 + .dev = {
  272 + .platform_data = &heartbeat_data,
  273 + },
  274 + .num_resources = ARRAY_SIZE(heartbeat_resources),
  275 + .resource = heartbeat_resources,
  276 +};
  277 +
  278 +static struct mtd_partition *parsed_partitions;
  279 +
  280 +static struct mtd_partition mpr2_partitions[] = {
  281 + /* Reserved for bootloader, read-only */
  282 + {
  283 + .name = "Bootloader",
  284 + .offset = 0x00000000UL,
  285 + .size = MPR2_MTD_BOOTLOADER_SIZE,
  286 + .mask_flags = MTD_WRITEABLE,
  287 + },
  288 + /* Reserved for kernel image */
  289 + {
  290 + .name = "Kernel",
  291 + .offset = MTDPART_OFS_NXTBLK,
  292 + .size = MPR2_MTD_KERNEL_SIZE,
  293 + },
  294 + /* Rest is used for Flash FS */
  295 + {
  296 + .name = "Flash_FS",
  297 + .offset = MTDPART_OFS_NXTBLK,
  298 + .size = MTDPART_SIZ_FULL,
  299 + }
  300 +};
  301 +
  302 +static struct physmap_flash_data flash_data = {
  303 + .width = 2,
  304 +};
  305 +
  306 +static struct resource flash_resource = {
  307 + .start = 0x00000000,
  308 + .end = 0x2000000UL,
  309 + .flags = IORESOURCE_MEM,
  310 +};
  311 +
  312 +static struct platform_device flash_device = {
  313 + .name = "physmap-flash",
  314 + .id = -1,
  315 + .resource = &flash_resource,
  316 + .num_resources = 1,
  317 + .dev = {
  318 + .platform_data = &flash_data,
  319 + },
  320 +};
  321 +
  322 +static struct mtd_info *flash_mtd;
  323 +
  324 +static struct map_info mpr2_flash_map = {
  325 + .name = "Magic Panel R2 Flash",
  326 + .size = 0x2000000UL,
  327 + .bankwidth = 2,
  328 +};
  329 +
  330 +static void __init set_mtd_partitions(void)
  331 +{
  332 + int nr_parts = 0;
  333 +
  334 + simple_map_init(&mpr2_flash_map);
  335 + flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map);
  336 + nr_parts = parse_mtd_partitions(flash_mtd, probes,
  337 + &parsed_partitions, 0);
  338 + /* If there is no partition table, used the hard coded table */
  339 + if (nr_parts <= 0) {
  340 + flash_data.parts = mpr2_partitions;
  341 + flash_data.nr_parts = ARRAY_SIZE(mpr2_partitions);
  342 + } else {
  343 + flash_data.nr_parts = nr_parts;
  344 + flash_data.parts = parsed_partitions;
  345 + }
  346 +}
  347 +
  348 +/*
  349 + * Add all resources to the platform_device
  350 + */
  351 +
  352 +static struct platform_device *mpr2_devices[] __initdata = {
  353 + &heartbeat_device,
  354 + &smc911x_device,
  355 + &flash_device,
  356 +};
  357 +
  358 +
  359 +static int __init mpr2_devices_setup(void)
  360 +{
  361 + set_mtd_partitions();
  362 + return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices));
  363 +}
  364 +device_initcall(mpr2_devices_setup);
  365 +
  366 +/*
  367 + * Initialize IRQ setting
  368 + */
  369 +static void __init init_mpr2_IRQ(void)
  370 +{
  371 + plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */
  372 +
  373 + set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
  374 + set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
  375 + set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
  376 + set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
  377 + set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
  378 + set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
  379 +
  380 + intc_set_priority(32, 13); /* IRQ0 CAN1 */
  381 + intc_set_priority(33, 13); /* IRQ0 CAN2 */
  382 + intc_set_priority(34, 13); /* IRQ0 CAN3 */
  383 + intc_set_priority(35, 6); /* IRQ3 SMSC9115 */
  384 +}
  385 +
  386 +/*
  387 + * The Machine Vector
  388 + */
  389 +
  390 +static struct sh_machine_vector mv_mpr2 __initmv = {
  391 + .mv_name = "mpr2",
  392 + .mv_setup = mpr2_setup,
  393 + .mv_init_irq = init_mpr2_IRQ,
  394 +};
arch/sh/boards/board-rsk7203.c
Diff comments   View file @ c8b5d9d
  1 +/*
  2 + * Renesas Technology Europe RSK+ 7203 Support.
  3 + *
  4 + * Copyright (C) 2008 Paul Mundt
  5 + *
  6 + * This file is subject to the terms and conditions of the GNU General Public
  7 + * License. See the file "COPYING" in the main directory of this archive
  8 + * for more details.
  9 + */
  10 +#include <linux/init.h>
  11 +#include <linux/types.h>
  12 +#include <linux/platform_device.h>
  13 +#include <linux/interrupt.h>
  14 +#include <linux/mtd/mtd.h>
  15 +#include <linux/mtd/partitions.h>
  16 +#include <linux/mtd/physmap.h>
  17 +#include <linux/mtd/map.h>
  18 +#include <linux/smc911x.h>
  19 +#include <asm/machvec.h>
  20 +#include <asm/io.h>
  21 +
  22 +static struct smc911x_platdata smc911x_info = {
  23 + .flags = SMC911X_USE_16BIT,
  24 + .irq_flags = IRQF_TRIGGER_LOW,
  25 +};
  26 +
  27 +static struct resource smc911x_resources[] = {
  28 + [0] = {
  29 + .start = 0x24000000,
  30 + .end = 0x24000000 + 0x100,
  31 + .flags = IORESOURCE_MEM,
  32 + },
  33 + [1] = {
  34 + .start = 64,
  35 + .end = 64,
  36 + .flags = IORESOURCE_IRQ,
  37 + },
  38 +};
  39 +
  40 +static struct platform_device smc911x_device = {
  41 + .name = "smc911x",
  42 + .id = -1,
  43 + .num_resources = ARRAY_SIZE(smc911x_resources),
  44 + .resource = smc911x_resources,
  45 + .dev = {
  46 + .platform_data = &smc911x_info,
  47 + },
  48 +};
  49 +
  50 +static const char *probes[] = { "cmdlinepart", NULL };
  51 +
  52 +static struct mtd_partition *parsed_partitions;
  53 +
  54 +static struct mtd_partition rsk7203_partitions[] = {
  55 + {
  56 + .name = "Bootloader",
  57 + .offset = 0x00000000,
  58 + .size = 0x00040000,
  59 + .mask_flags = MTD_WRITEABLE,
  60 + }, {
  61 + .name = "Kernel",
  62 + .offset = MTDPART_OFS_NXTBLK,
  63 + .size = 0x001c0000,
  64 + }, {
  65 + .name = "Flash_FS",
  66 + .offset = MTDPART_OFS_NXTBLK,
  67 + .size = MTDPART_SIZ_FULL,
  68 + }
  69 +};
  70 +
  71 +static struct physmap_flash_data flash_data = {
  72 + .width = 2,
  73 +};
  74 +
  75 +static struct resource flash_resource = {
  76 + .start = 0x20000000,
  77 + .end = 0x20400000,
  78 + .flags = IORESOURCE_MEM,
  79 +};
  80 +
  81 +static struct platform_device flash_device = {
  82 + .name = "physmap-flash",
  83 + .id = -1,
  84 + .resource = &flash_resource,
  85 + .num_resources = 1,
  86 + .dev = {
  87 + .platform_data = &flash_data,
  88 + },
  89 +};
  90 +
  91 +static struct mtd_info *flash_mtd;
  92 +
  93 +static struct map_info rsk7203_flash_map = {
  94 + .name = "RSK+ Flash",
  95 + .size = 0x400000,
  96 + .bankwidth = 2,
  97 +};
  98 +
  99 +static void __init set_mtd_partitions(void)
  100 +{
  101 + int nr_parts = 0;
  102 +
  103 + simple_map_init(&rsk7203_flash_map);
  104 + flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map);
  105 + nr_parts = parse_mtd_partitions(flash_mtd, probes,
  106 + &parsed_partitions, 0);
  107 + /* If there is no partition table, used the hard coded table */
  108 + if (nr_parts <= 0) {
  109 + flash_data.parts = rsk7203_partitions;
  110 + flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions);
  111 + } else {
  112 + flash_data.nr_parts = nr_parts;
  113 + flash_data.parts = parsed_partitions;
  114 + }
  115 +}
  116 +
  117 +
  118 +static struct platform_device *rsk7203_devices[] __initdata = {
  119 + &smc911x_device,
  120 + &flash_device,
  121 +};
  122 +
  123 +static int __init rsk7203_devices_setup(void)
  124 +{
  125 + set_mtd_partitions();
  126 + return platform_add_devices(rsk7203_devices,
  127 + ARRAY_SIZE(rsk7203_devices));
  128 +}
  129 +device_initcall(rsk7203_devices_setup);
  130 +
  131 +/*
  132 + * The Machine Vector
  133 + */
  134 +static struct sh_machine_vector mv_rsk7203 __initmv = {
  135 + .mv_name = "RSK+7203",
  136 +};
arch/sh/boards/board-sh7785lcr.c
Diff comments   View file @ c8b5d9d
  1 +/*
  2 + * Renesas Technology Corp. R0P7785LC0011RL Support.
  3 + *
  4 + * Copyright (C) 2008 Yoshihiro Shimoda
  5 + *
  6 + * This file is subject to the terms and conditions of the GNU General Public
  7 + * License. See the file "COPYING" in the main directory of this archive
  8 + * for more details.
  9 + */
  10 +
  11 +#include <linux/init.h>
  12 +#include <linux/platform_device.h>
  13 +#include <linux/sm501.h>
  14 +#include <linux/sm501-regs.h>
  15 +#include <linux/fb.h>
  16 +#include <linux/mtd/physmap.h>
  17 +#include <linux/delay.h>
  18 +#include <linux/i2c.h>
  19 +#include <linux/i2c-pca-platform.h>
  20 +#include <linux/i2c-algo-pca.h>
  21 +#include <asm/heartbeat.h>
  22 +#include <asm/sh7785lcr.h>
  23 +
  24 +/*
  25 + * NOTE: This board has 2 physical memory maps.
  26 + * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  27 + */
  28 +static struct resource heartbeat_resources[] = {
  29 + [0] = {
  30 + .start = PLD_LEDCR,
  31 + .end = PLD_LEDCR,
  32 + .flags = IORESOURCE_MEM,
  33 + },
  34 +};
  35 +
  36 +static struct heartbeat_data heartbeat_data = {
  37 + .regsize = 8,
  38 +};
  39 +
  40 +static struct platform_device heartbeat_device = {
  41 + .name = "heartbeat",
  42 + .id = -1,
  43 + .dev = {
  44 + .platform_data = &heartbeat_data,
  45 + },
  46 + .num_resources = ARRAY_SIZE(heartbeat_resources),
  47 + .resource = heartbeat_resources,
  48 +};
  49 +
  50 +static struct mtd_partition nor_flash_partitions[] = {
  51 + {
  52 + .name = "loader",
  53 + .offset = 0x00000000,
  54 + .size = 512 * 1024,
  55 + },
  56 + {
  57 + .name = "bootenv",
  58 + .offset = MTDPART_OFS_APPEND,
  59 + .size = 512 * 1024,
  60 + },
  61 + {
  62 + .name = "kernel",
  63 + .offset = MTDPART_OFS_APPEND,
  64 + .size = 4 * 1024 * 1024,
  65 + },
  66 + {
  67 + .name = "data",
  68 + .offset = MTDPART_OFS_APPEND,
  69 + .size = MTDPART_SIZ_FULL,
  70 + },
  71 +};
  72 +
  73 +static struct physmap_flash_data nor_flash_data = {
  74 + .width = 4,
  75 + .parts = nor_flash_partitions,
  76 + .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  77 +};
  78 +
  79 +static struct resource nor_flash_resources[] = {
  80 + [0] = {
  81 + .start = NOR_FLASH_ADDR,
  82 + .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  83 + .flags = IORESOURCE_MEM,
  84 + }
  85 +};
  86 +
  87 +static struct platform_device nor_flash_device = {
  88 + .name = "physmap-flash",
  89 + .dev = {
  90 + .platform_data = &nor_flash_data,
  91 + },
  92 + .num_resources = ARRAY_SIZE(nor_flash_resources),
  93 + .resource = nor_flash_resources,
  94 +};
  95 +
  96 +static struct resource r8a66597_usb_host_resources[] = {
  97 + [0] = {
  98 + .name = "r8a66597_hcd",
  99 + .start = R8A66597_ADDR,
  100 + .end = R8A66597_ADDR + R8A66597_SIZE - 1,
  101 + .flags = IORESOURCE_MEM,
  102 + },
  103 + [1] = {
  104 + .name = "r8a66597_hcd",
  105 + .start = 2,
  106 + .end = 2,
  107 + .flags = IORESOURCE_IRQ,
  108 + },
  109 +};
  110 +
  111 +static struct platform_device r8a66597_usb_host_device = {
  112 + .name = "r8a66597_hcd",
  113 + .id = -1,
  114 + .dev = {
  115 + .dma_mask = NULL,
  116 + .coherent_dma_mask = 0xffffffff,
  117 + },
  118 + .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
  119 + .resource = r8a66597_usb_host_resources,
  120 +};
  121 +
  122 +static struct resource sm501_resources[] = {
  123 + [0] = {
  124 + .start = SM107_MEM_ADDR,
  125 + .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
  126 + .flags = IORESOURCE_MEM,
  127 + },
  128 + [1] = {
  129 + .start = SM107_REG_ADDR,
  130 + .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
  131 + .flags = IORESOURCE_MEM,
  132 + },
  133 + [2] = {
  134 + .start = 10,
  135 + .flags = IORESOURCE_IRQ,
  136 + },
  137 +};
  138 +
  139 +static struct fb_videomode sm501_default_mode_crt = {
  140 + .pixclock = 35714, /* 28MHz */
  141 + .xres = 640,
  142 + .yres = 480,
  143 + .left_margin = 105,
  144 + .right_margin = 16,
  145 + .upper_margin = 33,
  146 + .lower_margin = 10,
  147 + .hsync_len = 39,
  148 + .vsync_len = 2,
  149 + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  150 +};
  151 +
  152 +static struct fb_videomode sm501_default_mode_pnl = {
  153 + .pixclock = 40000, /* 25MHz */
  154 + .xres = 640,
  155 + .yres = 480,
  156 + .left_margin = 2,
  157 + .right_margin = 16,
  158 + .upper_margin = 33,
  159 + .lower_margin = 10,
  160 + .hsync_len = 39,
  161 + .vsync_len = 2,
  162 + .sync = 0,
  163 +};
  164 +
  165 +static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
  166 + .def_bpp = 16,
  167 + .def_mode = &sm501_default_mode_pnl,
  168 + .flags = SM501FB_FLAG_USE_INIT_MODE |
  169 + SM501FB_FLAG_USE_HWCURSOR |
  170 + SM501FB_FLAG_USE_HWACCEL |
  171 + SM501FB_FLAG_DISABLE_AT_EXIT |
  172 + SM501FB_FLAG_PANEL_NO_VBIASEN,
  173 +};
  174 +
  175 +static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
  176 + .def_bpp = 16,
  177 + .def_mode = &sm501_default_mode_crt,
  178 + .flags = SM501FB_FLAG_USE_INIT_MODE |
  179 + SM501FB_FLAG_USE_HWCURSOR |
  180 + SM501FB_FLAG_USE_HWACCEL |
  181 + SM501FB_FLAG_DISABLE_AT_EXIT,
  182 +};
  183 +
  184 +static struct sm501_platdata_fb sm501_fb_pdata = {
  185 + .fb_route = SM501_FB_OWN,
  186 + .fb_crt = &sm501_pdata_fbsub_crt,
  187 + .fb_pnl = &sm501_pdata_fbsub_pnl,
  188 +};
  189 +
  190 +static struct sm501_initdata sm501_initdata = {
  191 + .gpio_high = {
  192 + .set = 0x00001fe0,
  193 + .mask = 0x0,
  194 + },
  195 + .devices = 0,
  196 + .mclk = 84 * 1000000,
  197 + .m1xclk = 112 * 1000000,
  198 +};
  199 +
  200 +static struct sm501_platdata sm501_platform_data = {
  201 + .init = &sm501_initdata,
  202 + .fb = &sm501_fb_pdata,
  203 +};
  204 +
  205 +static struct platform_device sm501_device = {
  206 + .name = "sm501",
  207 + .id = -1,
  208 + .dev = {
  209 + .platform_data = &sm501_platform_data,
  210 + },
  211 + .num_resources = ARRAY_SIZE(sm501_resources),
  212 + .resource = sm501_resources,
  213 +};
  214 +
  215 +static struct resource i2c_resources[] = {
  216 + [0] = {
  217 + .start = PCA9564_ADDR,
  218 + .end = PCA9564_ADDR + PCA9564_SIZE - 1,
  219 + .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  220 + },
  221 + [1] = {
  222 + .start = 12,
  223 + .end = 12,
  224 + .flags = IORESOURCE_IRQ,
  225 + },
  226 +};
  227 +
  228 +static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
  229 + .gpio = 0,
  230 + .i2c_clock_speed = I2C_PCA_CON_330kHz,
  231 + .timeout = 100,
  232 +};
  233 +
  234 +static struct platform_device i2c_device = {
  235 + .name = "i2c-pca-platform",
  236 + .id = -1,
  237 + .dev = {
  238 + .platform_data = &i2c_platform_data,
  239 + },
  240 + .num_resources = ARRAY_SIZE(i2c_resources),
  241 + .resource = i2c_resources,
  242 +};
  243 +
  244 +static struct platform_device *sh7785lcr_devices[] __initdata = {
  245 + &heartbeat_device,
  246 + &nor_flash_device,
  247 + &r8a66597_usb_host_device,
  248 + &sm501_device,
  249 + &i2c_device,
  250 +};
  251 +
  252 +static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
  253 + {
  254 + I2C_BOARD_INFO("r2025sd", 0x32),
  255 + },
  256 +};
  257 +
  258 +static int __init sh7785lcr_devices_setup(void)
  259 +{
  260 + i2c_register_board_info(0, sh7785lcr_i2c_devices,
  261 + ARRAY_SIZE(sh7785lcr_i2c_devices));
  262 +
  263 + return platform_add_devices(sh7785lcr_devices,
  264 + ARRAY_SIZE(sh7785lcr_devices));
  265 +}
  266 +__initcall(sh7785lcr_devices_setup);
  267 +
  268 +/* Initialize IRQ setting */
  269 +void __init init_sh7785lcr_IRQ(void)
  270 +{
  271 + plat_irq_setup_pins(IRQ_MODE_IRQ7654);
  272 + plat_irq_setup_pins(IRQ_MODE_IRQ3210);
  273 +}
  274 +
  275 +static void sh7785lcr_power_off(void)
  276 +{
  277 + ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
  278 +}
  279 +
  280 +/* Initialize the board */
  281 +static void __init sh7785lcr_setup(char **cmdline_p)
  282 +{
  283 + void __iomem *sm501_reg;
  284 +
  285 + printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
  286 +
  287 + pm_power_off = sh7785lcr_power_off;
  288 +
  289 + /* sm501 DRAM configuration */
  290 + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
  291 + writel(0x000307c2, sm501_reg);
  292 +}
  293 +
  294 +/*
  295 + * The Machine Vector
  296 + */
  297 +static struct sh_machine_vector mv_sh7785lcr __initmv = {
  298 + .mv_name = "SH7785LCR",
  299 + .mv_setup = sh7785lcr_setup,
  300 + .mv_init_irq = init_sh7785lcr_IRQ,
  301 +};
arch/sh/boards/board-shmin.c
Diff comments   View file @ c8b5d9d
  1 +/*
  2 + * arch/sh/boards/shmin/setup.c
  3 + *
  4 + * Copyright (C) 2006 Takashi YOSHII
  5 + *
  6 + * SHMIN Support.
  7 + */
  8 +#include <linux/init.h>
  9 +#include <linux/irq.h>
  10 +#include <asm/machvec.h>
  11 +#include <asm/shmin.h>
  12 +#include <asm/clock.h>
  13 +#include <asm/io.h>
  14 +
  15 +#define PFC_PHCR 0xa400010eUL
  16 +#define INTC_ICR1 0xa4000010UL
  17 +
  18 +static void __init init_shmin_irq(void)
  19 +{
  20 + ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
  21 + ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
  22 + plat_irq_setup_pins(IRQ_MODE_IRQ);
  23 +}
  24 +
  25 +static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
  26 +{
  27 + static int dummy;
  28 +
  29 + if ((port & ~0x1f) == SHMIN_NE_BASE)
  30 + return (void __iomem *)(SHMIN_IO_BASE + port);
  31 +
  32 + dummy = 0;
  33 +
  34 + return &dummy;
  35 +
  36 +}
  37 +
  38 +static struct sh_machine_vector mv_shmin __initmv = {
  39 + .mv_name = "SHMIN",
  40 + .mv_init_irq = init_shmin_irq,
  41 + .mv_ioport_map = shmin_ioport_map,
  42 +};
arch/sh/boards/mach-ap325rxa/Makefile
View file @ c8b5d9d
1   -obj-y := setup.o
arch/sh/boards/mach-ap325rxa/setup.c
View file @ c8b5d9d
1   -/*
2   - * Renesas - AP-325RXA
3   - * (Compatible with Algo System ., LTD. - AP-320A)
4   - *
5   - * Copyright (C) 2008 Renesas Solutions Corp.
6   - * Author : Yusuke Goda <goda.yuske@renesas.com>
7   - *
8   - * This file is subject to the terms and conditions of the GNU General Public
9   - * License. See the file "COPYING" in the main directory of this archive
10   - * for more details.
11   - */
12   -
13   -#include <linux/init.h>
14   -#include <linux/device.h>
15   -#include <linux/interrupt.h>
16   -#include <linux/platform_device.h>
17   -#include <linux/mtd/physmap.h>
18   -#include <linux/delay.h>
19   -#include <linux/i2c.h>
20   -#include <linux/delay.h>
21   -#include <linux/smc911x.h>
22   -#include <media/soc_camera_platform.h>
23   -#include <media/sh_mobile_ceu.h>
24   -#include <asm/sh_mobile_lcdc.h>
25   -#include <asm/io.h>
26   -#include <asm/clock.h>
27   -
28   -static struct smc911x_platdata smc911x_info = {
29   - .flags = SMC911X_USE_32BIT,
30   - .irq_flags = IRQF_TRIGGER_LOW,
31   -};
32   -
33   -static struct resource smc9118_resources[] = {
34   - [0] = {
35   - .start = 0xb6080000,
36   - .end = 0xb60fffff,
37   - .flags = IORESOURCE_MEM,
38   - },
39   - [1] = {
40   - .start = 35,
41   - .end = 35,
42   - .flags = IORESOURCE_IRQ,
43   - }
44   -};
45   -
46   -static struct platform_device smc9118_device = {
47   - .name = "smc911x",
48   - .id = -1,
49   - .num_resources = ARRAY_SIZE(smc9118_resources),
50   - .resource = smc9118_resources,
51   - .dev = {
52   - .platform_data = &smc911x_info,
53   - },
54   -};
55   -
56   -static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
57   - {
58   - .name = "uboot",
59   - .offset = 0,
60   - .size = (1 * 1024 * 1024),
61   - .mask_flags = MTD_WRITEABLE, /* Read-only */
62   - }, {
63   - .name = "kernel",
64   - .offset = MTDPART_OFS_APPEND,
65   - .size = (2 * 1024 * 1024),
66   - }, {
67   - .name = "other",
68   - .offset = MTDPART_OFS_APPEND,
69   - .size = MTDPART_SIZ_FULL,
70   - },
71   -};
72   -
73   -static struct physmap_flash_data ap325rxa_nor_flash_data = {
74   - .width = 2,
75   - .parts = ap325rxa_nor_flash_partitions,
76   - .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
77   -};
78   -
79   -static struct resource ap325rxa_nor_flash_resources[] = {
80   - [0] = {
81   - .name = "NOR Flash",
82   - .start = 0x00000000,
83   - .end = 0x00ffffff,
84   - .flags = IORESOURCE_MEM,
85   - }
86   -};
87   -
88   -static struct platform_device ap325rxa_nor_flash_device = {
89   - .name = "physmap-flash",
90   - .resource = ap325rxa_nor_flash_resources,
91   - .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
92   - .dev = {
93   - .platform_data = &ap325rxa_nor_flash_data,
94   - },
95   -};
96   -
97   -#define FPGA_LCDREG 0xB4100180
98   -#define FPGA_BKLREG 0xB4100212
99   -#define FPGA_LCDREG_VAL 0x0018
100   -#define PORT_PHCR 0xA405010E
101   -#define PORT_PLCR 0xA4050114
102   -#define PORT_PMCR 0xA4050116
103   -#define PORT_PRCR 0xA405011C
104   -#define PORT_PSCR 0xA405011E
105   -#define PORT_PZCR 0xA405014C
106   -#define PORT_HIZCRA 0xA4050158
107   -#define PORT_MSELCRB 0xA4050182
108   -#define PORT_PSDR 0xA405013E
109   -#define PORT_PZDR 0xA405016C
110   -#define PORT_PSELD 0xA4050154
111   -
112   -static void ap320_wvga_power_on(void *board_data)
113   -{
114   - msleep(100);
115   -
116   - /* ASD AP-320/325 LCD ON */
117   - ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
118   -
119   - /* backlight */
120   - ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR);
121   - ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
122   - ctrl_outw(0x100, FPGA_BKLREG);
123   -}
124   -
125   -static struct sh_mobile_lcdc_info lcdc_info = {
126   - .clock_source = LCDC_CLK_EXTERNAL,
127   - .ch[0] = {
128   - .chan = LCDC_CHAN_MAINLCD,
129   - .bpp = 16,
130   - .interface_type = RGB18,
131   - .clock_divider = 1,
132   - .lcd_cfg = {
133   - .name = "LB070WV1",
134   - .xres = 800,
135   - .yres = 480,
136   - .left_margin = 40,
137   - .right_margin = 160,
138   - .hsync_len = 8,
139   - .upper_margin = 63,
140   - .lower_margin = 80,
141   - .vsync_len = 1,
142   - .sync = 0, /* hsync and vsync are active low */
143   - },
144   - .board_cfg = {
145   - .display_on = ap320_wvga_power_on,
146   - },
147   - }
148   -};
149   -
150   -static struct resource lcdc_resources[] = {
151   - [0] = {
152   - .name = "LCDC",
153   - .start = 0xfe940000, /* P4-only space */
154   - .end = 0xfe941fff,
155   - .flags = IORESOURCE_MEM,
156   - },
157   -};
158   -
159   -static struct platform_device lcdc_device = {
160   - .name = "sh_mobile_lcdc_fb",
161   - .num_resources = ARRAY_SIZE(lcdc_resources),
162   - .resource = lcdc_resources,
163   - .dev = {
164   - .platform_data = &lcdc_info,
165   - },
166   -};
167   -
168   -#ifdef CONFIG_I2C
169   -static unsigned char camera_ncm03j_magic[] =
170   -{
171   - 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
172   - 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
173   - 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
174   - 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
175   - 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
176   - 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
177   - 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
178   - 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
179   - 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
180   - 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
181   - 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
182   - 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
183   - 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
184   - 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
185   - 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
186   - 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
187   -};
188   -
189   -static int camera_set_capture(struct soc_camera_platform_info *info,
190   - int enable)
191   -{
192   - struct i2c_adapter *a = i2c_get_adapter(0);
193   - struct i2c_msg msg;
194   - int ret = 0;
195   - int i;
196   -
197   - if (!enable)
198   - return 0; /* no disable for now */
199   -
200   - for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
201   - u_int8_t buf[8];
202   -
203   - msg.addr = 0x6e;
204   - msg.buf = buf;
205   - msg.len = 2;
206   - msg.flags = 0;
207   -
208   - buf[0] = camera_ncm03j_magic[i];
209   - buf[1] = camera_ncm03j_magic[i + 1];
210   -
211   - ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
212   - }
213   -
214   - return ret;
215   -}
216   -
217   -static struct soc_camera_platform_info camera_info = {
218   - .iface = 0,
219   - .format_name = "UYVY",
220   - .format_depth = 16,
221   - .format = {
222   - .pixelformat = V4L2_PIX_FMT_UYVY,
223   - .colorspace = V4L2_COLORSPACE_SMPTE170M,
224   - .width = 640,
225   - .height = 480,
226   - },
227   - .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
228   - SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
229   - .set_capture = camera_set_capture,
230   -};
231   -
232   -static struct platform_device camera_device = {
233   - .name = "soc_camera_platform",
234   - .dev = {
235   - .platform_data = &camera_info,
236   - },
237   -};
238   -#endif /* CONFIG_I2C */
239   -
240   -static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
241   - .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
242   - SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
243   -};
244   -
245   -static struct resource ceu_resources[] = {
246   - [0] = {
247   - .name = "CEU",
248   - .start = 0xfe910000,
249   - .end = 0xfe91009f,
250   - .flags = IORESOURCE_MEM,
251   - },
252   - [1] = {
253   - .start = 52,
254   - .flags = IORESOURCE_IRQ,
255   - },
256   - [2] = {
257   - /* place holder for contiguous memory */
258   - },
259   -};
260   -
261   -static struct platform_device ceu_device = {
262   - .name = "sh_mobile_ceu",
263   - .num_resources = ARRAY_SIZE(ceu_resources),
264   - .resource = ceu_resources,
265   - .dev = {
266   - .platform_data = &sh_mobile_ceu_info,
267   - },
268   -};
269   -
270   -static struct platform_device *ap325rxa_devices[] __initdata = {
271   - &smc9118_device,
272   - &ap325rxa_nor_flash_device,
273   - &lcdc_device,
274   - &ceu_device,
275   -#ifdef CONFIG_I2C
276   - &camera_device,
277   -#endif
278   -};
279   -
280   -static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
281   -};
282   -
283   -static int __init ap325rxa_devices_setup(void)
284   -{
285   - clk_always_enable("mstp200"); /* LCDC */
286   - clk_always_enable("mstp203"); /* CEU */
287   -
288   - platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
289   -
290   - i2c_register_board_info(0, ap325rxa_i2c_devices,
291   - ARRAY_SIZE(ap325rxa_i2c_devices));
292   -
293   - return platform_add_devices(ap325rxa_devices,
294   - ARRAY_SIZE(ap325rxa_devices));
295   -}
296   -device_initcall(ap325rxa_devices_setup);
297   -
298   -static void __init ap325rxa_setup(char **cmdline_p)
299   -{
300   - /* LCDC configuration */
301   - ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
302   - ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
303   - ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
304   - ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
305   - ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
306   -
307   - /* CEU */
308   - ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
309   - ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
310   - ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
311   - ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
312   -}
313   -
314   -static struct sh_machine_vector mv_ap325rxa __initmv = {
315   - .mv_name = "AP-325RXA",
316   - .mv_setup = ap325rxa_setup,
317   -};
arch/sh/boards/mach-magicpanelr2/Kconfig
View file @ c8b5d9d
1   -if SH_MAGIC_PANEL_R2
2   -
3   -menu "Magic Panel R2 options"
4   -
5   -config SH_MAGIC_PANEL_R2_VERSION
6   - int SH_MAGIC_PANEL_R2_VERSION
7   - default "3"
8   - help
9   - Set the version of the Magic Panel R2
10   -
11   -endmenu
12   -
13   -endif
arch/sh/boards/mach-magicpanelr2/Makefile
View file @ c8b5d9d
1   -#
2   -# Makefile for the Magic Panel specific parts
3   -#
4   -
5   -obj-y := setup.o
arch/sh/boards/mach-magicpanelr2/setup.c
View file @ c8b5d9d
1   -/*
2   - * linux/arch/sh/boards/magicpanel/setup.c
3   - *
4   - * Copyright (C) 2007 Markus Brunner, Mark Jonas
5   - *
6   - * Magic Panel Release 2 board setup
7   - *
8   - * This file is subject to the terms and conditions of the GNU General Public
9   - * License. See the file "COPYING" in the main directory of this archive
10   - * for more details.
11   - */
12   -#include <linux/init.h>
13   -#include <linux/irq.h>
14   -#include <linux/platform_device.h>
15   -#include <linux/delay.h>
16   -#include <linux/mtd/mtd.h>
17   -#include <linux/mtd/partitions.h>
18   -#include <linux/mtd/physmap.h>
19   -#include <linux/mtd/map.h>
20   -#include <asm/magicpanelr2.h>
21   -#include <asm/heartbeat.h>
22   -
23   -#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL)
24   -
25   -/* Prefer cmdline over RedBoot */
26   -static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
27   -
28   -/* Wait until reset finished. Timeout is 100ms. */
29   -static int __init ethernet_reset_finished(void)
30   -{
31   - int i;
32   -
33   - if (LAN9115_READY)
34   - return 1;
35   -
36   - for (i = 0; i < 10; ++i) {
37   - mdelay(10);
38   - if (LAN9115_READY)
39   - return 1;
40   - }
41   -
42   - return 0;
43   -}
44   -
45   -static void __init reset_ethernet(void)
46   -{
47   - /* PMDR: LAN_RESET=on */
48   - CLRBITS_OUTB(0x10, PORT_PMDR);
49   -
50   - udelay(200);
51   -
52   - /* PMDR: LAN_RESET=off */
53   - SETBITS_OUTB(0x10, PORT_PMDR);
54   -}
55   -
56   -static void __init setup_chip_select(void)
57   -{
58   - /* CS2: LAN (0x08000000 - 0x0bffffff) */
59   - /* no idle cycles, normal space, 8 bit data bus */
60   - ctrl_outl(0x36db0400, CS2BCR);
61   - /* (SW:1.5 WR:3 HW:1.5), ext. wait */
62   - ctrl_outl(0x000003c0, CS2WCR);
63   -
64   - /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
65   - /* no idle cycles, normal space, 8 bit data bus */
66   - ctrl_outl(0x00000200, CS4BCR);
67   - /* (SW:1.5 WR:3 HW:1.5), ext. wait */
68   - ctrl_outl(0x00100981, CS4WCR);
69   -
70   - /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
71   - /* no idle cycles, normal space, 8 bit data bus */
72   - ctrl_outl(0x00000200, CS5ABCR);
73   - /* (SW:1.5 WR:3 HW:1.5), ext. wait */
74   - ctrl_outl(0x00100981, CS5AWCR);
75   -
76   - /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
77   - /* no idle cycles, normal space, 8 bit data bus */
78   - ctrl_outl(0x00000200, CS5BBCR);
79   - /* (SW:1.5 WR:3 HW:1.5), ext. wait */
80   - ctrl_outl(0x00100981, CS5BWCR);
81   -
82   - /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
83   - /* no idle cycles, normal space, 8 bit data bus */
84   - ctrl_outl(0x00000200, CS6ABCR);
85   - /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
86   - ctrl_outl(0x001009C1, CS6AWCR);
87   -}
88   -
89   -static void __init setup_port_multiplexing(void)
90   -{
91   - /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
92   - * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
93   - */
94   - ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
95   -
96   - /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
97   - * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
98   - */
99   - ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
100   -
101   - /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
102   - * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
103   - */
104   - ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
105   -
106   - /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
107   - * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
108   - */
109   - ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
110   -
111   - /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
112   - * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
113   - */
114   - ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
115   -
116   - /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
117   - * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
118   - */
119   - ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
120   -
121   - /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
122   - * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
123   - */
124   - ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
125   -
126   - /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
127   - * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
128   - */
129   - ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
130   -
131   - /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
132   - * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
133   - */
134   - ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
135   -
136   - /* K7 (x); K6 (x); K5 (x); K4 (x);
137   - * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
138   - */
139   - ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
140   -
141   - /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
142   - * L3 TCK; L2 (x); L1 (x); L0 (x);
143   - */
144   - ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
145   -
146   - /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
147   - * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
148   - * M1 CS5B(CAN3_CS); M0 GPI+(nc);
149   - */
150   - ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
151   -
152   - /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
153   - * LAN_RESET=off, BUZZER=off, LCD_BL=off
154   - */
155   -#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
156   - ctrl_outb(0x30, PORT_PMDR);
157   -#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
158   - ctrl_outb(0xF0, PORT_PMDR);
159   -#else
160   -#error Unknown revision of PLATFORM_MP_R2
161   -#endif
162   -
163   - /* P7 (x); P6 (x); P5 (x);
164   - * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
165   - * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
166   - */
167   - ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
168   - ctrl_outb(0x10, PORT_PPDR);
169   -
170   - /* R7 A25; R6 A24; R5 A23; R4 A22;
171   - * R3 A21; R2 A20; R1 A19; R0 A0;
172   - */
173   - ctrl_outw(0x0000, PORT_PRCR); /* 00 00 00 00 00 00 00 00 */
174   -
175   - /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
176   - * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
177   - */
178   - ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
179   -
180   - /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
181   - * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
182   - */
183   - ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
184   -
185   - /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
186   - * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
187   - */
188   - ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
189   -
190   - /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
191   - * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
192   - */
193   - ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
194   -}
195   -
196   -static void __init mpr2_setup(char **cmdline_p)
197   -{
198   - __set_io_port_base(0xa0000000);
199   -
200   - /* set Pin Select Register A:
201   - * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
202   - * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
203   - */
204   - ctrl_outw(0xAABC, PORT_PSELA);
205   - /* set Pin Select Register B:
206   - * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
207   - * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
208   - */
209   - ctrl_outw(0x3C00, PORT_PSELB);
210   - /* set Pin Select Register C:
211   - * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
212   - */
213   - ctrl_outw(0x0000, PORT_PSELC);
214   - /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
215   - * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
216   - */
217   - ctrl_outw(0x0000, PORT_PSELD);
218   - /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
219   - ctrl_outw(0x0101, PORT_UTRCTL);
220   - /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
221   - ctrl_outw(0xA5C0, PORT_UCLKCR_W);
222   -
223   - setup_chip_select();
224   -
225   - setup_port_multiplexing();
226   -
227   - reset_ethernet();
228   -
229   - printk(KERN_INFO "Magic Panel Release 2 A.%i\n",
230   - CONFIG_SH_MAGIC_PANEL_R2_VERSION);
231   -
232   - if (ethernet_reset_finished() == 0)
233   - printk(KERN_WARNING "Ethernet not ready\n");
234   -}
235   -
236   -static struct resource smc911x_resources[] = {
237   - [0] = {
238   - .start = 0xa8000000,
239   - .end = 0xabffffff,
240   - .flags = IORESOURCE_MEM,
241   - },
242   - [1] = {
243   - .start = 35,
244   - .end = 35,
245   - .flags = IORESOURCE_IRQ,
246   - },
247   -};
248   -
249   -static struct platform_device smc911x_device = {
250   - .name = "smc911x",
251   - .id = -1,
252   - .num_resources = ARRAY_SIZE(smc911x_resources),
253   - .resource = smc911x_resources,
254   -};
255   -
256   -static struct resource heartbeat_resources[] = {
257   - [0] = {
258   - .start = PA_LED,
259   - .end = PA_LED,
260   - .flags = IORESOURCE_MEM,
261   - },
262   -};
263   -
264   -static struct heartbeat_data heartbeat_data = {
265   - .flags = HEARTBEAT_INVERTED,
266   -};
267   -
268   -static struct platform_device heartbeat_device = {
269   - .name = "heartbeat",
270   - .id = -1,
271   - .dev = {
272   - .platform_data = &heartbeat_data,
273   - },
274   - .num_resources = ARRAY_SIZE(heartbeat_resources),
275   - .resource = heartbeat_resources,
276   -};
277   -
278   -static struct mtd_partition *parsed_partitions;
279   -
280   -static struct mtd_partition mpr2_partitions[] = {
281   - /* Reserved for bootloader, read-only */
282   - {
283   - .name = "Bootloader",
284   - .offset = 0x00000000UL,
285   - .size = MPR2_MTD_BOOTLOADER_SIZE,
286   - .mask_flags = MTD_WRITEABLE,
287   - },
288   - /* Reserved for kernel image */
289   - {
290   - .name = "Kernel",
291   - .offset = MTDPART_OFS_NXTBLK,
292   - .size = MPR2_MTD_KERNEL_SIZE,
293   - },
294   - /* Rest is used for Flash FS */
295   - {
296   - .name = "Flash_FS",
297   - .offset = MTDPART_OFS_NXTBLK,
298   - .size = MTDPART_SIZ_FULL,
299   - }
300   -};
301   -
302   -static struct physmap_flash_data flash_data = {
303   - .width = 2,
304   -};
305   -
306   -static struct resource flash_resource = {
307   - .start = 0x00000000,
308   - .end = 0x2000000UL,
309   - .flags = IORESOURCE_MEM,
310   -};
311   -
312   -static struct platform_device flash_device = {
313   - .name = "physmap-flash",
314   - .id = -1,
315   - .resource = &flash_resource,
316   - .num_resources = 1,
317   - .dev = {
318   - .platform_data = &flash_data,
319   - },
320   -};
321   -
322   -static struct mtd_info *flash_mtd;
323   -
324   -static struct map_info mpr2_flash_map = {
325   - .name = "Magic Panel R2 Flash",
326   - .size = 0x2000000UL,
327   - .bankwidth = 2,
328   -};
329   -
330   -static void __init set_mtd_partitions(void)
331   -{
332   - int nr_parts = 0;
333   -
334   - simple_map_init(&mpr2_flash_map);
335   - flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map);
336   - nr_parts = parse_mtd_partitions(flash_mtd, probes,
337   - &parsed_partitions, 0);
338   - /* If there is no partition table, used the hard coded table */
339   - if (nr_parts <= 0) {
340   - flash_data.parts = mpr2_partitions;
341   - flash_data.nr_parts = ARRAY_SIZE(mpr2_partitions);
342   - } else {
343   - flash_data.nr_parts = nr_parts;
344   - flash_data.parts = parsed_partitions;
345   - }
346   -}
347   -
348   -/*
349   - * Add all resources to the platform_device
350   - */
351   -
352   -static struct platform_device *mpr2_devices[] __initdata = {
353   - &heartbeat_device,
354   - &smc911x_device,
355   - &flash_device,
356   -};
357   -
358   -
359   -static int __init mpr2_devices_setup(void)
360   -{
361   - set_mtd_partitions();
362   - return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices));
363   -}
364   -device_initcall(mpr2_devices_setup);
365   -
366   -/*
367   - * Initialize IRQ setting
368   - */
369   -static void __init init_mpr2_IRQ(void)
370   -{
371   - plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */
372   -
373   - set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
374   - set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
375   - set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
376   - set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
377   - set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
378   - set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
379   -
380   - intc_set_priority(32, 13); /* IRQ0 CAN1 */
381   - intc_set_priority(33, 13); /* IRQ0 CAN2 */
382   - intc_set_priority(34, 13); /* IRQ0 CAN3 */
383   - intc_set_priority(35, 6); /* IRQ3 SMSC9115 */
384   -}
385   -
386   -/*
387   - * The Machine Vector
388   - */
389   -
390   -static struct sh_machine_vector mv_mpr2 __initmv = {
391   - .mv_name = "mpr2",
392   - .mv_setup = mpr2_setup,
393   - .mv_init_irq = init_mpr2_IRQ,
394   -};
arch/sh/boards/mach-rsk7203/Makefile
View file @ c8b5d9d
1   -obj-y := setup.o
arch/sh/boards/mach-rsk7203/setup.c
View file @ c8b5d9d
1   -/*
2   - * Renesas Technology Europe RSK+ 7203 Support.
3   - *
4   - * Copyright (C) 2008 Paul Mundt
5   - *
6   - * This file is subject to the terms and conditions of the GNU General Public
7   - * License. See the file "COPYING" in the main directory of this archive
8   - * for more details.
9   - */
10   -#include <linux/init.h>
11   -#include <linux/types.h>
12   -#include <linux/platform_device.h>
13   -#include <linux/interrupt.h>
14   -#include <linux/mtd/mtd.h>
15   -#include <linux/mtd/partitions.h>
16   -#include <linux/mtd/physmap.h>
17   -#include <linux/mtd/map.h>
18   -#include <linux/smc911x.h>
19   -#include <asm/machvec.h>
20   -#include <asm/io.h>
21   -
22   -static struct smc911x_platdata smc911x_info = {
23   - .flags = SMC911X_USE_16BIT,
24   - .irq_flags = IRQF_TRIGGER_LOW,
25   -};
26   -
27   -static struct resource smc911x_resources[] = {
28   - [0] = {
29   - .start = 0x24000000,
30   - .end = 0x24000000 + 0x100,
31   - .flags = IORESOURCE_MEM,
32   - },
33   - [1] = {
34   - .start = 64,
35   - .end = 64,
36   - .flags = IORESOURCE_IRQ,
37   - },
38   -};
39   -
40   -static struct platform_device smc911x_device = {
41   - .name = "smc911x",
42   - .id = -1,
43   - .num_resources = ARRAY_SIZE(smc911x_resources),
44   - .resource = smc911x_resources,
45   - .dev = {
46   - .platform_data = &smc911x_info,
47   - },
48   -};
49   -
50   -static const char *probes[] = { "cmdlinepart", NULL };
51   -
52   -static struct mtd_partition *parsed_partitions;
53   -
54   -static struct mtd_partition rsk7203_partitions[] = {
55   - {
56   - .name = "Bootloader",
57   - .offset = 0x00000000,
58   - .size = 0x00040000,
59   - .mask_flags = MTD_WRITEABLE,
60   - }, {
61   - .name = "Kernel",
62   - .offset = MTDPART_OFS_NXTBLK,
63   - .size = 0x001c0000,
64   - }, {
65   - .name = "Flash_FS",
66   - .offset = MTDPART_OFS_NXTBLK,
67   - .size = MTDPART_SIZ_FULL,
68   - }
69   -};
70   -
71   -static struct physmap_flash_data flash_data = {
72   - .width = 2,
73   -};
74   -
75   -static struct resource flash_resource = {
76   - .start = 0x20000000,
77   - .end = 0x20400000,
78   - .flags = IORESOURCE_MEM,
79   -};
80   -
81   -static struct platform_device flash_device = {
82   - .name = "physmap-flash",
83   - .id = -1,
84   - .resource = &flash_resource,
85   - .num_resources = 1,
86   - .dev = {
87   - .platform_data = &flash_data,
88   - },
89   -};
90   -
91   -static struct mtd_info *flash_mtd;
92   -
93   -static struct map_info rsk7203_flash_map = {
94   - .name = "RSK+ Flash",
95   - .size = 0x400000,
96   - .bankwidth = 2,
97   -};
98   -
99   -static void __init set_mtd_partitions(void)
100   -{
101   - int nr_parts = 0;
102   -
103   - simple_map_init(&rsk7203_flash_map);
104   - flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map);
105   - nr_parts = parse_mtd_partitions(flash_mtd, probes,
106   - &parsed_partitions, 0);
107   - /* If there is no partition table, used the hard coded table */
108   - if (nr_parts <= 0) {
109   - flash_data.parts = rsk7203_partitions;
110   - flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions);
111   - } else {
112   - flash_data.nr_parts = nr_parts;
113   - flash_data.parts = parsed_partitions;
114   - }
115   -}
116   -
117   -
118   -static struct platform_device *rsk7203_devices[] __initdata = {
119   - &smc911x_device,
120   - &flash_device,
121   -};
122   -
123   -static int __init rsk7203_devices_setup(void)
124   -{
125   - set_mtd_partitions();
126   - return platform_add_devices(rsk7203_devices,
127   - ARRAY_SIZE(rsk7203_devices));
128   -}
129   -device_initcall(rsk7203_devices_setup);
130   -
131   -/*
132   - * The Machine Vector
133   - */
134   -static struct sh_machine_vector mv_rsk7203 __initmv = {
135   - .mv_name = "RSK+7203",
136   -};
arch/sh/boards/mach-se/7619/Makefile
View file @ c8b5d9d
1   -#
2   -# Makefile for the 7619 SolutionEngine specific parts of the kernel
3   -#
4   -
5   -obj-y := setup.o
arch/sh/boards/mach-se/7619/setup.c
View file @ c8b5d9d
1   -/*
2   - * arch/sh/boards/se/7619/setup.c
3   - *
4   - * Copyright (C) 2006 Yoshinori Sato
5   - *
6   - * Hitachi SH7619 SolutionEngine Support.
7   - */
8   -
9   -#include <linux/init.h>
10   -#include <linux/platform_device.h>
11   -#include <asm/io.h>
12   -#include <asm/machvec.h>
13   -
14   -/*
15   - * The Machine Vector
16   - */
17   -
18   -static struct sh_machine_vector mv_se __initmv = {
19   - .mv_name = "SolutionEngine",
20   - .mv_nr_irqs = 108,
21   -};
arch/sh/boards/mach-se/Makefile
Diff comments   View file @ c8b5d9d
  1 +obj-$(CONFIG_SH_7619_SOLUTION_ENGINE) += board-se7619.o
  2 +
1 3 obj-$(CONFIG_SH_SOLUTION_ENGINE) += 770x/
2 4 obj-$(CONFIG_SH_7206_SOLUTION_ENGINE) += 7206/
3   -obj-$(CONFIG_SH_7619_SOLUTION_ENGINE) += 7619/
4 5 obj-$(CONFIG_SH_7722_SOLUTION_ENGINE) += 7722/
5 6 obj-$(CONFIG_SH_7751_SOLUTION_ENGINE) += 7751/
6 7 obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += 7780/
arch/sh/boards/mach-se/board-se7619.c
Diff comments   View file @ c8b5d9d
  1 +/*
  2 + * arch/sh/boards/se/7619/setup.c
  3 + *
  4 + * Copyright (C) 2006 Yoshinori Sato
  5 + *
  6 + * Hitachi SH7619 SolutionEngine Support.
  7 + */
  8 +
  9 +#include <linux/init.h>
  10 +#include <linux/platform_device.h>
  11 +#include <asm/io.h>
  12 +#include <asm/machvec.h>
  13 +
  14 +/*
  15 + * The Machine Vector
  16 + */
  17 +
  18 +static struct sh_machine_vector mv_se __initmv = {
  19 + .mv_name = "SolutionEngine",
  20 + .mv_nr_irqs = 108,
  21 +};
arch/sh/boards/mach-sh7785lcr/Makefile
View file @ c8b5d9d
1   -obj-y := setup.o
arch/sh/boards/mach-sh7785lcr/setup.c
View file @ c8b5d9d
1   -/*
2   - * Renesas Technology Corp. R0P7785LC0011RL Support.
3   - *
4   - * Copyright (C) 2008 Yoshihiro Shimoda
5   - *
6   - * This file is subject to the terms and conditions of the GNU General Public
7   - * License. See the file "COPYING" in the main directory of this archive
8   - * for more details.
9   - */
10   -
11   -#include <linux/init.h>
12   -#include <linux/platform_device.h>
13   -#include <linux/sm501.h>
14   -#include <linux/sm501-regs.h>
15   -#include <linux/fb.h>
16   -#include <linux/mtd/physmap.h>
17   -#include <linux/delay.h>
18   -#include <linux/i2c.h>
19   -#include <linux/i2c-pca-platform.h>
20   -#include <linux/i2c-algo-pca.h>
21   -#include <asm/heartbeat.h>
22   -#include <asm/sh7785lcr.h>
23   -
24   -/*
25   - * NOTE: This board has 2 physical memory maps.
26   - * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
27   - */
28   -static struct resource heartbeat_resources[] = {
29   - [0] = {
30   - .start = PLD_LEDCR,
31   - .end = PLD_LEDCR,
32   - .flags = IORESOURCE_MEM,
33   - },
34   -};
35   -
36   -static struct heartbeat_data heartbeat_data = {
37   - .regsize = 8,
38   -};
39   -
40   -static struct platform_device heartbeat_device = {
41   - .name = "heartbeat",
42   - .id = -1,
43   - .dev = {
44   - .platform_data = &heartbeat_data,
45   - },
46   - .num_resources = ARRAY_SIZE(heartbeat_resources),
47   - .resource = heartbeat_resources,
48   -};
49   -
50   -static struct mtd_partition nor_flash_partitions[] = {
51   - {
52   - .name = "loader",
53   - .offset = 0x00000000,
54   - .size = 512 * 1024,
55   - },
56   - {
57   - .name = "bootenv",
58   - .offset = MTDPART_OFS_APPEND,
59   - .size = 512 * 1024,
60   - },
61   - {
62   - .name = "kernel",
63   - .offset = MTDPART_OFS_APPEND,
64   - .size = 4 * 1024 * 1024,
65   - },
66   - {
67   - .name = "data",
68   - .offset = MTDPART_OFS_APPEND,
69   - .size = MTDPART_SIZ_FULL,
70   - },
71   -};
72   -
73   -static struct physmap_flash_data nor_flash_data = {
74   - .width = 4,
75   - .parts = nor_flash_partitions,
76   - .nr_parts = ARRAY_SIZE(nor_flash_partitions),
77   -};
78   -
79   -static struct resource nor_flash_resources[] = {
80   - [0] = {
81   - .start = NOR_FLASH_ADDR,
82   - .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
83   - .flags = IORESOURCE_MEM,
84   - }
85   -};
86   -
87   -static struct platform_device nor_flash_device = {
88   - .name = "physmap-flash",
89   - .dev = {
90   - .platform_data = &nor_flash_data,
91   - },
92   - .num_resources = ARRAY_SIZE(nor_flash_resources),
93   - .resource = nor_flash_resources,
94   -};
95   -
96   -static struct resource r8a66597_usb_host_resources[] = {
97   - [0] = {
98   - .name = "r8a66597_hcd",
99   - .start = R8A66597_ADDR,
100   - .end = R8A66597_ADDR + R8A66597_SIZE - 1,
101   - .flags = IORESOURCE_MEM,
102   - },
103   - [1] = {
104   - .name = "r8a66597_hcd",
105   - .start = 2,
106   - .end = 2,
107   - .flags = IORESOURCE_IRQ,
108   - },
109   -};
110   -
111   -static struct platform_device r8a66597_usb_host_device = {
112   - .name = "r8a66597_hcd",
113   - .id = -1,
114   - .dev = {
115   - .dma_mask = NULL,
116   - .coherent_dma_mask = 0xffffffff,
117   - },
118   - .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
119   - .resource = r8a66597_usb_host_resources,
120   -};
121   -
122   -static struct resource sm501_resources[] = {
123   - [0] = {
124   - .start = SM107_MEM_ADDR,
125   - .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
126   - .flags = IORESOURCE_MEM,
127   - },
128   - [1] = {
129   - .start = SM107_REG_ADDR,
130   - .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
131   - .flags = IORESOURCE_MEM,
132   - },
133   - [2] = {
134   - .start = 10,
135   - .flags = IORESOURCE_IRQ,
136   - },
137   -};
138   -
139   -static struct fb_videomode sm501_default_mode_crt = {
140   - .pixclock = 35714, /* 28MHz */
141   - .xres = 640,
142   - .yres = 480,
143   - .left_margin = 105,
144   - .right_margin = 16,
145   - .upper_margin = 33,
146   - .lower_margin = 10,
147   - .hsync_len = 39,
148   - .vsync_len = 2,
149   - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
150   -};
151   -
152   -static struct fb_videomode sm501_default_mode_pnl = {
153   - .pixclock = 40000, /* 25MHz */
154   - .xres = 640,
155   - .yres = 480,
156   - .left_margin = 2,
157   - .right_margin = 16,
158   - .upper_margin = 33,
159   - .lower_margin = 10,
160   - .hsync_len = 39,
161   - .vsync_len = 2,
162   - .sync = 0,
163   -};
164   -
165   -static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
166   - .def_bpp = 16,
167   - .def_mode = &sm501_default_mode_pnl,
168   - .flags = SM501FB_FLAG_USE_INIT_MODE |
169   - SM501FB_FLAG_USE_HWCURSOR |
170   - SM501FB_FLAG_USE_HWACCEL |
171   - SM501FB_FLAG_DISABLE_AT_EXIT |
172   - SM501FB_FLAG_PANEL_NO_VBIASEN,
173   -};
174   -
175   -static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
176   - .def_bpp = 16,
177   - .def_mode = &sm501_default_mode_crt,
178   - .flags = SM501FB_FLAG_USE_INIT_MODE |
179   - SM501FB_FLAG_USE_HWCURSOR |
180   - SM501FB_FLAG_USE_HWACCEL |
181   - SM501FB_FLAG_DISABLE_AT_EXIT,
182   -};
183   -
184   -static struct sm501_platdata_fb sm501_fb_pdata = {
185   - .fb_route = SM501_FB_OWN,
186   - .fb_crt = &sm501_pdata_fbsub_crt,
187   - .fb_pnl = &sm501_pdata_fbsub_pnl,
188   -};
189   -
190   -static struct sm501_initdata sm501_initdata = {
191   - .gpio_high = {
192   - .set = 0x00001fe0,
193   - .mask = 0x0,
194   - },
195   - .devices = 0,
196   - .mclk = 84 * 1000000,
197   - .m1xclk = 112 * 1000000,
198   -};
199   -
200   -static struct sm501_platdata sm501_platform_data = {
201   - .init = &sm501_initdata,
202   - .fb = &sm501_fb_pdata,
203   -};
204   -
205   -static struct platform_device sm501_device = {
206   - .name = "sm501",
207   - .id = -1,
208   - .dev = {
209   - .platform_data = &sm501_platform_data,
210   - },
211   - .num_resources = ARRAY_SIZE(sm501_resources),
212   - .resource = sm501_resources,
213   -};
214   -
215   -static struct resource i2c_resources[] = {
216   - [0] = {
217   - .start = PCA9564_ADDR,
218   - .end = PCA9564_ADDR + PCA9564_SIZE - 1,
219   - .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
220   - },
221   - [1] = {
222   - .start = 12,
223   - .end = 12,
224   - .flags = IORESOURCE_IRQ,
225   - },
226   -};
227   -
228   -static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
229   - .gpio = 0,
230   - .i2c_clock_speed = I2C_PCA_CON_330kHz,
231   - .timeout = 100,
232   -};
233   -
234   -static struct platform_device i2c_device = {
235   - .name = "i2c-pca-platform",
236   - .id = -1,
237   - .dev = {
238   - .platform_data = &i2c_platform_data,
239   - },
240   - .num_resources = ARRAY_SIZE(i2c_resources),
241   - .resource = i2c_resources,
242   -};
243   -
244   -static struct platform_device *sh7785lcr_devices[] __initdata = {
245   - &heartbeat_device,
246   - &nor_flash_device,
247   - &r8a66597_usb_host_device,
248   - &sm501_device,
249   - &i2c_device,
250   -};
251   -
252   -static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
253   - {
254   - I2C_BOARD_INFO("r2025sd", 0x32),
255   - },
256   -};
257   -
258   -static int __init sh7785lcr_devices_setup(void)
259   -{
260   - i2c_register_board_info(0, sh7785lcr_i2c_devices,
261   - ARRAY_SIZE(sh7785lcr_i2c_devices));
262   -
263   - return platform_add_devices(sh7785lcr_devices,
264   - ARRAY_SIZE(sh7785lcr_devices));
265   -}
266   -__initcall(sh7785lcr_devices_setup);
267   -
268   -/* Initialize IRQ setting */
269   -void __init init_sh7785lcr_IRQ(void)
270   -{
271   - plat_irq_setup_pins(IRQ_MODE_IRQ7654);
272   - plat_irq_setup_pins(IRQ_MODE_IRQ3210);
273   -}
274   -
275   -static void sh7785lcr_power_off(void)
276   -{
277   - ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
278   -}
279   -
280   -/* Initialize the board */
281   -static void __init sh7785lcr_setup(char **cmdline_p)
282   -{
283   - void __iomem *sm501_reg;
284   -
285   - printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
286   -
287   - pm_power_off = sh7785lcr_power_off;
288   -
289   - /* sm501 DRAM configuration */
290   - sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
291   - writel(0x000307c2, sm501_reg);
292   -}
293   -
294   -/*
295   - * The Machine Vector
296   - */
297   -static struct sh_machine_vector mv_sh7785lcr __initmv = {
298   - .mv_name = "SH7785LCR",
299   - .mv_setup = sh7785lcr_setup,
300   - .mv_init_irq = init_sh7785lcr_IRQ,
301   -};
arch/sh/boards/mach-shmin/Makefile
View file @ c8b5d9d
1   -#
2   -# Makefile for the SHMIN board.
3   -#
4   -
5   -obj-y := setup.o
arch/sh/boards/mach-shmin/setup.c
View file @ c8b5d9d
1   -/*
2   - * arch/sh/boards/shmin/setup.c
3   - *
4   - * Copyright (C) 2006 Takashi YOSHII
5   - *
6   - * SHMIN Support.
7   - */
8   -#include <linux/init.h>
9   -#include <linux/irq.h>
10   -#include <asm/machvec.h>
11   -#include <asm/shmin.h>
12   -#include <asm/clock.h>
13   -#include <asm/io.h>
14   -
15   -#define PFC_PHCR 0xa400010eUL
16   -#define INTC_ICR1 0xa4000010UL
17   -
18   -static void __init init_shmin_irq(void)
19   -{
20   - ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
21   - ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
22   - plat_irq_setup_pins(IRQ_MODE_IRQ);
23   -}
24   -
25   -static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
26   -{
27   - static int dummy;
28   -
29   - if ((port & ~0x1f) == SHMIN_NE_BASE)
30   - return (void __iomem *)(SHMIN_IO_BASE + port);
31   -
32   - dummy = 0;
33   -
34   - return &dummy;
35   -
36   -}
37   -
38   -static struct sh_machine_vector mv_shmin __initmv = {
39   - .mv_name = "SHMIN",
40   - .mv_init_irq = init_shmin_irq,
41   - .mv_ioport_map = shmin_ioport_map,
42   -};