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Commit c9e4412ab8eb8ef82d645d8749c4ce96ad490007

Authored by Kishon Vijay Abraham I
Committed by Felipe Balbi
1 parent f8515f0639
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

arm: omap: phy: remove unused functions from omap-phy-internal.c 

All the unnessary functions in omap-phy-internal is removed.
These functionality are now handled by omap-usb2 phy driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Showing 3 changed files with 0 additions and 146 deletions Side-by-side Diff

arch/arm/mach-omap2/omap_phy_internal.c
Diff comments   View file @ c9e4412
... ... @@ -31,144 +31,6 @@
31 31 #include <plat/usb.h>
32 32 #include "control.h"
33 33  
34   -/* OMAP control module register for UTMI PHY */
35   -#define CONTROL_DEV_CONF 0x300
36   -#define PHY_PD 0x1
37   -
38   -#define USBOTGHS_CONTROL 0x33c
39   -#define AVALID BIT(0)
40   -#define BVALID BIT(1)
41   -#define VBUSVALID BIT(2)
42   -#define SESSEND BIT(3)
43   -#define IDDIG BIT(4)
44   -
45   -static struct clk *phyclk, *clk48m, *clk32k;
46   -static void __iomem *ctrl_base;
47   -static int usbotghs_control;
48   -
49   -int omap4430_phy_init(struct device *dev)
50   -{
51   - ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K);
52   - if (!ctrl_base) {
53   - pr_err("control module ioremap failed\n");
54   - return -ENOMEM;
55   - }
56   - /* Power down the phy */
57   - __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
58   -
59   - if (!dev) {
60   - iounmap(ctrl_base);
61   - return 0;
62   - }
63   -
64   - phyclk = clk_get(dev, "ocp2scp_usb_phy_ick");
65   - if (IS_ERR(phyclk)) {
66   - dev_err(dev, "cannot clk_get ocp2scp_usb_phy_ick\n");
67   - iounmap(ctrl_base);
68   - return PTR_ERR(phyclk);
69   - }
70   -
71   - clk48m = clk_get(dev, "ocp2scp_usb_phy_phy_48m");
72   - if (IS_ERR(clk48m)) {
73   - dev_err(dev, "cannot clk_get ocp2scp_usb_phy_phy_48m\n");
74   - clk_put(phyclk);
75   - iounmap(ctrl_base);
76   - return PTR_ERR(clk48m);
77   - }
78   -
79   - clk32k = clk_get(dev, "usb_phy_cm_clk32k");
80   - if (IS_ERR(clk32k)) {
81   - dev_err(dev, "cannot clk_get usb_phy_cm_clk32k\n");
82   - clk_put(phyclk);
83   - clk_put(clk48m);
84   - iounmap(ctrl_base);
85   - return PTR_ERR(clk32k);
86   - }
87   - return 0;
88   -}
89   -
90   -int omap4430_phy_set_clk(struct device *dev, int on)
91   -{
92   - static int state;
93   -
94   - if (on && !state) {
95   - /* Enable the phy clocks */
96   - clk_enable(phyclk);
97   - clk_enable(clk48m);
98   - clk_enable(clk32k);
99   - state = 1;
100   - } else if (state) {
101   - /* Disable the phy clocks */
102   - clk_disable(phyclk);
103   - clk_disable(clk48m);
104   - clk_disable(clk32k);
105   - state = 0;
106   - }
107   - return 0;
108   -}
109   -
110   -int omap4430_phy_power(struct device *dev, int ID, int on)
111   -{
112   - if (on) {
113   - if (ID)
114   - /* enable VBUS valid, IDDIG groung */
115   - __raw_writel(AVALID | VBUSVALID, ctrl_base +
116   - USBOTGHS_CONTROL);
117   - else
118   - /*
119   - * Enable VBUS Valid, AValid and IDDIG
120   - * high impedance
121   - */
122   - __raw_writel(IDDIG | AVALID | VBUSVALID,
123   - ctrl_base + USBOTGHS_CONTROL);
124   - } else {
125   - /* Enable session END and IDIG to high impedance. */
126   - __raw_writel(SESSEND | IDDIG, ctrl_base +
127   - USBOTGHS_CONTROL);
128   - }
129   - return 0;
130   -}
131   -
132   -int omap4430_phy_suspend(struct device *dev, int suspend)
133   -{
134   - if (suspend) {
135   - /* Disable the clocks */
136   - omap4430_phy_set_clk(dev, 0);
137   - /* Power down the phy */
138   - __raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);
139   -
140   - /* save the context */
141   - usbotghs_control = __raw_readl(ctrl_base + USBOTGHS_CONTROL);
142   - } else {
143   - /* Enable the internel phy clcoks */
144   - omap4430_phy_set_clk(dev, 1);
145   - /* power on the phy */
146   - if (__raw_readl(ctrl_base + CONTROL_DEV_CONF) & PHY_PD) {
147   - __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF);
148   - mdelay(200);
149   - }
150   -
151   - /* restore the context */
152   - __raw_writel(usbotghs_control, ctrl_base + USBOTGHS_CONTROL);
153   - }
154   -
155   - return 0;
156   -}
157   -
158   -int omap4430_phy_exit(struct device *dev)
159   -{
160   - if (ctrl_base)
161   - iounmap(ctrl_base);
162   - if (phyclk)
163   - clk_put(phyclk);
164   - if (clk48m)
165   - clk_put(clk48m);
166   - if (clk32k)
167   - clk_put(clk32k);
168   -
169   - return 0;
170   -}
171   -
172 34 void am35x_musb_reset(void)
173 35 {
174 36 u32 regval;
arch/arm/mach-omap2/twl-common.c
Diff comments   View file @ c9e4412
... ... @@ -250,11 +250,6 @@
250 250  
251 251 #if defined(CONFIG_ARCH_OMAP4)
252 252 static struct twl4030_usb_data omap4_usb_pdata = {
253   - .phy_init = omap4430_phy_init,
254   - .phy_exit = omap4430_phy_exit,
255   - .phy_power = omap4430_phy_power,
256   - .phy_set_clock = omap4430_phy_set_clk,
257   - .phy_suspend = omap4430_phy_suspend,
258 253 };
259 254  
260 255 static struct regulator_init_data omap4_vdac_idata = {
arch/arm/mach-omap2/usb-musb.c
Diff comments   View file @ c9e4412
... ... @@ -117,8 +117,5 @@
117 117 dev->dma_mask = &musb_dmamask;
118 118 dev->coherent_dma_mask = musb_dmamask;
119 119 put_device(dev);
120   -
121   - if (cpu_is_omap44xx())
122   - omap4430_phy_init(dev);
123 120 }