Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

Pull powerpc fixes from Benjamin Herrenschmidt: "Here are a few fixes for 3.6 that were piling up while I was away or busy (I was mostly MIA a week or two before San Diego). Some fixes from Anton fixing up issues with our relatively new DSCR control feature, and a few other fixes that are either regressions or bugs nasty enough to warrant not waiting." * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc: Don't use __put_user() in patch_instruction powerpc: Make sure IPI handlers see data written by IPI senders powerpc: Restore correct DSCR in context switch powerpc: Fix DSCR inheritance in copy_thread() powerpc: Keep thread.dscr and thread.dscr_inherit in sync powerpc: Update DSCR on all CPUs when writing sysfs dscr_default powerpc/powernv: Always go into nap mode when CPU is offline powerpc: Give hypervisor decrementer interrupts their own handler powerpc/vphn: Fix arch_update_cpu_topology() return value

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc fixes from Benjamin Herrenschmidt: "Here are a few fixes for 3.6 that were piling up while I was away or busy (I was mostly MIA a week or two before San Diego). Some fixes from Anton fixing up issues with our relatively new DSCR control feature, and a few other fixes that are either regressions or bugs nasty enough to warrant not waiting." * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc: Don't use __put_user() in patch_instruction powerpc: Make sure IPI handlers see data written by IPI senders powerpc: Restore correct DSCR in context switch powerpc: Fix DSCR inheritance in copy_thread() powerpc: Keep thread.dscr and thread.dscr_inherit in sync powerpc: Update DSCR on all CPUs when writing sysfs dscr_default powerpc/powernv: Always go into nap mode when CPU is offline powerpc: Give hypervisor decrementer interrupts their own handler powerpc/vphn: Fix arch_update_cpu_topology() return value
Linus Torvalds
2 parents 813e64382a 636802ef96
Showing 15 changed files Side-by-side Diff
arch/powerpc/include/asm/processor.h
arch/powerpc/kernel/asm-offsets.c
arch/powerpc/kernel/dbell.c
arch/powerpc/kernel/entry_64.S
arch/powerpc/kernel/exceptions-64s.S
arch/powerpc/kernel/idle_power7.S
arch/powerpc/kernel/process.c
arch/powerpc/kernel/smp.c
arch/powerpc/kernel/sysfs.c
arch/powerpc/kernel/time.c
arch/powerpc/kernel/traps.c
arch/powerpc/lib/code-patching.c
arch/powerpc/mm/numa.c
arch/powerpc/platforms/powernv/smp.c
arch/powerpc/sysdev/xics/icp-hv.c
@@ -386,6 +386,7 @@
 enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
  
 extern int powersave_nap;	/* set if nap mode can be used in idle loop */
+extern void power7_nap(void);
  
 #ifdef CONFIG_PSERIES_IDLE
 extern void update_smt_snooze_delay(int snooze);
@@ -76,6 +76,7 @@
 	DEFINE(SIGSEGV, SIGSEGV);
 	DEFINE(NMI_MASK, NMI_MASK);
 	DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
+	DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
 #else
 	DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
 #endif /* CONFIG_PPC64 */
@@ -28,6 +28,8 @@
  
 void doorbell_cause_ipi(int cpu, unsigned long data)
 {
+	/* Order previous accesses vs. msgsnd, which is treated as a store */
+	mb();
 	ppc_msgsnd(PPC_DBELL, 0, data);
 }
  
@@ -370,6 +370,12 @@
 	li	r3,0
 	b	syscall_exit
  
+	.section	".toc","aw"
+DSCR_DEFAULT:
+	.tc dscr_default[TC],dscr_default
+
+	.section	".text"
+
 /*
  * This routine switches between two different tasks.  The process
  * state of one is saved on its kernel stack.  Then the state
@@ -509,9 +515,6 @@
 	mr	r1,r8		/* start using new stack pointer */
 	std	r7,PACAKSAVE(r13)
  
-	ld	r6,_CCR(r1)
-	mtcrf	0xFF,r6
-
 #ifdef CONFIG_ALTIVEC
 BEGIN_FTR_SECTION
 	ld	r0,THREAD_VRSAVE(r4)
  
  
  
@@ -520,13 +523,21 @@
 #endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_PPC64
 BEGIN_FTR_SECTION
+	lwz	r6,THREAD_DSCR_INHERIT(r4)
+	ld	r7,DSCR_DEFAULT@toc(2)
 	ld	r0,THREAD_DSCR(r4)
-	cmpd	r0,r25
-	beq	1f
+	cmpwi	r6,0
+	bne	1f
+	ld	r0,0(r7)
+1:	cmpd	r0,r25
+	beq	2f
 	mtspr	SPRN_DSCR,r0
-1:	
+2:
 END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
 #endif
+
+	ld	r6,_CCR(r1)
+	mtcrf	0xFF,r6
  
 	/* r3-r13 are destroyed -- Cort */
 	REST_8GPRS(14, r1)
@@ -186,7 +186,7 @@
 	KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  
 	MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
-	MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
+	STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
  
 	STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
 	KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
@@ -486,6 +486,7 @@
  
 	STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
 	STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
+	STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
 	STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
 	STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
 	STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
@@ -28,7 +28,9 @@
 	lwz	r4,ADDROFF(powersave_nap)(r3)
 	cmpwi	0,r4,0
 	beqlr
+	/* fall through */
  
+_GLOBAL(power7_nap)
 	/* NAP is a state loss, we create a regs frame on the
 	 * stack, fill it up with the state we care about and
 	 * stick a pointer to it in PACAR1. We really only
@@ -802,16 +802,8 @@
 #endif /* CONFIG_PPC_STD_MMU_64 */
 #ifdef CONFIG_PPC64 
 	if (cpu_has_feature(CPU_FTR_DSCR)) {
-		if (current->thread.dscr_inherit) {
-			p->thread.dscr_inherit = 1;
-			p->thread.dscr = current->thread.dscr;
-		} else if (0 != dscr_default) {
-			p->thread.dscr_inherit = 1;
-			p->thread.dscr = dscr_default;
-		} else {
-			p->thread.dscr_inherit = 0;
-			p->thread.dscr = 0;
-		}
+		p->thread.dscr_inherit = current->thread.dscr_inherit;
+		p->thread.dscr = current->thread.dscr;
 	}
 #endif
  
@@ -198,8 +198,15 @@
 	struct cpu_messages *info = &per_cpu(ipi_message, cpu);
 	char *message = (char *)&info->messages;
  
+	/*
+	 * Order previous accesses before accesses in the IPI handler.
+	 */
+	smp_mb();
 	message[msg] = 1;
-	mb();
+	/*
+	 * cause_ipi functions are required to include a full barrier
+	 * before doing whatever causes the IPI.
+	 */
 	smp_ops->cause_ipi(cpu, info->data);
 }
  
@@ -211,7 +218,7 @@
 	mb();	/* order any irq clear */
  
 	do {
-		all = xchg_local(&info->messages, 0);
+		all = xchg(&info->messages, 0);
  
 #ifdef __BIG_ENDIAN
 		if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))
@@ -194,6 +194,14 @@
 	return sprintf(buf, "%lx\n", dscr_default);
 }
  
+static void update_dscr(void *dummy)
+{
+	if (!current->thread.dscr_inherit) {
+		current->thread.dscr = dscr_default;
+		mtspr(SPRN_DSCR, dscr_default);
+	}
+}
+
 static ssize_t __used store_dscr_default(struct device *dev,
 		struct device_attribute *attr, const char *buf,
 		size_t count)
@@ -205,6 +213,8 @@
 	if (ret != 1)
 		return -EINVAL;
 	dscr_default = val;
+
+	on_each_cpu(update_dscr, NULL, 1);
  
 	return count;
 }
@@ -535,6 +535,15 @@
 	trace_timer_interrupt_exit(regs);
 }
  
+/*
+ * Hypervisor decrementer interrupts shouldn't occur but are sometimes
+ * left pending on exit from a KVM guest.  We don't need to do anything
+ * to clear them, as they are edge-triggered.
+ */
+void hdec_interrupt(struct pt_regs *regs)
+{
+}
+
 #ifdef CONFIG_SUSPEND
 static void generic_suspend_disable_irqs(void)
 {
@@ -972,8 +972,9 @@
 			cpu_has_feature(CPU_FTR_DSCR)) {
 		PPC_WARN_EMULATED(mtdscr, regs);
 		rd = (instword >> 21) & 0x1f;
-		mtspr(SPRN_DSCR, regs->gpr[rd]);
+		current->thread.dscr = regs->gpr[rd];
 		current->thread.dscr_inherit = 1;
+		mtspr(SPRN_DSCR, current->thread.dscr);
 		return 0;
 	}
 #endif
@@ -20,7 +20,7 @@
 {
 	int err;
  
-	err = __put_user(instr, addr);
+	__put_user_size(instr, addr, 4, err);
 	if (err)
 		return err;
 	asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));
@@ -1436,11 +1436,11 @@
  
 /*
  * Update the node maps and sysfs entries for each cpu whose home node
- * has changed.
+ * has changed. Returns 1 when the topology has changed, and 0 otherwise.
  */
 int arch_update_cpu_topology(void)
 {
-	int cpu, nid, old_nid;
+	int cpu, nid, old_nid, changed = 0;
 	unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
 	struct device *dev;
  
  
@@ -1466,9 +1466,10 @@
 		dev = get_cpu_device(cpu);
 		if (dev)
 			kobject_uevent(&dev->kobj, KOBJ_CHANGE);
+		changed = 1;
 	}
  
-	return 1;
+	return changed;
 }
  
 static void topology_work_fn(struct work_struct *work)
@@ -106,14 +106,6 @@
 {
 	unsigned int cpu;
  
-	/* If powersave_nap is enabled, use NAP mode, else just
-	 * spin aimlessly
-	 */
-	if (!powersave_nap) {
-		generic_mach_cpu_die();
-		return;
-	}
-
 	/* Standard hot unplug procedure */
 	local_irq_disable();
 	idle_task_exit();
@@ -128,7 +120,7 @@
 	 */
 	mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
 	while (!generic_check_cpu_restart(cpu)) {
-		power7_idle();
+		power7_nap();
 		if (!generic_check_cpu_restart(cpu)) {
 			DBG("CPU%d Unexpected exit while offline !\n", cpu);
 			/* We may be getting an IPI, so we re-enable
@@ -65,7 +65,11 @@
 static inline void icp_hv_set_qirr(int n_cpu , u8 value)
 {
 	int hw_cpu = get_hard_smp_processor_id(n_cpu);
-	long rc = plpar_hcall_norets(H_IPI, hw_cpu, value);
+	long rc;
+
+	/* Make sure all previous accesses are ordered before IPI sending */
+	mb();
+	rc = plpar_hcall_norets(H_IPI, hw_cpu, value);
 	if (rc != H_SUCCESS) {
 		pr_err("%s: bad return code qirr cpu=%d hw_cpu=%d mfrr=0x%x "
 			"returned %ld\n", __func__, n_cpu, hw_cpu, value, rc);
...	...	@@ -386,6 +386,7 @@
386	386	enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
387	387
388	388	extern int powersave_nap; /* set if nap mode can be used in idle loop */
	389	+extern void power7_nap(void);
389	390
390	391	#ifdef CONFIG_PSERIES_IDLE
391	392	extern void update_smt_snooze_delay(int snooze);
...	...	@@ -76,6 +76,7 @@
76	76	DEFINE(SIGSEGV, SIGSEGV);
77	77	DEFINE(NMI_MASK, NMI_MASK);
78	78	DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
	79	+ DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
79	80	#else
80	81	DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
81	82	#endif /* CONFIG_PPC64 */
...	...	@@ -28,6 +28,8 @@
28	28
29	29	void doorbell_cause_ipi(int cpu, unsigned long data)
30	30	{
	31	+ /* Order previous accesses vs. msgsnd, which is treated as a store */
	32	+ mb();
31	33	ppc_msgsnd(PPC_DBELL, 0, data);
32	34	}
33	35
...	...	@@ -370,6 +370,12 @@
370	370	li r3,0
371	371	b syscall_exit
372	372
	373	+ .section ".toc","aw"
	374	+DSCR_DEFAULT:
	375	+ .tc dscr_default[TC],dscr_default
	376	+
	377	+ .section ".text"
	378	+
373	379	/*
374	380	* This routine switches between two different tasks. The process
375	381	* state of one is saved on its kernel stack. Then the state
...	...	@@ -509,9 +515,6 @@
509	515	mr r1,r8 /* start using new stack pointer */
510	516	std r7,PACAKSAVE(r13)
511	517
512		- ld r6,_CCR(r1)
513		- mtcrf 0xFF,r6
514		-
515	518	#ifdef CONFIG_ALTIVEC
516	519	BEGIN_FTR_SECTION
517	520	ld r0,THREAD_VRSAVE(r4)
518	521
519	522
520	523
...	...	@@ -520,13 +523,21 @@
520	523	#endif /* CONFIG_ALTIVEC */
521	524	#ifdef CONFIG_PPC64
522	525	BEGIN_FTR_SECTION
	526	+ lwz r6,THREAD_DSCR_INHERIT(r4)
	527	+ ld r7,DSCR_DEFAULT@toc(2)
523	528	ld r0,THREAD_DSCR(r4)
524		- cmpd r0,r25
525		- beq 1f
	529	+ cmpwi r6,0
	530	+ bne 1f
	531	+ ld r0,0(r7)
	532	+1: cmpd r0,r25
	533	+ beq 2f
526	534	mtspr SPRN_DSCR,r0
527		-1:
	535	+2:
528	536	END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
529	537	#endif
	538	+
	539	+ ld r6,_CCR(r1)
	540	+ mtcrf 0xFF,r6
530	541
531	542	/* r3-r13 are destroyed -- Cort */
532	543	REST_8GPRS(14, r1)
...	...	@@ -186,7 +186,7 @@
186	186	KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
187	187
188	188	MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
189		- MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
	189	+ STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
190	190
191	191	STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
192	192	KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
...	...	@@ -486,6 +486,7 @@
486	486
487	487	STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
488	488	STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
	489	+ STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
489	490	STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
490	491	STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
491	492	STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
...	...	@@ -28,7 +28,9 @@
28	28	lwz r4,ADDROFF(powersave_nap)(r3)
29	29	cmpwi 0,r4,0
30	30	beqlr
	31	+ /* fall through */
31	32
	33	+_GLOBAL(power7_nap)
32	34	/* NAP is a state loss, we create a regs frame on the
33	35	* stack, fill it up with the state we care about and
34	36	* stick a pointer to it in PACAR1. We really only
...	...	@@ -802,16 +802,8 @@
802	802	#endif /* CONFIG_PPC_STD_MMU_64 */
803	803	#ifdef CONFIG_PPC64
804	804	if (cpu_has_feature(CPU_FTR_DSCR)) {
805		- if (current->thread.dscr_inherit) {
806		- p->thread.dscr_inherit = 1;
807		- p->thread.dscr = current->thread.dscr;
808		- } else if (0 != dscr_default) {
809		- p->thread.dscr_inherit = 1;
810		- p->thread.dscr = dscr_default;
811		- } else {
812		- p->thread.dscr_inherit = 0;
813		- p->thread.dscr = 0;
814		- }
	805	+ p->thread.dscr_inherit = current->thread.dscr_inherit;
	806	+ p->thread.dscr = current->thread.dscr;
815	807	}
816	808	#endif
817	809
...	...	@@ -198,8 +198,15 @@
198	198	struct cpu_messages *info = &per_cpu(ipi_message, cpu);
199	199	char message = (char )&info->messages;
200	200
	201	+ /*
	202	+ * Order previous accesses before accesses in the IPI handler.
	203	+ */
	204	+ smp_mb();
201	205	message[msg] = 1;
202		- mb();
	206	+ /*
	207	+ * cause_ipi functions are required to include a full barrier
	208	+ * before doing whatever causes the IPI.
	209	+ */
203	210	smp_ops->cause_ipi(cpu, info->data);
204	211	}
205	212
...	...	@@ -211,7 +218,7 @@
211	218	mb(); /* order any irq clear */
212	219
213	220	do {
214		- all = xchg_local(&info->messages, 0);
	221	+ all = xchg(&info->messages, 0);
215	222
216	223	#ifdef __BIG_ENDIAN
217	224	if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))
...	...	@@ -194,6 +194,14 @@
194	194	return sprintf(buf, "%lx\n", dscr_default);
195	195	}
196	196
	197	+static void update_dscr(void *dummy)
	198	+{
	199	+ if (!current->thread.dscr_inherit) {
	200	+ current->thread.dscr = dscr_default;
	201	+ mtspr(SPRN_DSCR, dscr_default);
	202	+ }
	203	+}
	204	+
197	205	static ssize_t __used store_dscr_default(struct device *dev,
198	206	struct device_attribute attr, const char buf,
199	207	size_t count)
...	...	@@ -205,6 +213,8 @@
205	213	if (ret != 1)
206	214	return -EINVAL;
207	215	dscr_default = val;
	216	+
	217	+ on_each_cpu(update_dscr, NULL, 1);
208	218
209	219	return count;
210	220	}
...	...	@@ -535,6 +535,15 @@
535	535	trace_timer_interrupt_exit(regs);
536	536	}
537	537
	538	+/*
	539	+ * Hypervisor decrementer interrupts shouldn't occur but are sometimes
	540	+ * left pending on exit from a KVM guest. We don't need to do anything
	541	+ * to clear them, as they are edge-triggered.
	542	+ */
	543	+void hdec_interrupt(struct pt_regs *regs)
	544	+{
	545	+}
	546	+
538	547	#ifdef CONFIG_SUSPEND
539	548	static void generic_suspend_disable_irqs(void)
540	549	{