Commit d3c7b886978bef42f5ea487dec376c482d3cd7e3
Committed by
David S. Miller
David S. Miller
1 parent
af36e6b6d7
Exists in
master
and in
7 other branches
[TG3]: Add 5755 nvram support
Add 5755 nvram support. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Showing 2 changed files with 46 additions and 0 deletions Side-by-side Diff
drivers/net/tg3.c
| ... | ... | @@ -8938,6 +8938,47 @@ |
| 8938 | 8938 | } |
| 8939 | 8939 | } |
| 8940 | 8940 | |
| 8941 | +static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) | |
| 8942 | +{ | |
| 8943 | + u32 nvcfg1; | |
| 8944 | + | |
| 8945 | + nvcfg1 = tr32(NVRAM_CFG1); | |
| 8946 | + | |
| 8947 | + /* NVRAM protection for TPM */ | |
| 8948 | + if (nvcfg1 & (1 << 27)) | |
| 8949 | + tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM; | |
| 8950 | + | |
| 8951 | + switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { | |
| 8952 | + case FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ: | |
| 8953 | + case FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ: | |
| 8954 | + tp->nvram_jedecnum = JEDEC_ATMEL; | |
| 8955 | + tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; | |
| 8956 | + tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; | |
| 8957 | + | |
| 8958 | + nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; | |
| 8959 | + tw32(NVRAM_CFG1, nvcfg1); | |
| 8960 | + break; | |
| 8961 | + case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED: | |
| 8962 | + case FLASH_5755VENDOR_ATMEL_FLASH_1: | |
| 8963 | + case FLASH_5755VENDOR_ATMEL_FLASH_2: | |
| 8964 | + case FLASH_5755VENDOR_ATMEL_FLASH_3: | |
| 8965 | + case FLASH_5755VENDOR_ATMEL_FLASH_4: | |
| 8966 | + tp->nvram_jedecnum = JEDEC_ATMEL; | |
| 8967 | + tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; | |
| 8968 | + tp->tg3_flags2 |= TG3_FLG2_FLASH; | |
| 8969 | + tp->nvram_pagesize = 264; | |
| 8970 | + break; | |
| 8971 | + case FLASH_5752VENDOR_ST_M45PE10: | |
| 8972 | + case FLASH_5752VENDOR_ST_M45PE20: | |
| 8973 | + case FLASH_5752VENDOR_ST_M45PE40: | |
| 8974 | + tp->nvram_jedecnum = JEDEC_ST; | |
| 8975 | + tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED; | |
| 8976 | + tp->tg3_flags2 |= TG3_FLG2_FLASH; | |
| 8977 | + tp->nvram_pagesize = 256; | |
| 8978 | + break; | |
| 8979 | + } | |
| 8980 | +} | |
| 8981 | + | |
| 8941 | 8982 | static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp) |
| 8942 | 8983 | { |
| 8943 | 8984 | u32 nvcfg1; |
| ... | ... | @@ -9011,6 +9052,8 @@ |
| 9011 | 9052 | |
| 9012 | 9053 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) |
| 9013 | 9054 | tg3_get_5752_nvram_info(tp); |
| 9055 | + else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) | |
| 9056 | + tg3_get_5755_nvram_info(tp); | |
| 9014 | 9057 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) |
| 9015 | 9058 | tg3_get_5787_nvram_info(tp); |
| 9016 | 9059 | else |
drivers/net/tg3.h
| ... | ... | @@ -1444,6 +1444,9 @@ |
| 1444 | 1444 | #define FLASH_5755VENDOR_ATMEL_FLASH_1 0x03400001 |
| 1445 | 1445 | #define FLASH_5755VENDOR_ATMEL_FLASH_2 0x03400002 |
| 1446 | 1446 | #define FLASH_5755VENDOR_ATMEL_FLASH_3 0x03400000 |
| 1447 | +#define FLASH_5755VENDOR_ATMEL_FLASH_4 0x00000003 | |
| 1448 | +#define FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ 0x03c00003 | |
| 1449 | +#define FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ 0x03c00002 | |
| 1447 | 1450 | #define FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ 0x03000003 |
| 1448 | 1451 | #define FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ 0x03000002 |
| 1449 | 1452 | #define FLASH_5787VENDOR_MICRO_EEPROM_64KHZ 0x03000000 |