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Commit d979f1792d1a4867eda0028b3aac8c6d4a535bb7

Authored by David S. Miller
1 parent ec3b67c11d
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[SPARC64]: __inline__ --> inline 

Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 22 changed files with 125 additions and 155 deletions Side-by-side Diff

arch/sparc64/kernel/binfmt_elf32.c
Diff comments   View file @ d979f17
1 1 /*
2 2 * binfmt_elf32.c: Support 32-bit Sparc ELF binaries on Ultra.
3 3 *
4   - * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com)
  4 + * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@davemloft.net)
5 5 * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz)
6 6 */
7 7  
... ... @@ -133,7 +133,7 @@
133 133  
134 134 #undef cputime_to_timeval
135 135 #define cputime_to_timeval cputime_to_compat_timeval
136   -static __inline__ void
  136 +static inline void
137 137 cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
138 138 {
139 139 unsigned long jiffies = cputime_to_jiffies(cputime);
arch/sparc64/kernel/central.c
Diff comments   View file @ d979f17
1   -/* $Id: central.c,v 1.15 2001/12/19 00:29:51 davem Exp $
2   - * central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
  1 +/* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
3 2 *
4   - * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
  3 + * Copyright (C) 1997, 1999 David S. Miller (davem@davemloft.net)
5 4 */
6 5  
7 6 #include <linux/kernel.h>
... ... @@ -385,7 +384,7 @@
385 384 init_all_fhc_hw();
386 385 }
387 386  
388   -static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on)
  387 +static inline void fhc_ledblink(struct linux_fhc *fhc, int on)
389 388 {
390 389 u32 tmp;
391 390  
... ... @@ -402,7 +401,7 @@
402 401 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
403 402 }
404 403  
405   -static __inline__ void central_ledblink(struct linux_central *central, int on)
  404 +static inline void central_ledblink(struct linux_central *central, int on)
406 405 {
407 406 u8 tmp;
408 407  
arch/sparc64/kernel/semaphore.c
Diff comments   View file @ d979f17
1   -/* $Id: semaphore.c,v 1.9 2001/11/18 00:12:56 davem Exp $
2   - * semaphore.c: Sparc64 semaphore implementation.
  1 +/* semaphore.c: Sparc64 semaphore implementation.
3 2 *
4 3 * This is basically the PPC semaphore scheme ported to use
5 4 * the sparc64 atomic instructions, so see the PPC code for
... ... @@ -19,7 +18,7 @@
19 18 * sem->count = tmp;
20 19 * return old_count;
21 20 */
22   -static __inline__ int __sem_update_count(struct semaphore *sem, int incr)
  21 +static inline int __sem_update_count(struct semaphore *sem, int incr)
23 22 {
24 23 int old_count, tmp;
25 24  
arch/sparc64/kernel/smp.c
Diff comments   View file @ d979f17
... ... @@ -459,7 +459,7 @@
459 459 }
460 460 }
461 461  
462   -static __inline__ void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask)
  462 +static inline void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask)
463 463 {
464 464 u64 pstate;
465 465 int i;
... ... @@ -906,7 +906,7 @@
906 906 extern atomic_t dcpage_flushes_xcall;
907 907 #endif
908 908  
909   -static __inline__ void __local_flush_dcache_page(struct page *page)
  909 +static inline void __local_flush_dcache_page(struct page *page)
910 910 {
911 911 #ifdef DCACHE_ALIASING_POSSIBLE
912 912 __flush_dcache_page(page_address(page),
arch/sparc64/kernel/traps.c
Diff comments   View file @ d979f17
1   -/* $Id: traps.c,v 1.85 2002/02/09 19:49:31 davem Exp $
2   - * arch/sparc64/kernel/traps.c
  1 +/* arch/sparc64/kernel/traps.c
3 2 *
4   - * Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu)
  3 + * Copyright (C) 1995,1997 David S. Miller (davem@davemloft.net)
5 4 * Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com)
6 5 */
7 6  
... ... @@ -765,7 +764,7 @@
765 764 */
766 765 struct cheetah_err_info *cheetah_error_log;
767 766  
768   -static __inline__ struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
  767 +static inline struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
769 768 {
770 769 struct cheetah_err_info *p;
771 770 int cpu = smp_processor_id();
... ... @@ -1085,7 +1084,7 @@
1085 1084 };
1086 1085  
1087 1086 /* Return the highest priority error conditon mentioned. */
1088   -static __inline__ unsigned long cheetah_get_hipri(unsigned long afsr)
  1087 +static inline unsigned long cheetah_get_hipri(unsigned long afsr)
1089 1088 {
1090 1089 unsigned long tmp = 0;
1091 1090 int i;
arch/sparc64/mm/init.c
Diff comments   View file @ d979f17
... ... @@ -201,7 +201,7 @@
201 201 #define dcache_dirty_cpu(page) \
202 202 (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
203 203  
204   -static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
  204 +static inline void set_dcache_dirty(struct page *page, int this_cpu)
205 205 {
206 206 unsigned long mask = this_cpu;
207 207 unsigned long non_cpu_bits;
... ... @@ -223,7 +223,7 @@
223 223 : "g1", "g7");
224 224 }
225 225  
226   -static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
  226 +static inline void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
227 227 {
228 228 unsigned long mask = (1UL << PG_dcache_dirty);
229 229  
arch/sparc64/prom/console.c
Diff comments   View file @ d979f17
1   -/* $Id: console.c,v 1.9 1997/10/29 07:41:43 ecd Exp $
2   - * console.c: Routines that deal with sending and receiving IO
  1 +/* console.c: Routines that deal with sending and receiving IO
3 2 * to/from the current console device using the PROM.
4 3 *
5   - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  4 + * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
6 5 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 6 */
8 7  
... ... @@ -19,7 +18,7 @@
19 18 /* Non blocking get character from console input device, returns -1
20 19 * if no input was taken. This can be used for polling.
21 20 */
22   -__inline__ int
  21 +inline int
23 22 prom_nbgetchar(void)
24 23 {
25 24 char inc;
... ... @@ -35,7 +34,7 @@
35 34 /* Non blocking put character to console device, returns -1 if
36 35 * unsuccessful.
37 36 */
38   -__inline__ int
  37 +inline int
39 38 prom_nbputchar(char c)
40 39 {
41 40 char outc;
arch/sparc64/prom/tree.c
Diff comments   View file @ d979f17
... ... @@ -18,14 +18,12 @@
18 18 /* Return the child of node 'node' or zero if no this node has no
19 19 * direct descendent.
20 20 */
21   -__inline__ int
22   -__prom_getchild(int node)
  21 +inline int __prom_getchild(int node)
23 22 {
24 23 return p1275_cmd ("child", P1275_INOUT(1, 1), node);
25 24 }
26 25  
27   -__inline__ int
28   -prom_getchild(int node)
  26 +inline int prom_getchild(int node)
29 27 {
30 28 int cnode;
31 29  
... ... @@ -35,8 +33,7 @@
35 33 return (int)cnode;
36 34 }
37 35  
38   -__inline__ int
39   -prom_getparent(int node)
  36 +inline int prom_getparent(int node)
40 37 {
41 38 int cnode;
42 39  
43 40  
... ... @@ -49,14 +46,12 @@
49 46 /* Return the next sibling of node 'node' or zero if no more siblings
50 47 * at this level of depth in the tree.
51 48 */
52   -__inline__ int
53   -__prom_getsibling(int node)
  49 +inline int __prom_getsibling(int node)
54 50 {
55 51 return p1275_cmd(prom_peer_name, P1275_INOUT(1, 1), node);
56 52 }
57 53  
58   -__inline__ int
59   -prom_getsibling(int node)
  54 +inline int prom_getsibling(int node)
60 55 {
61 56 int sibnode;
62 57  
... ... @@ -72,8 +67,7 @@
72 67 /* Return the length in bytes of property 'prop' at node 'node'.
73 68 * Return -1 on error.
74 69 */
75   -__inline__ int
76   -prom_getproplen(int node, const char *prop)
  70 +inline int prom_getproplen(int node, const char *prop)
77 71 {
78 72 if((!node) || (!prop)) return -1;
79 73 return p1275_cmd ("getproplen",
... ... @@ -86,8 +80,8 @@
86 80 * 'buffer' which has a size of 'bufsize'. If the acquisition
87 81 * was successful the length will be returned, else -1 is returned.
88 82 */
89   -__inline__ int
90   -prom_getproperty(int node, const char *prop, char *buffer, int bufsize)
  83 +inline int prom_getproperty(int node, const char *prop,
  84 + char *buffer, int bufsize)
91 85 {
92 86 int plen;
93 87  
... ... @@ -107,8 +101,7 @@
107 101 /* Acquire an integer property and return its value. Returns -1
108 102 * on failure.
109 103 */
110   -__inline__ int
111   -prom_getint(int node, const char *prop)
  104 +inline int prom_getint(int node, const char *prop)
112 105 {
113 106 int intprop;
114 107  
... ... @@ -122,8 +115,7 @@
122 115 * integer.
123 116 */
124 117  
125   -int
126   -prom_getintdefault(int node, const char *property, int deflt)
  118 +int prom_getintdefault(int node, const char *property, int deflt)
127 119 {
128 120 int retval;
129 121  
... ... @@ -134,8 +126,7 @@
134 126 }
135 127  
136 128 /* Acquire a boolean property, 1=TRUE 0=FALSE. */
137   -int
138   -prom_getbool(int node, const char *prop)
  129 +int prom_getbool(int node, const char *prop)
139 130 {
140 131 int retval;
141 132  
... ... @@ -148,8 +139,7 @@
148 139 * string on error. The char pointer is the user supplied string
149 140 * buffer.
150 141 */
151   -void
152   -prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
  142 +void prom_getstring(int node, const char *prop, char *user_buf, int ubuf_size)
153 143 {
154 144 int len;
155 145  
... ... @@ -163,8 +153,7 @@
163 153 /* Does the device at node 'node' have name 'name'?
164 154 * YES = 1 NO = 0
165 155 */
166   -int
167   -prom_nodematch(int node, const char *name)
  156 +int prom_nodematch(int node, const char *name)
168 157 {
169 158 char namebuf[128];
170 159 prom_getproperty(node, "name", namebuf, sizeof(namebuf));
... ... @@ -175,8 +164,7 @@
175 164 /* Search siblings at 'node_start' for a node with name
176 165 * 'nodename'. Return node if successful, zero if not.
177 166 */
178   -int
179   -prom_searchsiblings(int node_start, const char *nodename)
  167 +int prom_searchsiblings(int node_start, const char *nodename)
180 168 {
181 169  
182 170 int thisnode, error;
... ... @@ -197,8 +185,7 @@
197 185 /* Return the first property type for node 'node'.
198 186 * buffer should be at least 32B in length
199 187 */
200   -__inline__ char *
201   -prom_firstprop(int node, char *buffer)
  188 +inline char *prom_firstprop(int node, char *buffer)
202 189 {
203 190 *buffer = 0;
204 191 if(node == -1) return buffer;
... ... @@ -212,8 +199,7 @@
212 199 * at node 'node' . Returns NULL string if no more
213 200 * property types for this node.
214 201 */
215   -__inline__ char *
216   -prom_nextprop(int node, const char *oprop, char *buffer)
  202 +inline char *prom_nextprop(int node, const char *oprop, char *buffer)
217 203 {
218 204 char buf[32];
219 205  
... ... @@ -279,8 +265,7 @@
279 265 node, pname, value, P1275_SIZE(size));
280 266 }
281 267  
282   -__inline__ int
283   -prom_inst2pkg(int inst)
  268 +inline int prom_inst2pkg(int inst)
284 269 {
285 270 int node;
286 271  
include/asm-sparc64/atomic.h
Diff comments   View file @ d979f17
1   -/* $Id: atomic.h,v 1.22 2001/07/11 23:56:07 davem Exp $
2   - * atomic.h: Thankfully the V9 is at least reasonable for this
  1 +/* atomic.h: Thankfully the V9 is at least reasonable for this
3 2 * stuff.
4 3 *
5 4 * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
... ... @@ -74,7 +73,7 @@
74 73 #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
75 74 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
76 75  
77   -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
  76 +static inline int atomic_add_unless(atomic_t *v, int a, int u)
78 77 {
79 78 int c, old;
80 79 c = atomic_read(v);
... ... @@ -95,7 +94,7 @@
95 94 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
96 95 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
97 96  
98   -static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
  97 +static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
99 98 {
100 99 long c, old;
101 100 c = atomic64_read(v);
include/asm-sparc64/byteorder.h
Diff comments   View file @ d979f17
1   -/* $Id: byteorder.h,v 1.8 1997/12/18 02:44:14 ecd Exp $ */
2 1 #ifndef _SPARC64_BYTEORDER_H
3 2 #define _SPARC64_BYTEORDER_H
4 3  
... ... @@ -7,7 +6,7 @@
7 6  
8 7 #ifdef __GNUC__
9 8  
10   -static __inline__ __u16 ___arch__swab16p(const __u16 *addr)
  9 +static inline __u16 ___arch__swab16p(const __u16 *addr)
11 10 {
12 11 __u16 ret;
13 12  
... ... @@ -17,7 +16,7 @@
17 16 return ret;
18 17 }
19 18  
20   -static __inline__ __u32 ___arch__swab32p(const __u32 *addr)
  19 +static inline __u32 ___arch__swab32p(const __u32 *addr)
21 20 {
22 21 __u32 ret;
23 22  
... ... @@ -27,7 +26,7 @@
27 26 return ret;
28 27 }
29 28  
30   -static __inline__ __u64 ___arch__swab64p(const __u64 *addr)
  29 +static inline __u64 ___arch__swab64p(const __u64 *addr)
31 30 {
32 31 __u64 ret;
33 32  
include/asm-sparc64/fpumacro.h
Diff comments   View file @ d979f17
... ... @@ -16,7 +16,7 @@
16 16  
17 17 #define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs)
18 18  
19   -static __inline__ unsigned long fprs_read(void)
  19 +static inline unsigned long fprs_read(void)
20 20 {
21 21 unsigned long retval;
22 22  
... ... @@ -25,7 +25,7 @@
25 25 return retval;
26 26 }
27 27  
28   -static __inline__ void fprs_write(unsigned long val)
  28 +static inline void fprs_write(unsigned long val)
29 29 {
30 30 __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val));
31 31 }
include/asm-sparc64/io.h
Diff comments   View file @ d979f17
1   -/* $Id: io.h,v 1.47 2001/12/13 10:36:02 davem Exp $ */
2 1 #ifndef __SPARC64_IO_H
3 2 #define __SPARC64_IO_H
4 3  
... ... @@ -19,7 +18,7 @@
19 18 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
20 19 #define BIO_VMERGE_BOUNDARY 8192
21 20  
22   -static __inline__ u8 _inb(unsigned long addr)
  21 +static inline u8 _inb(unsigned long addr)
23 22 {
24 23 u8 ret;
25 24  
... ... @@ -30,7 +29,7 @@
30 29 return ret;
31 30 }
32 31  
33   -static __inline__ u16 _inw(unsigned long addr)
  32 +static inline u16 _inw(unsigned long addr)
34 33 {
35 34 u16 ret;
36 35  
... ... @@ -41,7 +40,7 @@
41 40 return ret;
42 41 }
43 42  
44   -static __inline__ u32 _inl(unsigned long addr)
  43 +static inline u32 _inl(unsigned long addr)
45 44 {
46 45 u32 ret;
47 46  
48 47  
49 48  
... ... @@ -52,21 +51,21 @@
52 51 return ret;
53 52 }
54 53  
55   -static __inline__ void _outb(u8 b, unsigned long addr)
  54 +static inline void _outb(u8 b, unsigned long addr)
56 55 {
57 56 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
58 57 : /* no outputs */
59 58 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
60 59 }
61 60  
62   -static __inline__ void _outw(u16 w, unsigned long addr)
  61 +static inline void _outw(u16 w, unsigned long addr)
63 62 {
64 63 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
65 64 : /* no outputs */
66 65 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
67 66 }
68 67  
69   -static __inline__ void _outl(u32 l, unsigned long addr)
  68 +static inline void _outl(u32 l, unsigned long addr)
70 69 {
71 70 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
72 71 : /* no outputs */
... ... @@ -205,7 +204,7 @@
205 204 #define writeq(__q, __addr) _writeq(__q, __addr)
206 205  
207 206 /* Now versions without byte-swapping. */
208   -static __inline__ u8 _raw_readb(unsigned long addr)
  207 +static inline u8 _raw_readb(unsigned long addr)
209 208 {
210 209 u8 ret;
211 210  
... ... @@ -216,7 +215,7 @@
216 215 return ret;
217 216 }
218 217  
219   -static __inline__ u16 _raw_readw(unsigned long addr)
  218 +static inline u16 _raw_readw(unsigned long addr)
220 219 {
221 220 u16 ret;
222 221  
... ... @@ -227,7 +226,7 @@
227 226 return ret;
228 227 }
229 228  
230   -static __inline__ u32 _raw_readl(unsigned long addr)
  229 +static inline u32 _raw_readl(unsigned long addr)
231 230 {
232 231 u32 ret;
233 232  
... ... @@ -238,7 +237,7 @@
238 237 return ret;
239 238 }
240 239  
241   -static __inline__ u64 _raw_readq(unsigned long addr)
  240 +static inline u64 _raw_readq(unsigned long addr)
242 241 {
243 242 u64 ret;
244 243  
245 244  
246 245  
247 246  
... ... @@ -249,28 +248,28 @@
249 248 return ret;
250 249 }
251 250  
252   -static __inline__ void _raw_writeb(u8 b, unsigned long addr)
  251 +static inline void _raw_writeb(u8 b, unsigned long addr)
253 252 {
254 253 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
255 254 : /* no outputs */
256 255 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
257 256 }
258 257  
259   -static __inline__ void _raw_writew(u16 w, unsigned long addr)
  258 +static inline void _raw_writew(u16 w, unsigned long addr)
260 259 {
261 260 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
262 261 : /* no outputs */
263 262 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
264 263 }
265 264  
266   -static __inline__ void _raw_writel(u32 l, unsigned long addr)
  265 +static inline void _raw_writel(u32 l, unsigned long addr)
267 266 {
268 267 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
269 268 : /* no outputs */
270 269 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
271 270 }
272 271  
273   -static __inline__ void _raw_writeq(u64 q, unsigned long addr)
  272 +static inline void _raw_writeq(u64 q, unsigned long addr)
274 273 {
275 274 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
276 275 : /* no outputs */
include/asm-sparc64/irq.h
Diff comments   View file @ d979f17
1   -/* $Id: irq.h,v 1.21 2002/01/23 11:27:36 davem Exp $
2   - * irq.h: IRQ registers on the 64-bit Sparc.
  1 +/* irq.h: IRQ registers on the 64-bit Sparc.
3 2 *
4   - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  3 + * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
5 4 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
6 5 */
7 6  
8 7  
9 8  
... ... @@ -67,21 +66,21 @@
67 66  
68 67 extern void fixup_irqs(void);
69 68  
70   -static __inline__ void set_softint(unsigned long bits)
  69 +static inline void set_softint(unsigned long bits)
71 70 {
72 71 __asm__ __volatile__("wr %0, 0x0, %%set_softint"
73 72 : /* No outputs */
74 73 : "r" (bits));
75 74 }
76 75  
77   -static __inline__ void clear_softint(unsigned long bits)
  76 +static inline void clear_softint(unsigned long bits)
78 77 {
79 78 __asm__ __volatile__("wr %0, 0x0, %%clear_softint"
80 79 : /* No outputs */
81 80 : "r" (bits));
82 81 }
83 82  
84   -static __inline__ unsigned long get_softint(void)
  83 +static inline unsigned long get_softint(void)
85 84 {
86 85 unsigned long retval;
87 86  
include/asm-sparc64/mostek.h
Diff comments   View file @ d979f17
1   -/* $Id: mostek.h,v 1.4 2001/01/11 15:07:09 davem Exp $
2   - * mostek.h: Describes the various Mostek time of day clock registers.
  1 +/* mostek.h: Describes the various Mostek time of day clock registers.
3 2 *
4   - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  3 + * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
5 4 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
6 5 */
7 6  
... ... @@ -38,7 +37,7 @@
38 37 *
39 38 * We now deal with physical addresses for I/O to the chip. -DaveM
40 39 */
41   -static __inline__ u8 mostek_read(void __iomem *addr)
  40 +static inline u8 mostek_read(void __iomem *addr)
42 41 {
43 42 u8 ret;
44 43  
... ... @@ -48,7 +47,7 @@
48 47 return ret;
49 48 }
50 49  
51   -static __inline__ void mostek_write(void __iomem *addr, u8 val)
  50 +static inline void mostek_write(void __iomem *addr, u8 val)
52 51 {
53 52 __asm__ __volatile__("stba %0, [%1] %2"
54 53 : /* no outputs */
include/asm-sparc64/ns87303.h
Diff comments   View file @ d979f17
1   -/* $Id: ns87303.h,v 1.3 2000/01/09 15:16:34 ecd Exp $
2   - * ns87303.h: Configuration Register Description for the
  1 +/* ns87303.h: Configuration Register Description for the
3 2 * National Semiconductor PC87303 (SuperIO).
4 3 *
5 4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
... ... @@ -85,7 +84,7 @@
85 84  
86 85 extern spinlock_t ns87303_lock;
87 86  
88   -static __inline__ int ns87303_modify(unsigned long port, unsigned int index,
  87 +static inline int ns87303_modify(unsigned long port, unsigned int index,
89 88 unsigned char clr, unsigned char set)
90 89 {
91 90 static unsigned char reserved[] = {
include/asm-sparc64/parport.h
Diff comments   View file @ d979f17
1   -/* $Id: parport.h,v 1.11 2001/05/11 07:54:24 davem Exp $
2   - * parport.h: sparc64 specific parport initialization and dma.
  1 +/* parport.h: sparc64 specific parport initialization and dma.
3 2 *
4 3 * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be)
5 4 */
... ... @@ -42,7 +41,7 @@
42 41  
43 42 static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS);
44 43  
45   -static __inline__ int request_dma(unsigned int dmanr, const char *device_id)
  44 +static inline int request_dma(unsigned int dmanr, const char *device_id)
46 45 {
47 46 if (dmanr >= PARPORT_PC_MAX_PORTS)
48 47 return -EINVAL;
... ... @@ -51,7 +50,7 @@
51 50 return 0;
52 51 }
53 52  
54   -static __inline__ void free_dma(unsigned int dmanr)
  53 +static inline void free_dma(unsigned int dmanr)
55 54 {
56 55 if (dmanr >= PARPORT_PC_MAX_PORTS) {
57 56 printk(KERN_WARNING "Trying to free DMA%d\n", dmanr);
... ... @@ -63,7 +62,7 @@
63 62 }
64 63 }
65 64  
66   -static __inline__ void enable_dma(unsigned int dmanr)
  65 +static inline void enable_dma(unsigned int dmanr)
67 66 {
68 67 ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
69 68  
70 69  
71 70  
72 71  
73 72  
74 73  
... ... @@ -73,32 +72,32 @@
73 72 BUG();
74 73 }
75 74  
76   -static __inline__ void disable_dma(unsigned int dmanr)
  75 +static inline void disable_dma(unsigned int dmanr)
77 76 {
78 77 ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0);
79 78 }
80 79  
81   -static __inline__ void clear_dma_ff(unsigned int dmanr)
  80 +static inline void clear_dma_ff(unsigned int dmanr)
82 81 {
83 82 /* nothing */
84 83 }
85 84  
86   -static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
  85 +static inline void set_dma_mode(unsigned int dmanr, char mode)
87 86 {
88 87 ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE));
89 88 }
90 89  
91   -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int addr)
  90 +static inline void set_dma_addr(unsigned int dmanr, unsigned int addr)
92 91 {
93 92 sparc_ebus_dmas[dmanr].addr = addr;
94 93 }
95 94  
96   -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
  95 +static inline void set_dma_count(unsigned int dmanr, unsigned int count)
97 96 {
98 97 sparc_ebus_dmas[dmanr].count = count;
99 98 }
100 99  
101   -static __inline__ unsigned int get_dma_residue(unsigned int dmanr)
  100 +static inline unsigned int get_dma_residue(unsigned int dmanr)
102 101 {
103 102 return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info);
104 103 }
include/asm-sparc64/posix_types.h
Diff comments   View file @ d979f17
... ... @@ -53,7 +53,7 @@
53 53 #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
54 54  
55 55 #undef __FD_SET
56   -static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
  56 +static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
57 57 {
58 58 unsigned long _tmp = fd / __NFDBITS;
59 59 unsigned long _rem = fd % __NFDBITS;
... ... @@ -61,7 +61,7 @@
61 61 }
62 62  
63 63 #undef __FD_CLR
64   -static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
  64 +static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
65 65 {
66 66 unsigned long _tmp = fd / __NFDBITS;
67 67 unsigned long _rem = fd % __NFDBITS;
... ... @@ -69,7 +69,7 @@
69 69 }
70 70  
71 71 #undef __FD_ISSET
72   -static __inline__ int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
  72 +static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p)
73 73 {
74 74 unsigned long _tmp = fd / __NFDBITS;
75 75 unsigned long _rem = fd % __NFDBITS;
... ... @@ -81,7 +81,7 @@
81 81 * for 256 and 1024-bit fd_sets respectively)
82 82 */
83 83 #undef __FD_ZERO
84   -static __inline__ void __FD_ZERO(__kernel_fd_set *p)
  84 +static inline void __FD_ZERO(__kernel_fd_set *p)
85 85 {
86 86 unsigned long *tmp = p->fds_bits;
87 87 int i;
include/asm-sparc64/sbus.h
Diff comments   View file @ d979f17
... ... @@ -29,12 +29,12 @@
29 29 * numbers + offsets, and vice versa.
30 30 */
31 31  
32   -static __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset)
  32 +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset)
33 33 {
34 34 return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
35 35 }
36 36  
37   -static __inline__ int sbus_dev_slot(unsigned long dev_addr)
  37 +static inline int sbus_dev_slot(unsigned long dev_addr)
38 38 {
39 39 return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
40 40 }
include/asm-sparc64/spitfire.h
Diff comments   View file @ d979f17
1   -/* $Id: spitfire.h,v 1.18 2001/11/29 16:42:10 kanoj Exp $
2   - * spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
  1 +/* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
3 2 *
4   - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  3 + * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
5 4 */
6 5  
7 6 #ifndef _SPARC64_SPITFIRE_H
... ... @@ -67,7 +66,7 @@
67 66 /* The data cache is write through, so this just invalidates the
68 67 * specified line.
69 68 */
70   -static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
  69 +static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag)
71 70 {
72 71 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
73 72 "membar #Sync"
... ... @@ -81,7 +80,7 @@
81 80 * a flush instruction (to any address) is sufficient to handle
82 81 * this issue after the line is invalidated.
83 82 */
84   -static __inline__ void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
  83 +static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag)
85 84 {
86 85 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
87 86 "membar #Sync"
... ... @@ -89,7 +88,7 @@
89 88 : "r" (tag), "r" (addr), "i" (ASI_IC_TAG));
90 89 }
91 90  
92   -static __inline__ unsigned long spitfire_get_dtlb_data(int entry)
  91 +static inline unsigned long spitfire_get_dtlb_data(int entry)
93 92 {
94 93 unsigned long data;
95 94  
... ... @@ -103,7 +102,7 @@
103 102 return data;
104 103 }
105 104  
106   -static __inline__ unsigned long spitfire_get_dtlb_tag(int entry)
  105 +static inline unsigned long spitfire_get_dtlb_tag(int entry)
107 106 {
108 107 unsigned long tag;
109 108  
... ... @@ -113,7 +112,7 @@
113 112 return tag;
114 113 }
115 114  
116   -static __inline__ void spitfire_put_dtlb_data(int entry, unsigned long data)
  115 +static inline void spitfire_put_dtlb_data(int entry, unsigned long data)
117 116 {
118 117 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
119 118 "membar #Sync"
... ... @@ -122,7 +121,7 @@
122 121 "i" (ASI_DTLB_DATA_ACCESS));
123 122 }
124 123  
125   -static __inline__ unsigned long spitfire_get_itlb_data(int entry)
  124 +static inline unsigned long spitfire_get_itlb_data(int entry)
126 125 {
127 126 unsigned long data;
128 127  
... ... @@ -136,7 +135,7 @@
136 135 return data;
137 136 }
138 137  
139   -static __inline__ unsigned long spitfire_get_itlb_tag(int entry)
  138 +static inline unsigned long spitfire_get_itlb_tag(int entry)
140 139 {
141 140 unsigned long tag;
142 141  
... ... @@ -146,7 +145,7 @@
146 145 return tag;
147 146 }
148 147  
149   -static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data)
  148 +static inline void spitfire_put_itlb_data(int entry, unsigned long data)
150 149 {
151 150 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
152 151 "membar #Sync"
... ... @@ -155,7 +154,7 @@
155 154 "i" (ASI_ITLB_DATA_ACCESS));
156 155 }
157 156  
158   -static __inline__ void spitfire_flush_dtlb_nucleus_page(unsigned long page)
  157 +static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page)
159 158 {
160 159 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
161 160 "membar #Sync"
... ... @@ -163,7 +162,7 @@
163 162 : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP));
164 163 }
165 164  
166   -static __inline__ void spitfire_flush_itlb_nucleus_page(unsigned long page)
  165 +static inline void spitfire_flush_itlb_nucleus_page(unsigned long page)
167 166 {
168 167 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
169 168 "membar #Sync"
... ... @@ -172,7 +171,7 @@
172 171 }
173 172  
174 173 /* Cheetah has "all non-locked" tlb flushes. */
175   -static __inline__ void cheetah_flush_dtlb_all(void)
  174 +static inline void cheetah_flush_dtlb_all(void)
176 175 {
177 176 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
178 177 "membar #Sync"
... ... @@ -180,7 +179,7 @@
180 179 : "r" (0x80), "i" (ASI_DMMU_DEMAP));
181 180 }
182 181  
183   -static __inline__ void cheetah_flush_itlb_all(void)
  182 +static inline void cheetah_flush_itlb_all(void)
184 183 {
185 184 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
186 185 "membar #Sync"
... ... @@ -202,7 +201,7 @@
202 201 * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes
203 202 * the problem for me. -DaveM
204 203 */
205   -static __inline__ unsigned long cheetah_get_ldtlb_data(int entry)
  204 +static inline unsigned long cheetah_get_ldtlb_data(int entry)
206 205 {
207 206 unsigned long data;
208 207  
... ... @@ -215,7 +214,7 @@
215 214 return data;
216 215 }
217 216  
218   -static __inline__ unsigned long cheetah_get_litlb_data(int entry)
  217 +static inline unsigned long cheetah_get_litlb_data(int entry)
219 218 {
220 219 unsigned long data;
221 220  
... ... @@ -228,7 +227,7 @@
228 227 return data;
229 228 }
230 229  
231   -static __inline__ unsigned long cheetah_get_ldtlb_tag(int entry)
  230 +static inline unsigned long cheetah_get_ldtlb_tag(int entry)
232 231 {
233 232 unsigned long tag;
234 233  
... ... @@ -240,7 +239,7 @@
240 239 return tag;
241 240 }
242 241  
243   -static __inline__ unsigned long cheetah_get_litlb_tag(int entry)
  242 +static inline unsigned long cheetah_get_litlb_tag(int entry)
244 243 {
245 244 unsigned long tag;
246 245  
... ... @@ -252,7 +251,7 @@
252 251 return tag;
253 252 }
254 253  
255   -static __inline__ void cheetah_put_ldtlb_data(int entry, unsigned long data)
  254 +static inline void cheetah_put_ldtlb_data(int entry, unsigned long data)
256 255 {
257 256 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
258 257 "membar #Sync"
... ... @@ -262,7 +261,7 @@
262 261 "i" (ASI_DTLB_DATA_ACCESS));
263 262 }
264 263  
265   -static __inline__ void cheetah_put_litlb_data(int entry, unsigned long data)
  264 +static inline void cheetah_put_litlb_data(int entry, unsigned long data)
266 265 {
267 266 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
268 267 "membar #Sync"
... ... @@ -272,7 +271,7 @@
272 271 "i" (ASI_ITLB_DATA_ACCESS));
273 272 }
274 273  
275   -static __inline__ unsigned long cheetah_get_dtlb_data(int entry, int tlb)
  274 +static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb)
276 275 {
277 276 unsigned long data;
278 277  
... ... @@ -284,7 +283,7 @@
284 283 return data;
285 284 }
286 285  
287   -static __inline__ unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
  286 +static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb)
288 287 {
289 288 unsigned long tag;
290 289  
... ... @@ -294,7 +293,7 @@
294 293 return tag;
295 294 }
296 295  
297   -static __inline__ void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
  296 +static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb)
298 297 {
299 298 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
300 299 "membar #Sync"
... ... @@ -304,7 +303,7 @@
304 303 "i" (ASI_DTLB_DATA_ACCESS));
305 304 }
306 305  
307   -static __inline__ unsigned long cheetah_get_itlb_data(int entry)
  306 +static inline unsigned long cheetah_get_itlb_data(int entry)
308 307 {
309 308 unsigned long data;
310 309  
... ... @@ -317,7 +316,7 @@
317 316 return data;
318 317 }
319 318  
320   -static __inline__ unsigned long cheetah_get_itlb_tag(int entry)
  319 +static inline unsigned long cheetah_get_itlb_tag(int entry)
321 320 {
322 321 unsigned long tag;
323 322  
... ... @@ -327,7 +326,7 @@
327 326 return tag;
328 327 }
329 328  
330   -static __inline__ void cheetah_put_itlb_data(int entry, unsigned long data)
  329 +static inline void cheetah_put_itlb_data(int entry, unsigned long data)
331 330 {
332 331 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
333 332 "membar #Sync"
include/asm-sparc64/system.h
Diff comments   View file @ d979f17
1   -/* $Id: system.h,v 1.69 2002/02/09 19:49:31 davem Exp $ */
2 1 #ifndef __SPARC64_SYSTEM_H
3 2 #define __SPARC64_SYSTEM_H
4 3  
... ... @@ -240,7 +239,7 @@
240 239  
241 240 extern void __xchg_called_with_bad_pointer(void);
242 241  
243   -static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
  242 +static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
244 243 int size)
245 244 {
246 245 switch (size) {
... ... @@ -263,7 +262,7 @@
263 262  
264 263 #define __HAVE_ARCH_CMPXCHG 1
265 264  
266   -static __inline__ unsigned long
  265 +static inline unsigned long
267 266 __cmpxchg_u32(volatile int *m, int old, int new)
268 267 {
269 268 __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
... ... @@ -276,7 +275,7 @@
276 275 return new;
277 276 }
278 277  
279   -static __inline__ unsigned long
  278 +static inline unsigned long
280 279 __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
281 280 {
282 281 __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n"
... ... @@ -293,7 +292,7 @@
293 292 if something tries to do an invalid cmpxchg(). */
294 293 extern void __cmpxchg_called_with_bad_pointer(void);
295 294  
296   -static __inline__ unsigned long
  295 +static inline unsigned long
297 296 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
298 297 {
299 298 switch (size) {
include/asm-sparc64/upa.h
Diff comments   View file @ d979f17
1   -/* $Id: upa.h,v 1.3 1999/09/21 14:39:47 davem Exp $ */
2 1 #ifndef _SPARC64_UPA_H
3 2 #define _SPARC64_UPA_H
4 3  
... ... @@ -25,7 +24,7 @@
25 24  
26 25 /* UPA I/O space accessors */
27 26 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
28   -static __inline__ unsigned char _upa_readb(unsigned long addr)
  27 +static inline unsigned char _upa_readb(unsigned long addr)
29 28 {
30 29 unsigned char ret;
31 30  
... ... @@ -36,7 +35,7 @@
36 35 return ret;
37 36 }
38 37  
39   -static __inline__ unsigned short _upa_readw(unsigned long addr)
  38 +static inline unsigned short _upa_readw(unsigned long addr)
40 39 {
41 40 unsigned short ret;
42 41  
... ... @@ -47,7 +46,7 @@
47 46 return ret;
48 47 }
49 48  
50   -static __inline__ unsigned int _upa_readl(unsigned long addr)
  49 +static inline unsigned int _upa_readl(unsigned long addr)
51 50 {
52 51 unsigned int ret;
53 52  
... ... @@ -58,7 +57,7 @@
58 57 return ret;
59 58 }
60 59  
61   -static __inline__ unsigned long _upa_readq(unsigned long addr)
  60 +static inline unsigned long _upa_readq(unsigned long addr)
62 61 {
63 62 unsigned long ret;
64 63  
65 64  
66 65  
67 66  
... ... @@ -69,28 +68,28 @@
69 68 return ret;
70 69 }
71 70  
72   -static __inline__ void _upa_writeb(unsigned char b, unsigned long addr)
  71 +static inline void _upa_writeb(unsigned char b, unsigned long addr)
73 72 {
74 73 __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */"
75 74 : /* no outputs */
76 75 : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
77 76 }
78 77  
79   -static __inline__ void _upa_writew(unsigned short w, unsigned long addr)
  78 +static inline void _upa_writew(unsigned short w, unsigned long addr)
80 79 {
81 80 __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */"
82 81 : /* no outputs */
83 82 : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
84 83 }
85 84  
86   -static __inline__ void _upa_writel(unsigned int l, unsigned long addr)
  85 +static inline void _upa_writel(unsigned int l, unsigned long addr)
87 86 {
88 87 __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */"
89 88 : /* no outputs */
90 89 : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
91 90 }
92 91  
93   -static __inline__ void _upa_writeq(unsigned long q, unsigned long addr)
  92 +static inline void _upa_writeq(unsigned long q, unsigned long addr)
94 93 {
95 94 __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */"
96 95 : /* no outputs */
include/asm-sparc64/visasm.h
Diff comments   View file @ d979f17
1   -/* $Id: visasm.h,v 1.5 2001/04/24 01:09:12 davem Exp $ */
2 1 #ifndef _SPARC64_VISASM_H
3 2 #define _SPARC64_VISASM_H
4 3  
... ... @@ -44,7 +43,7 @@
44 43 wr %o5, 0, %fprs;
45 44  
46 45 #ifndef __ASSEMBLY__
47   -static __inline__ void save_and_clear_fpu(void) {
  46 +static inline void save_and_clear_fpu(void) {
48 47 __asm__ __volatile__ (
49 48 " rd %%fprs, %%o5\n"
50 49 " andcc %%o5, %0, %%g0\n"