Commit d9d579842e9e10a49e1ba6a16be5ce2757d38cc0
Committed by
Jeff Garzik
1 parent
bff00256f1
Exists in
master
and in
6 other branches
pata_via: add via_fixup()
* Fix via_init_one() to enable clock on 66 MHz devices (bug introduced in commit 460f531 "pata_via: store UDMA masks in via_isa_bridges table"). * Factor out common code from via_[re]init_one() to via_fixup(). Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Showing 1 changed file with 23 additions and 26 deletions Side-by-side Diff
drivers/ata/pata_via.c
... | ... | @@ -509,6 +509,27 @@ |
509 | 509 | } |
510 | 510 | } |
511 | 511 | |
512 | +static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config) | |
513 | +{ | |
514 | + u32 timing; | |
515 | + | |
516 | + /* Initialise the FIFO for the enabled channels. */ | |
517 | + via_config_fifo(pdev, config->flags); | |
518 | + | |
519 | + if (config->udma_mask == ATA_UDMA4) { | |
520 | + /* The 66 MHz devices require we enable the clock */ | |
521 | + pci_read_config_dword(pdev, 0x50, &timing); | |
522 | + timing |= 0x80008; | |
523 | + pci_write_config_dword(pdev, 0x50, timing); | |
524 | + } | |
525 | + if (config->flags & VIA_BAD_CLK66) { | |
526 | + /* Disable the 66MHz clock on problem devices */ | |
527 | + pci_read_config_dword(pdev, 0x50, &timing); | |
528 | + timing &= ~0x80008; | |
529 | + pci_write_config_dword(pdev, 0x50, timing); | |
530 | + } | |
531 | +} | |
532 | + | |
512 | 533 | /** |
513 | 534 | * via_init_one - discovery callback |
514 | 535 | * @pdev: PCI device |
... | ... | @@ -570,7 +591,6 @@ |
570 | 591 | struct pci_dev *isa; |
571 | 592 | const struct via_isa_bridge *config; |
572 | 593 | u8 enable; |
573 | - u32 timing; | |
574 | 594 | unsigned long flags = id->driver_data; |
575 | 595 | int rc; |
576 | 596 | |
... | ... | @@ -609,9 +629,6 @@ |
609 | 629 | return -ENODEV; |
610 | 630 | } |
611 | 631 | |
612 | - /* Initialise the FIFO for the enabled channels. */ | |
613 | - via_config_fifo(pdev, config->flags); | |
614 | - | |
615 | 632 | /* Clock set up */ |
616 | 633 | switch (config->udma_mask) { |
617 | 634 | case 0x00: |
... | ... | @@ -637,12 +654,7 @@ |
637 | 654 | return -ENODEV; |
638 | 655 | } |
639 | 656 | |
640 | - if (config->flags & VIA_BAD_CLK66) { | |
641 | - /* Disable the 66MHz clock on problem devices */ | |
642 | - pci_read_config_dword(pdev, 0x50, &timing); | |
643 | - timing &= ~0x80008; | |
644 | - pci_write_config_dword(pdev, 0x50, timing); | |
645 | - } | |
657 | + via_fixup(pdev, config); | |
646 | 658 | |
647 | 659 | /* We have established the device type, now fire it up */ |
648 | 660 | return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0); |
649 | 661 | |
650 | 662 | |
... | ... | @@ -661,29 +673,14 @@ |
661 | 673 | |
662 | 674 | static int via_reinit_one(struct pci_dev *pdev) |
663 | 675 | { |
664 | - u32 timing; | |
665 | 676 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
666 | - const struct via_isa_bridge *config = host->private_data; | |
667 | 677 | int rc; |
668 | 678 | |
669 | 679 | rc = ata_pci_device_do_resume(pdev); |
670 | 680 | if (rc) |
671 | 681 | return rc; |
672 | 682 | |
673 | - via_config_fifo(pdev, config->flags); | |
674 | - | |
675 | - if (config->udma_mask == ATA_UDMA4) { | |
676 | - /* The 66 MHz devices require we enable the clock */ | |
677 | - pci_read_config_dword(pdev, 0x50, &timing); | |
678 | - timing |= 0x80008; | |
679 | - pci_write_config_dword(pdev, 0x50, timing); | |
680 | - } | |
681 | - if (config->flags & VIA_BAD_CLK66) { | |
682 | - /* Disable the 66MHz clock on problem devices */ | |
683 | - pci_read_config_dword(pdev, 0x50, &timing); | |
684 | - timing &= ~0x80008; | |
685 | - pci_write_config_dword(pdev, 0x50, timing); | |
686 | - } | |
683 | + via_fixup(pdev, host->private_data); | |
687 | 684 | |
688 | 685 | ata_host_resume(host); |
689 | 686 | return 0; |