Commit dc3465a943ed2dd5de37d3d60df5c4e11c49efcb
Committed by
Simon Horman
Simon Horman
1 parent
119f5e448d
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
gpio-rcar: Add pinctrl support
Register the GPIO pin range, and request and free GPIO pins using the pinctrl API. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Showing 2 changed files with 24 additions and 0 deletions Side-by-side Diff
drivers/gpio/gpio-rcar.c
| ... | ... | @@ -22,6 +22,7 @@ |
| 22 | 22 | #include <linux/irq.h> |
| 23 | 23 | #include <linux/irqdomain.h> |
| 24 | 24 | #include <linux/module.h> |
| 25 | +#include <linux/pinctrl/consumer.h> | |
| 25 | 26 | #include <linux/platform_data/gpio-rcar.h> |
| 26 | 27 | #include <linux/platform_device.h> |
| 27 | 28 | #include <linux/spinlock.h> |
| ... | ... | @@ -190,6 +191,21 @@ |
| 190 | 191 | spin_unlock_irqrestore(&p->lock, flags); |
| 191 | 192 | } |
| 192 | 193 | |
| 194 | +static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) | |
| 195 | +{ | |
| 196 | + return pinctrl_request_gpio(chip->base + offset); | |
| 197 | +} | |
| 198 | + | |
| 199 | +static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) | |
| 200 | +{ | |
| 201 | + pinctrl_free_gpio(chip->base + offset); | |
| 202 | + | |
| 203 | + /* Set the GPIO as an input to ensure that the next GPIO request won't | |
| 204 | + * drive the GPIO pin as an output. | |
| 205 | + */ | |
| 206 | + gpio_rcar_config_general_input_output_mode(chip, offset, false); | |
| 207 | +} | |
| 208 | + | |
| 193 | 209 | static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset) |
| 194 | 210 | { |
| 195 | 211 | gpio_rcar_config_general_input_output_mode(chip, offset, false); |
| ... | ... | @@ -285,6 +301,8 @@ |
| 285 | 301 | } |
| 286 | 302 | |
| 287 | 303 | gpio_chip = &p->gpio_chip; |
| 304 | + gpio_chip->request = gpio_rcar_request; | |
| 305 | + gpio_chip->free = gpio_rcar_free; | |
| 288 | 306 | gpio_chip->direction_input = gpio_rcar_direction_input; |
| 289 | 307 | gpio_chip->get = gpio_rcar_get; |
| 290 | 308 | gpio_chip->direction_output = gpio_rcar_direction_output; |
| ... | ... | @@ -336,6 +354,11 @@ |
| 336 | 354 | dev_warn(&pdev->dev, "irq base mismatch (%u/%u)\n", |
| 337 | 355 | p->config.irq_base, ret); |
| 338 | 356 | } |
| 357 | + | |
| 358 | + ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0, | |
| 359 | + gpio_chip->base, gpio_chip->ngpio); | |
| 360 | + if (ret < 0) | |
| 361 | + dev_warn(&pdev->dev, "failed to add pin range\n"); | |
| 339 | 362 | |
| 340 | 363 | return 0; |
| 341 | 364 |