Commit de725dec9de7a7541996176d59cf8542365b8b0e
Committed by
Ingo Molnar
Ingo Molnar
1 parent
2e556b5b32
perf, x86: Fix handle_irq return values
Now that we rely on the number of handled overflows, ensure all handle_irq implementations actually return the right number. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Don Zickus <dzickus@redhat.com> Cc: peterz@infradead.org Cc: robert.richter@amd.com Cc: gorcunov@gmail.com Cc: fweisbec@gmail.com Cc: ying.huang@intel.com Cc: ming.m.lin@intel.com Cc: eranian@google.com LKML-Reference: <1283454469-1909-4-git-send-email-dzickus@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Showing 2 changed files with 8 additions and 3 deletions Side-by-side Diff
arch/x86/kernel/cpu/perf_event_intel.c
| ... | ... | @@ -713,6 +713,7 @@ |
| 713 | 713 | struct cpu_hw_events *cpuc; |
| 714 | 714 | int bit, loops; |
| 715 | 715 | u64 status; |
| 716 | + int handled = 0; | |
| 716 | 717 | |
| 717 | 718 | perf_sample_data_init(&data, 0); |
| 718 | 719 | |
| 719 | 720 | |
| 720 | 721 | |
| ... | ... | @@ -743,12 +744,16 @@ |
| 743 | 744 | /* |
| 744 | 745 | * PEBS overflow sets bit 62 in the global status register |
| 745 | 746 | */ |
| 746 | - if (__test_and_clear_bit(62, (unsigned long *)&status)) | |
| 747 | + if (__test_and_clear_bit(62, (unsigned long *)&status)) { | |
| 748 | + handled++; | |
| 747 | 749 | x86_pmu.drain_pebs(regs); |
| 750 | + } | |
| 748 | 751 | |
| 749 | 752 | for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { |
| 750 | 753 | struct perf_event *event = cpuc->events[bit]; |
| 751 | 754 | |
| 755 | + handled++; | |
| 756 | + | |
| 752 | 757 | if (!test_bit(bit, cpuc->active_mask)) |
| 753 | 758 | continue; |
| 754 | 759 | |
| ... | ... | @@ -770,7 +775,7 @@ |
| 770 | 775 | |
| 771 | 776 | done: |
| 772 | 777 | intel_pmu_enable_all(0); |
| 773 | - return 1; | |
| 778 | + return handled; | |
| 774 | 779 | } |
| 775 | 780 | |
| 776 | 781 | static struct event_constraint * |