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Commit df7cded30ced539d3b4e6bae9f3011d98c069d41

Authored by Vishwanath Sripathy
Committed by Kevin Hilman
1 parent 83b5b5519c
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ARM: OMAP4: OPP: add OMAP4460 definitions 

Add OMAP4460 OPP definitions for voltage and frequencies based on
OMAP4460 ES1.0 DM Operating Condition Addendum Version 0.1

The following exceptions are present:
* Smartreflex support is still on experimental mode: the gains and min
  limits are currently pending characterization data. Currently OMAP4430 values
  are used.
* Efuse offset for core OPP100-OV setting is not clear in documentation.
* IVA OPPs beyond OPP100 are disabled due to the delta between max OMAP4460
  current requirements and Phoenix Max supply on VCORE2 in the default
  configuration - boards which have supply which can support this should
  explicitly call opp_enable and enable the same.
* MPU OPPs > OPPTURBO can easily be detected using a efuse burnt - currently
  disabled pending clock changes to support DCC feature.

[nm@ti.com: cleanups and updates from Datamanual]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
[t-kristo@ti.com: rebased to linux-3.6-rc5]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

Showing 4 changed files with 103 additions and 17 deletions Side-by-side Diff

arch/arm/mach-omap2/control.h
Diff comments   View file @ df7cded
... ... @@ -201,6 +201,7 @@
201 201 #define OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO 0x249
202 202 #define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254
203 203 #define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257
  204 +#define OMAP44XX_CONTROL_FUSE_CORE_OPP100OV 0x25A
204 205  
205 206 /* AM35XX only CONTROL_GENERAL register offsets */
206 207 #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
arch/arm/mach-omap2/omap_opp_data.h
Diff comments   View file @ df7cded
... ... @@ -89,9 +89,12 @@
89 89 extern struct omap_volt_data omap36xx_vddmpu_volt_data[];
90 90 extern struct omap_volt_data omap36xx_vddcore_volt_data[];
91 91  
92   -extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[];
93   -extern struct omap_volt_data omap44xx_vdd_iva_volt_data[];
94   -extern struct omap_volt_data omap44xx_vdd_core_volt_data[];
  92 +extern struct omap_volt_data omap443x_vdd_mpu_volt_data[];
  93 +extern struct omap_volt_data omap443x_vdd_iva_volt_data[];
  94 +extern struct omap_volt_data omap443x_vdd_core_volt_data[];
  95 +extern struct omap_volt_data omap446x_vdd_mpu_volt_data[];
  96 +extern struct omap_volt_data omap446x_vdd_iva_volt_data[];
  97 +extern struct omap_volt_data omap446x_vdd_core_volt_data[];
95 98  
96 99 #endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */
arch/arm/mach-omap2/opp4xxx_data.c
Diff comments   View file @ df7cded
1 1 /*
2 2 * OMAP4 OPP table definitions.
3 3 *
4   - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  4 + * Copyright (C) 2010-2012 Texas Instruments Incorporated - http://www.ti.com/
5 5 * Nishanth Menon
6 6 * Kevin Hilman
7 7 * Thara Gopinath
... ... @@ -35,7 +35,7 @@
35 35 #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000
36 36 #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000
37 37  
38   -struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
  38 +struct omap_volt_data omap443x_vdd_mpu_volt_data[] = {
39 39 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
40 40 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
41 41 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
... ... @@ -47,7 +47,7 @@
47 47 #define OMAP4430_VDD_IVA_OPP100_UV 1188000
48 48 #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000
49 49  
50   -struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
  50 +struct omap_volt_data omap443x_vdd_iva_volt_data[] = {
51 51 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
52 52 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
53 53 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
54 54  
... ... @@ -57,14 +57,14 @@
57 57 #define OMAP4430_VDD_CORE_OPP50_UV 1025000
58 58 #define OMAP4430_VDD_CORE_OPP100_UV 1200000
59 59  
60   -struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
  60 +struct omap_volt_data omap443x_vdd_core_volt_data[] = {
61 61 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
62 62 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
63 63 VOLT_DATA_DEFINE(0, 0, 0, 0),
64 64 };
65 65  
66 66  
67   -static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
  67 +static struct omap_opp_def __initdata omap443x_opp_def_list[] = {
68 68 /* MPU OPP1 - OPP50 */
69 69 OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
70 70 /* MPU OPP2 - OPP100 */
... ... @@ -86,6 +86,82 @@
86 86 /* TODO: add DSP, aess, fdif, gpu */
87 87 };
88 88  
  89 +#define OMAP4460_VDD_MPU_OPP50_UV 1025000
  90 +#define OMAP4460_VDD_MPU_OPP100_UV 1200000
  91 +#define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000
  92 +#define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000
  93 +
  94 +struct omap_volt_data omap446x_vdd_mpu_volt_data[] = {
  95 + VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
  96 + VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
  97 + VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
  98 + VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
  99 + VOLT_DATA_DEFINE(0, 0, 0, 0),
  100 +};
  101 +
  102 +#define OMAP4460_VDD_IVA_OPP50_UV 1025000
  103 +#define OMAP4460_VDD_IVA_OPP100_UV 1200000
  104 +#define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000
  105 +#define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000
  106 +
  107 +struct omap_volt_data omap446x_vdd_iva_volt_data[] = {
  108 + VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
  109 + VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
  110 + VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
  111 + VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23),
  112 + VOLT_DATA_DEFINE(0, 0, 0, 0),
  113 +};
  114 +
  115 +#define OMAP4460_VDD_CORE_OPP50_UV 1025000
  116 +#define OMAP4460_VDD_CORE_OPP100_UV 1200000
  117 +#define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000
  118 +
  119 +struct omap_volt_data omap446x_vdd_core_volt_data[] = {
  120 + VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
  121 + VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
  122 + VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16),
  123 + VOLT_DATA_DEFINE(0, 0, 0, 0),
  124 +};
  125 +
  126 +static struct omap_opp_def __initdata omap446x_opp_def_list[] = {
  127 + /* MPU OPP1 - OPP50 */
  128 + OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV),
  129 + /* MPU OPP2 - OPP100 */
  130 + OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV),
  131 + /* MPU OPP3 - OPP-Turbo */
  132 + OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV),
  133 + /*
  134 + * MPU OPP4 - OPP-Nitro + Disabled as the reference schematics
  135 + * recommends TPS623631 - confirm and enable the opp in board file
  136 + * XXX: May be we should enable these based on mpu capability and
  137 + * Exception board files disable it...
  138 + */
  139 + OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV),
  140 + /* MPU OPP4 - OPP-Nitro SpeedBin */
  141 + OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV),
  142 + /* L3 OPP1 - OPP50 */
  143 + OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV),
  144 + /* L3 OPP2 - OPP100 */
  145 + OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV),
  146 + /* IVA OPP1 - OPP50 */
  147 + OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV),
  148 + /* IVA OPP2 - OPP100 */
  149 + OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV),
  150 + /*
  151 + * IVA OPP3 - OPP-Turbo + Disabled as the reference schematics
  152 + * recommends Phoenix VCORE2 which can supply only 600mA - so the ones
  153 + * above this OPP frequency, even though OMAP is capable, should be
  154 + * enabled by board file which is sure of the chip power capability
  155 + */
  156 + OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV),
  157 + /* IVA OPP4 - OPP-Nitro */
  158 + OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV),
  159 + /* IVA OPP5 - OPP-Nitro SpeedBin*/
  160 + OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV),
  161 +
  162 + /* TODO: add DSP, aess, fdif, gpu */
  163 +};
  164 +
89 165 /**
90 166 * omap4_opp_init() - initialize omap4 opp table
91 167 */
... ... @@ -93,12 +169,12 @@
93 169 {
94 170 int r = -ENODEV;
95 171  
96   - if (!cpu_is_omap443x())
97   - return r;
98   -
99   - r = omap_init_opp_table(omap44xx_opp_def_list,
100   - ARRAY_SIZE(omap44xx_opp_def_list));
101   -
  172 + if (cpu_is_omap443x())
  173 + r = omap_init_opp_table(omap443x_opp_def_list,
  174 + ARRAY_SIZE(omap443x_opp_def_list));
  175 + else if (cpu_is_omap446x())
  176 + r = omap_init_opp_table(omap446x_opp_def_list,
  177 + ARRAY_SIZE(omap446x_opp_def_list));
102 178 return r;
103 179 }
104 180 device_initcall(omap4_opp_init);
arch/arm/mach-omap2/voltagedomains44xx_data.c
Diff comments   View file @ df7cded
... ... @@ -104,9 +104,15 @@
104 104 * for the currently-running IC
105 105 */
106 106 #ifdef CONFIG_PM_OPP
107   - omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
108   - omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
109   - omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
  107 + if (cpu_is_omap443x()) {
  108 + omap4_voltdm_mpu.volt_data = omap443x_vdd_mpu_volt_data;
  109 + omap4_voltdm_iva.volt_data = omap443x_vdd_iva_volt_data;
  110 + omap4_voltdm_core.volt_data = omap443x_vdd_core_volt_data;
  111 + } else if (cpu_is_omap446x()) {
  112 + omap4_voltdm_mpu.volt_data = omap446x_vdd_mpu_volt_data;
  113 + omap4_voltdm_iva.volt_data = omap446x_vdd_iva_volt_data;
  114 + omap4_voltdm_core.volt_data = omap446x_vdd_core_volt_data;
  115 + }
110 116 #endif
111 117  
112 118 omap4_voltdm_mpu.vp_param = &omap4_mpu_vp_data;