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Commit e081685c1bbe8da37c7f61726fdb783ff277f14f

Authored by Larry Finger
Committed by John W. Linville
1 parent 14fb7c17e9
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

ssb: Clear RETRY_TIMEOUT in PCI Configuration for normal devices 

MMIO log traces obtained using the Broadcom wl hybrid driver show that
the RETRY_TIMEOUT register (0x41) in PCI configuration space is cleared
if non-zero. Similar code found in other drivers such as ipw2100 show
this operation is needed to keep PCI Tx retries from interfering with
C3 CPU state. There are no known cases where omission of this code has
caused a problem, but this patch is offered just in case such a situation
occurs.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

Showing 1 changed file with 7 additions and 0 deletions Side-by-side Diff

drivers/ssb/pcihost_wrapper.c
Diff comments   View file @ e081685
... ... @@ -59,6 +59,7 @@
59 59 struct ssb_bus *ssb;
60 60 int err = -ENOMEM;
61 61 const char *name;
  62 + u32 val;
62 63  
63 64 ssb = kzalloc(sizeof(*ssb), GFP_KERNEL);
64 65 if (!ssb)
... ... @@ -73,6 +74,12 @@
73 74 if (err)
74 75 goto err_pci_disable;
75 76 pci_set_master(dev);
  77 +
  78 + /* Disable the RETRY_TIMEOUT register (0x41) to keep
  79 + * PCI Tx retries from interfering with C3 CPU state */
  80 + pci_read_config_dword(dev, 0x40, &val);
  81 + if ((val & 0x0000ff00) != 0)
  82 + pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
76 83  
77 84 err = ssb_bus_pcibus_register(ssb, dev);
78 85 if (err)