spi/dw_spi: clean the cs_control code

commit 052dc7c45i "spi/dw_spi: conditional transfer mode change" introduced cs_control code, which has a bug by using bit offset for spi mode to set transfer mode in control register. Also it forces devices who don't need cs_control to re-configure the control registers for each spi transfer. This patch will fix them Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

spi/dw_spi: clean the cs_control code
commit 052dc7c45i "spi/dw_spi: conditional transfer mode change" introduced cs_control code, which has a bug by using bit offset for spi mode to set transfer mode in control register. Also it forces devices who don't need cs_control to re-configure the control registers for each spi transfer. This patch will fix them Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Feng Tang · Grant Likely
1 parent cbcc062abb
Showing 2 changed files with 7 additions and 12 deletions Side-by-side Diff
drivers/spi/dw_spi.c
include/linux/spi/dw_spi.h
@@ -181,10 +181,6 @@
 	wait_till_not_busy(dws);
 }
  
-static void null_cs_control(u32 command)
-{
-}
-
 static int null_writer(struct dw_spi *dws)
 {
 	u8 n_bytes = dws->n_bytes;
@@ -322,7 +318,7 @@
 					struct spi_transfer,
 					transfer_list);
  
-	if (!last_transfer->cs_change)
+	if (!last_transfer->cs_change && dws->cs_control)
 		dws->cs_control(MRST_SPI_DEASSERT);
  
 	msg->state = NULL;
  
  
  
@@ -549,13 +545,13 @@
 	 */
 	if (dws->cs_control) {
 		if (dws->rx && dws->tx)
-			chip->tmode = 0x00;
+			chip->tmode = SPI_TMOD_TR;
 		else if (dws->rx)
-			chip->tmode = 0x02;
+			chip->tmode = SPI_TMOD_RO;
 		else
-			chip->tmode = 0x01;
+			chip->tmode = SPI_TMOD_TO;
  
-		cr0 &= ~(0x3 << SPI_MODE_OFFSET);
+		cr0 &= ~SPI_TMOD_MASK;
 		cr0 |= (chip->tmode << SPI_TMOD_OFFSET);
 	}
  
@@ -704,9 +700,6 @@
 		chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
 		if (!chip)
 			return -ENOMEM;
-
-		chip->cs_control = null_cs_control;
-		chip->enable_dma = 0;
 	}
  
 	/*
@@ -14,7 +14,9 @@
 #define SPI_MODE_OFFSET			6
 #define SPI_SCPH_OFFSET			6
 #define SPI_SCOL_OFFSET			7
+
 #define SPI_TMOD_OFFSET			8
+#define SPI_TMOD_MASK			(0x3 << SPI_TMOD_OFFSET)
 #define	SPI_TMOD_TR			0x0		/* xmit & recv */
 #define SPI_TMOD_TO			0x1		/* xmit only */
 #define SPI_TMOD_RO			0x2		/* recv only */
...	...	@@ -181,10 +181,6 @@
181	181	wait_till_not_busy(dws);
182	182	}
183	183
184		-static void null_cs_control(u32 command)
185		-{
186		-}
187		-
188	184	static int null_writer(struct dw_spi *dws)
189	185	{
190	186	u8 n_bytes = dws->n_bytes;
...	...	@@ -322,7 +318,7 @@
322	318	struct spi_transfer,
323	319	transfer_list);
324	320
325		- if (!last_transfer->cs_change)
	321	+ if (!last_transfer->cs_change && dws->cs_control)
326	322	dws->cs_control(MRST_SPI_DEASSERT);
327	323
328	324	msg->state = NULL;
329	325
330	326
331	327
...	...	@@ -549,13 +545,13 @@
549	545	*/
550	546	if (dws->cs_control) {
551	547	if (dws->rx && dws->tx)
552		- chip->tmode = 0x00;
	548	+ chip->tmode = SPI_TMOD_TR;
553	549	else if (dws->rx)
554		- chip->tmode = 0x02;
	550	+ chip->tmode = SPI_TMOD_RO;
555	551	else
556		- chip->tmode = 0x01;
	552	+ chip->tmode = SPI_TMOD_TO;
557	553
558		- cr0 &= ~(0x3 << SPI_MODE_OFFSET);
	554	+ cr0 &= ~SPI_TMOD_MASK;
559	555	cr0 \|= (chip->tmode << SPI_TMOD_OFFSET);
560	556	}
561	557
...	...	@@ -704,9 +700,6 @@
704	700	chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
705	701	if (!chip)
706	702	return -ENOMEM;
707		-
708		- chip->cs_control = null_cs_control;
709		- chip->enable_dma = 0;
710	703	}
711	704
712	705	/*
...	...	@@ -14,7 +14,9 @@
14	14	#define SPI_MODE_OFFSET 6
15	15	#define SPI_SCPH_OFFSET 6
16	16	#define SPI_SCOL_OFFSET 7
	17	+
17	18	#define SPI_TMOD_OFFSET 8
	19	+#define SPI_TMOD_MASK (0x3 << SPI_TMOD_OFFSET)
18	20	#define SPI_TMOD_TR 0x0 /* xmit & recv */
19	21	#define SPI_TMOD_TO 0x1 /* xmit only */
20	22	#define SPI_TMOD_RO 0x2 /* recv only */