Commit e5d809d774fc8aa76899bde3235afb046728feed
Committed by
Linus Torvalds
1 parent
f1c15f938d
Exists in
master
and in
7 other branches
pm2fb: Permedia 2V memory clock setting
Permedia 2V uses its own registers to set a memory clock. The patch adds these registers and uses them in the set_memclock() function. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Showing 2 changed files with 41 additions and 15 deletions Side-by-side Diff
drivers/video/pm2fb.c
... | ... | @@ -462,21 +462,43 @@ |
462 | 462 | int i; |
463 | 463 | unsigned char m, n, p; |
464 | 464 | |
465 | - pm2_mnp(clk, &m, &n, &p); | |
466 | - WAIT_FIFO(par, 10); | |
467 | - pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6); | |
468 | - wmb(); | |
469 | - pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_1, m); | |
470 | - pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_2, n); | |
471 | - wmb(); | |
472 | - pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 8|p); | |
473 | - wmb(); | |
474 | - pm2_RDAC_RD(par, PM2I_RD_MEMORY_CLOCK_STATUS); | |
475 | - rmb(); | |
476 | - for (i = 256; | |
477 | - i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED); | |
478 | - i--) | |
479 | - ; | |
465 | + switch (par->type) { | |
466 | + case PM2_TYPE_PERMEDIA2V: | |
467 | + pm2v_mnp(clk/2, &m, &n, &p); | |
468 | + WAIT_FIFO(par, 8); | |
469 | + pm2_WR(par, PM2VR_RD_INDEX_HIGH, PM2VI_RD_MCLK_CONTROL >> 8); | |
470 | + pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 0); | |
471 | + wmb(); | |
472 | + pm2v_RDAC_WR(par, PM2VI_RD_MCLK_PRESCALE, m); | |
473 | + pm2v_RDAC_WR(par, PM2VI_RD_MCLK_FEEDBACK, n); | |
474 | + pm2v_RDAC_WR(par, PM2VI_RD_MCLK_POSTSCALE, p); | |
475 | + wmb(); | |
476 | + pm2v_RDAC_WR(par, PM2VI_RD_MCLK_CONTROL, 1); | |
477 | + rmb(); | |
478 | + for (i = 256; | |
479 | + i && !(pm2_RDAC_RD(par, PM2VI_RD_MCLK_CONTROL) & 2); | |
480 | + i--) | |
481 | + ; | |
482 | + pm2_WR(par, PM2VR_RD_INDEX_HIGH, 0); | |
483 | + break; | |
484 | + case PM2_TYPE_PERMEDIA2: | |
485 | + pm2_mnp(clk, &m, &n, &p); | |
486 | + WAIT_FIFO(par, 10); | |
487 | + pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 6); | |
488 | + wmb(); | |
489 | + pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_1, m); | |
490 | + pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_2, n); | |
491 | + wmb(); | |
492 | + pm2_RDAC_WR(par, PM2I_RD_MEMORY_CLOCK_3, 8|p); | |
493 | + wmb(); | |
494 | + pm2_RDAC_RD(par, PM2I_RD_MEMORY_CLOCK_STATUS); | |
495 | + rmb(); | |
496 | + for (i = 256; | |
497 | + i && !(pm2_RD(par, PM2R_RD_INDEXED_DATA) & PM2F_PLL_LOCKED); | |
498 | + i--) | |
499 | + ; | |
500 | + break; | |
501 | + } | |
480 | 502 | } |
481 | 503 | |
482 | 504 | static void set_pixclock(struct pm2fb_par* par, u32 clk) |
include/video/permedia2.h
... | ... | @@ -154,6 +154,10 @@ |
154 | 154 | #define PM2VI_RD_CLK1_PRESCALE 0x204 |
155 | 155 | #define PM2VI_RD_CLK1_FEEDBACK 0x205 |
156 | 156 | #define PM2VI_RD_CLK1_POSTSCALE 0x206 |
157 | +#define PM2VI_RD_MCLK_CONTROL 0x20D | |
158 | +#define PM2VI_RD_MCLK_PRESCALE 0x20E | |
159 | +#define PM2VI_RD_MCLK_FEEDBACK 0x20F | |
160 | +#define PM2VI_RD_MCLK_POSTSCALE 0x210 | |
157 | 161 | #define PM2VI_RD_CURSOR_PALETTE 0x303 |
158 | 162 | #define PM2VI_RD_CURSOR_PATTERN 0x400 |
159 | 163 |