Commit e770a0f1154193ca6b6e720a86aeaa2edc9261c6
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: MIPS: 64-bit: Detect virtual memory size MIPS: AR7: Fix USB slave mem range typo MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.
Showing 7 changed files Side-by-side Diff
arch/mips/alchemy/common/dbdma.c
| ... | ... | @@ -412,8 +412,11 @@ |
| 412 | 412 | if (desc_base == 0) |
| 413 | 413 | return 0; |
| 414 | 414 | |
| 415 | + ctp->cdb_membase = desc_base; | |
| 415 | 416 | desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); |
| 416 | - } | |
| 417 | + } else | |
| 418 | + ctp->cdb_membase = desc_base; | |
| 419 | + | |
| 417 | 420 | dp = (au1x_ddma_desc_t *)desc_base; |
| 418 | 421 | |
| 419 | 422 | /* Keep track of the base descriptor. */ |
| ... | ... | @@ -831,7 +834,7 @@ |
| 831 | 834 | |
| 832 | 835 | au1xxx_dbdma_stop(chanid); |
| 833 | 836 | |
| 834 | - kfree((void *)ctp->chan_desc_base); | |
| 837 | + kfree((void *)ctp->cdb_membase); | |
| 835 | 838 | |
| 836 | 839 | stp->dev_flags &= ~DEV_FLAGS_INUSE; |
| 837 | 840 | dtp->dev_flags &= ~DEV_FLAGS_INUSE; |
arch/mips/ar7/platform.c
arch/mips/include/asm/cpu-features.h
| ... | ... | @@ -191,6 +191,9 @@ |
| 191 | 191 | # ifndef cpu_has_64bit_addresses |
| 192 | 192 | # define cpu_has_64bit_addresses 0 |
| 193 | 193 | # endif |
| 194 | +# ifndef cpu_vmbits | |
| 195 | +# define cpu_vmbits 31 | |
| 196 | +# endif | |
| 194 | 197 | #endif |
| 195 | 198 | |
| 196 | 199 | #ifdef CONFIG_64BIT |
| ... | ... | @@ -208,6 +211,10 @@ |
| 208 | 211 | # endif |
| 209 | 212 | # ifndef cpu_has_64bit_addresses |
| 210 | 213 | # define cpu_has_64bit_addresses 1 |
| 214 | +# endif | |
| 215 | +# ifndef cpu_vmbits | |
| 216 | +# define cpu_vmbits cpu_data[0].vmbits | |
| 217 | +# define __NEED_VMBITS_PROBE | |
| 211 | 218 | # endif |
| 212 | 219 | #endif |
| 213 | 220 |
arch/mips/include/asm/cpu-info.h
| ... | ... | @@ -58,6 +58,9 @@ |
| 58 | 58 | struct cache_desc tcache; /* Tertiary/split secondary cache */ |
| 59 | 59 | int srsets; /* Shadow register sets */ |
| 60 | 60 | int core; /* physical core number */ |
| 61 | +#ifdef CONFIG_64BIT | |
| 62 | + int vmbits; /* Virtual memory size in bits */ | |
| 63 | +#endif | |
| 61 | 64 | #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) |
| 62 | 65 | /* |
| 63 | 66 | * In the MIPS MT "SMTC" model, each TC is considered |
arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
| ... | ... | @@ -305,6 +305,7 @@ |
| 305 | 305 | dbdev_tab_t *chan_dest; |
| 306 | 306 | au1x_dma_chan_t *chan_ptr; |
| 307 | 307 | au1x_ddma_desc_t *chan_desc_base; |
| 308 | + u32 cdb_membase; /* kmalloc base of above */ | |
| 308 | 309 | au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; |
| 309 | 310 | void *chan_callparam; |
| 310 | 311 | void (*chan_callback)(int, void *); |
arch/mips/include/asm/pgtable-64.h
| ... | ... | @@ -110,7 +110,9 @@ |
| 110 | 110 | #define VMALLOC_START MAP_BASE |
| 111 | 111 | #define VMALLOC_END \ |
| 112 | 112 | (VMALLOC_START + \ |
| 113 | - PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE - (1UL << 32)) | |
| 113 | + min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \ | |
| 114 | + (1UL << cpu_vmbits)) - (1UL << 32)) | |
| 115 | + | |
| 114 | 116 | #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \ |
| 115 | 117 | VMALLOC_START != CKSSEG |
| 116 | 118 | /* Load modules into 32bit-compatible segment. */ |
arch/mips/kernel/cpu-probe.c
| ... | ... | @@ -284,6 +284,15 @@ |
| 284 | 284 | return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE); |
| 285 | 285 | } |
| 286 | 286 | |
| 287 | +static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) | |
| 288 | +{ | |
| 289 | +#ifdef __NEED_VMBITS_PROBE | |
| 290 | + write_c0_entryhi(0x3ffffffffffff000ULL); | |
| 291 | + back_to_back_c0_hazard(); | |
| 292 | + c->vmbits = fls64(read_c0_entryhi() & 0x3ffffffffffff000ULL); | |
| 293 | +#endif | |
| 294 | +} | |
| 295 | + | |
| 287 | 296 | #define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \ |
| 288 | 297 | | MIPS_CPU_COUNTER) |
| 289 | 298 | |
| ... | ... | @@ -969,6 +978,8 @@ |
| 969 | 978 | c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; |
| 970 | 979 | else |
| 971 | 980 | c->srsets = 1; |
| 981 | + | |
| 982 | + cpu_probe_vmbits(c); | |
| 972 | 983 | } |
| 973 | 984 | |
| 974 | 985 | __cpuinit void cpu_report(void) |