Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit e7dca5c0eba63e4ba8e3586c4b37863fd7fadb5a

Authored by Chris Lalancette
Committed by Avi Kivity
1 parent 33572ac0ad
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

KVM: x86: Allow any LAPIC to accept PIC interrupts 

If the guest wants to accept timer interrupts on a CPU other
than the BSP, we need to remove this gate.

Signed-off-by: Chris Lalancette <clalance@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>

Showing 1 changed file with 5 additions and 7 deletions Side-by-side Diff

arch/x86/kvm/lapic.c
Diff comments   View file @ e7dca5c
... ... @@ -1107,13 +1107,11 @@
1107 1107 u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0);
1108 1108 int r = 0;
1109 1109  
1110   - if (kvm_vcpu_is_bsp(vcpu)) {
1111   - if (!apic_hw_enabled(vcpu->arch.apic))
1112   - r = 1;
1113   - if ((lvt0 & APIC_LVT_MASKED) == 0 &&
1114   - GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
1115   - r = 1;
1116   - }
  1110 + if (!apic_hw_enabled(vcpu->arch.apic))
  1111 + r = 1;
  1112 + if ((lvt0 & APIC_LVT_MASKED) == 0 &&
  1113 + GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
  1114 + r = 1;
1117 1115 return r;
1118 1116 }
1119 1117