Commit e7eccc7e16acfcc3e613e7c0df7e62528d24581c
Committed by
Shawn Guo
1 parent
3250f59e5d
Exists in
smarc-imx_3.14.28_1.0.0_ga
and in
1 other branch
ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd
WM8962 needs 24MHz clock for its MCLK, so choose PLL4 as the parent of clko1. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Showing 2 changed files with 44 additions and 0 deletions Side-by-side Diff
arch/arm/mach-imx/clk-imx6q.c
... | ... | @@ -550,6 +550,8 @@ |
550 | 550 | clk_register_clkdev(clk[ahb], "ahb", NULL); |
551 | 551 | clk_register_clkdev(clk[cko1], "cko1", NULL); |
552 | 552 | clk_register_clkdev(clk[arm], NULL, "cpu0"); |
553 | + clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL); | |
554 | + clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL); | |
553 | 555 | |
554 | 556 | if (imx6q_revision() != IMX_CHIP_REVISION_1_0) { |
555 | 557 | clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]); |
arch/arm/mach-imx/mach-imx6q.c
... | ... | @@ -146,6 +146,45 @@ |
146 | 146 | imx6q_sabrelite_cko1_setup(); |
147 | 147 | } |
148 | 148 | |
149 | +static void __init imx6q_sabresd_cko1_setup(void) | |
150 | +{ | |
151 | + struct clk *cko1_sel, *pll4, *pll4_post, *cko1; | |
152 | + unsigned long rate; | |
153 | + | |
154 | + cko1_sel = clk_get_sys(NULL, "cko1_sel"); | |
155 | + pll4 = clk_get_sys(NULL, "pll4_audio"); | |
156 | + pll4_post = clk_get_sys(NULL, "pll4_post_div"); | |
157 | + cko1 = clk_get_sys(NULL, "cko1"); | |
158 | + if (IS_ERR(cko1_sel) || IS_ERR(pll4) | |
159 | + || IS_ERR(pll4_post) || IS_ERR(cko1)) { | |
160 | + pr_err("cko1 setup failed!\n"); | |
161 | + goto put_clk; | |
162 | + } | |
163 | + /* | |
164 | + * Setting pll4 at 768MHz (24MHz * 32) | |
165 | + * So its child clock can get 24MHz easily | |
166 | + */ | |
167 | + clk_set_rate(pll4, 768000000); | |
168 | + | |
169 | + clk_set_parent(cko1_sel, pll4_post); | |
170 | + rate = clk_round_rate(cko1, 24000000); | |
171 | + clk_set_rate(cko1, rate); | |
172 | +put_clk: | |
173 | + if (!IS_ERR(cko1_sel)) | |
174 | + clk_put(cko1_sel); | |
175 | + if (!IS_ERR(pll4_post)) | |
176 | + clk_put(pll4_post); | |
177 | + if (!IS_ERR(pll4)) | |
178 | + clk_put(pll4); | |
179 | + if (!IS_ERR(cko1)) | |
180 | + clk_put(cko1); | |
181 | +} | |
182 | + | |
183 | +static void __init imx6q_sabresd_init(void) | |
184 | +{ | |
185 | + imx6q_sabresd_cko1_setup(); | |
186 | +} | |
187 | + | |
149 | 188 | static void __init imx6q_1588_init(void) |
150 | 189 | { |
151 | 190 | struct regmap *gpr; |
... | ... | @@ -166,6 +205,9 @@ |
166 | 205 | { |
167 | 206 | if (of_machine_is_compatible("fsl,imx6q-sabrelite")) |
168 | 207 | imx6q_sabrelite_init(); |
208 | + else if (of_machine_is_compatible("fsl,imx6q-sabresd") || | |
209 | + of_machine_is_compatible("fsl,imx6dl-sabresd")) | |
210 | + imx6q_sabresd_init(); | |
169 | 211 | |
170 | 212 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
171 | 213 |