Commit e8708ef7e86a463b3a5b01d4a9abf16c8748b464
Committed by
Paul Mundt
Paul Mundt
1 parent
ab658321f3
Exists in
master
and in
7 other branches
spi: spi_sh_msiof: Fixed data sampling on the correct edge
The spi_sh_msiof.c driver presently misconfigures REDG and TEDG. TEDG==0
outputs data at the **rising edge** of the clock and REDG==0 samples data
at the **falling edge** of the clock. Therefore for SPI, TEDG must be
equal to REDG, otherwise the last byte received is not sampled in SPI
mode 3.
This brings the driver in line with the SH7723 HW Reference Manual
settings documented in Figures 20.20 and 20.21 ("SPI Clock and data
timing").
Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Showing 1 changed file with 6 additions and 9 deletions Side-by-side Diff
drivers/spi/spi_sh_msiof.c
| ... | ... | @@ -173,15 +173,12 @@ |
| 173 | 173 | int edge; |
| 174 | 174 | |
| 175 | 175 | /* |
| 176 | - * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG(!) | |
| 177 | - * 0 0 10 10 1 0 | |
| 178 | - * 0 1 10 10 0 1 | |
| 179 | - * 1 0 11 11 0 1 | |
| 180 | - * 1 1 11 11 1 0 | |
| 181 | - * | |
| 182 | - * (!) Note: REDG is inverted recommended data sheet setting | |
| 176 | + * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG | |
| 177 | + * 0 0 10 10 1 1 | |
| 178 | + * 0 1 10 10 0 0 | |
| 179 | + * 1 0 11 11 0 0 | |
| 180 | + * 1 1 11 11 1 1 | |
| 183 | 181 | */ |
| 184 | - | |
| 185 | 182 | sh_msiof_write(p, FCTR, 0); |
| 186 | 183 | sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24)); |
| 187 | 184 | sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24)); |
| ... | ... | @@ -193,7 +190,7 @@ |
| 193 | 190 | edge = cpol ? cpha : !cpha; |
| 194 | 191 | |
| 195 | 192 | tmp |= edge << 27; /* TEDG */ |
| 196 | - tmp |= !edge << 26; /* REDG */ | |
| 193 | + tmp |= edge << 26; /* REDG */ | |
| 197 | 194 | tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */ |
| 198 | 195 | sh_msiof_write(p, CTR, tmp); |
| 199 | 196 | } |