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Commit eaaeb1cb33310dea6c3fa45d8bfc63e5a1d0a846

Authored by Bjorn Helgaas
2 parents c245f24220 79272138bd
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

Merge branch 'pci/misc' into next 

* pci/misc:
  PCI: Enable upstream bridges even for VFs on virtual buses
  PCI: Add pci_upstream_bridge()
  PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()

Showing 7 changed files Side-by-side Diff

arch/x86/include/asm/x86_init.h
Diff comments   View file @ eaaeb1c
... ... @@ -172,6 +172,7 @@
172 172  
173 173 struct pci_dev;
174 174 struct msi_msg;
  175 +struct msi_desc;
175 176  
176 177 struct x86_msi_ops {
177 178 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
... ... @@ -182,6 +183,8 @@
182 183 void (*teardown_msi_irqs)(struct pci_dev *dev);
183 184 void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
184 185 int (*setup_hpet_msi)(unsigned int irq, unsigned int id);
  186 + u32 (*msi_mask_irq)(struct msi_desc *desc, u32 mask, u32 flag);
  187 + u32 (*msix_mask_irq)(struct msi_desc *desc, u32 flag);
185 188 };
186 189  
187 190 struct IO_APIC_route_entry;
arch/x86/kernel/x86_init.c
Diff comments   View file @ eaaeb1c
... ... @@ -116,6 +116,8 @@
116 116 .teardown_msi_irqs = default_teardown_msi_irqs,
117 117 .restore_msi_irqs = default_restore_msi_irqs,
118 118 .setup_hpet_msi = default_setup_hpet_msi,
  119 + .msi_mask_irq = default_msi_mask_irq,
  120 + .msix_mask_irq = default_msix_mask_irq,
119 121 };
120 122  
121 123 /* MSI arch specific hooks */
... ... @@ -137,6 +139,14 @@
137 139 void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
138 140 {
139 141 x86_msi.restore_msi_irqs(dev, irq);
  142 +}
  143 +u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
  144 +{
  145 + return x86_msi.msi_mask_irq(desc, mask, flag);
  146 +}
  147 +u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
  148 +{
  149 + return x86_msi.msix_mask_irq(desc, flag);
140 150 }
141 151 #endif
142 152  
... ... @@ -382,7 +382,14 @@
382 382 {
383 383 xen_destroy_irq(irq);
384 384 }
385   -
  385 +static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
  386 +{
  387 + return 0;
  388 +}
  389 +static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
  390 +{
  391 + return 0;
  392 +}
386 393 #endif
387 394  
388 395 int __init pci_xen_init(void)
... ... @@ -406,6 +413,8 @@
406 413 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
407 414 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
408 415 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
  416 + x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
  417 + x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
409 418 #endif
410 419 return 0;
411 420 }
... ... @@ -485,6 +494,8 @@
485 494 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
486 495 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
487 496 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
  497 + x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
  498 + x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
488 499 #endif
489 500 xen_setup_acpi_sci();
490 501 __acpi_register_gsi = acpi_register_gsi_xen;
... ... @@ -185,7 +185,7 @@
185 185 * reliably as devices without an INTx disable bit will then generate a
186 186 * level IRQ which will never be cleared.
187 187 */
188   -static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
  188 +u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
189 189 {
190 190 u32 mask_bits = desc->masked;
191 191  
192 192  
... ... @@ -199,9 +199,14 @@
199 199 return mask_bits;
200 200 }
201 201  
  202 +__weak u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
  203 +{
  204 + return default_msi_mask_irq(desc, mask, flag);
  205 +}
  206 +
202 207 static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
203 208 {
204   - desc->masked = __msi_mask_irq(desc, mask, flag);
  209 + desc->masked = arch_msi_mask_irq(desc, mask, flag);
205 210 }
206 211  
207 212 /*
... ... @@ -211,7 +216,7 @@
211 216 * file. This saves a few milliseconds when initialising devices with lots
212 217 * of MSI-X interrupts.
213 218 */
214   -static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
  219 +u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)
215 220 {
216 221 u32 mask_bits = desc->masked;
217 222 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
218 223  
... ... @@ -224,9 +229,14 @@
224 229 return mask_bits;
225 230 }
226 231  
  232 +__weak u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
  233 +{
  234 + return default_msix_mask_irq(desc, flag);
  235 +}
  236 +
227 237 static void msix_mask_irq(struct msi_desc *desc, u32 flag)
228 238 {
229   - desc->masked = __msix_mask_irq(desc, flag);
  239 + desc->masked = arch_msix_mask_irq(desc, flag);
230 240 }
231 241  
232 242 static void msi_set_mask_bit(struct irq_data *data, u32 flag)
... ... @@ -902,7 +912,7 @@
902 912 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl);
903 913 mask = msi_capable_mask(ctrl);
904 914 /* Keep cached state to be restored */
905   - __msi_mask_irq(desc, mask, ~mask);
  915 + arch_msi_mask_irq(desc, mask, ~mask);
906 916  
907 917 /* Restore dev->irq to its default pin-assertion irq */
908 918 dev->irq = desc->msi_attrib.default_irq;
... ... @@ -998,7 +1008,7 @@
998 1008 /* Return the device with MSI-X masked as initial states */
999 1009 list_for_each_entry(entry, &dev->msi_list, list) {
1000 1010 /* Keep cached states to be restored */
1001   - __msix_mask_irq(entry, 1);
  1011 + arch_msix_mask_irq(entry, 1);
1002 1012 }
1003 1013  
1004 1014 msix_set_enable(dev, 0);
... ... @@ -1148,13 +1148,13 @@
1148 1148  
1149 1149 static void pci_enable_bridge(struct pci_dev *dev)
1150 1150 {
  1151 + struct pci_dev *bridge;
1151 1152 int retval;
1152 1153  
1153   - if (!dev)
1154   - return;
  1154 + bridge = pci_upstream_bridge(dev);
  1155 + if (bridge)
  1156 + pci_enable_bridge(bridge);
1155 1157  
1156   - pci_enable_bridge(dev->bus->self);
1157   -
1158 1158 if (pci_is_enabled(dev)) {
1159 1159 if (!dev->is_busmaster)
1160 1160 pci_set_master(dev);
... ... @@ -1170,6 +1170,7 @@
1170 1170  
1171 1171 static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags)
1172 1172 {
  1173 + struct pci_dev *bridge;
1173 1174 int err;
1174 1175 int i, bars = 0;
1175 1176  
... ... @@ -1188,7 +1189,9 @@
1188 1189 if (atomic_inc_return(&dev->enable_cnt) > 1)
1189 1190 return 0; /* already enabled */
1190 1191  
1191   - pci_enable_bridge(dev->bus->self);
  1192 + bridge = pci_upstream_bridge(dev);
  1193 + if (bridge)
  1194 + pci_enable_bridge(bridge);
1192 1195  
1193 1196 /* only skip sriov related */
1194 1197 for (i = 0; i <= PCI_ROM_RESOURCE; i++)
... ... @@ -64,6 +64,8 @@
64 64  
65 65 void default_teardown_msi_irqs(struct pci_dev *dev);
66 66 void default_restore_msi_irqs(struct pci_dev *dev, int irq);
  67 +u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
  68 +u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag);
67 69  
68 70 struct msi_chip {
69 71 struct module *owner;
... ... @@ -480,6 +480,15 @@
480 480 return !(pbus->parent);
481 481 }
482 482  
  483 +static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
  484 +{
  485 + dev = pci_physfn(dev);
  486 + if (pci_is_root_bus(dev->bus))
  487 + return NULL;
  488 +
  489 + return dev->bus->self;
  490 +}
  491 +
483 492 #ifdef CONFIG_PCI_MSI
484 493 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
485 494 {