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Commit ecfadb6e5b49a0a56df2038bf39f1fcd652788b9

Authored by Will Deacon
Committed by Joerg Roedel
1 parent 1463fe44fd
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

iommu/arm-smmu: Simplify VMID and ASID allocation 

We only use ASIDs and VMIDs to identify individual stage-1 and stage-2
context-banks respectively, so rather than allocate these separately
from the context-banks, just calculate them based on the context bank
index.

Note that VMIDs are offset by 1, since VMID 0 is reserved for stage-1.
This doesn't cause us any issues with the numberspaces, since the
maximum number of context banks is half the minimum number of VMIDs.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>

Showing 1 changed file with 11 additions and 22 deletions Side-by-side Diff

drivers/iommu/arm-smmu.c
Diff comments   View file @ ecfadb6
... ... @@ -56,9 +56,6 @@
56 56 /* Maximum number of mapping groups per SMMU */
57 57 #define ARM_SMMU_MAX_SMRS 128
58 58  
59   -/* Number of VMIDs per SMMU */
60   -#define ARM_SMMU_NUM_VMIDS 256
61   -
62 59 /* SMMU global address space */
63 60 #define ARM_SMMU_GR0(smmu) ((smmu)->base)
64 61 #define ARM_SMMU_GR1(smmu) ((smmu)->base + (smmu)->pagesize)
65 62  
66 63  
... ... @@ -369,21 +366,21 @@
369 366 u32 num_context_irqs;
370 367 unsigned int *irqs;
371 368  
372   - DECLARE_BITMAP(vmid_map, ARM_SMMU_NUM_VMIDS);
373   -
374 369 struct list_head list;
375 370 struct rb_root masters;
376 371 };
377 372  
378 373 struct arm_smmu_cfg {
379 374 struct arm_smmu_device *smmu;
380   - u8 vmid;
381 375 u8 cbndx;
382 376 u8 irptndx;
383 377 u32 cbar;
384 378 pgd_t *pgd;
385 379 };
386 380  
  381 +#define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx)
  382 +#define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1)
  383 +
387 384 struct arm_smmu_domain {
388 385 /*
389 386 * A domain can span across multiple, chained SMMUs and requires
390 387  
... ... @@ -545,10 +542,12 @@
545 542  
546 543 if (stage1) {
547 544 base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);
548   - writel_relaxed(cfg->vmid, base + ARM_SMMU_CB_S1_TLBIASID);
  545 + writel_relaxed(ARM_SMMU_CB_ASID(cfg),
  546 + base + ARM_SMMU_CB_S1_TLBIASID);
549 547 } else {
550 548 base = ARM_SMMU_GR0(smmu);
551   - writel_relaxed(cfg->vmid, base + ARM_SMMU_GR0_TLBIVMID);
  549 + writel_relaxed(ARM_SMMU_CB_VMID(cfg),
  550 + base + ARM_SMMU_GR0_TLBIVMID);
552 551 }
553 552  
554 553 arm_smmu_tlb_sync(smmu);
... ... @@ -650,7 +649,7 @@
650 649 if (stage1)
651 650 reg |= (CBAR_S1_MEMATTR_WB << CBAR_S1_MEMATTR_SHIFT);
652 651 else
653   - reg |= root_cfg->vmid << CBAR_VMID_SHIFT;
  652 + reg |= ARM_SMMU_CB_VMID(root_cfg) << CBAR_VMID_SHIFT;
654 653 writel_relaxed(reg, gr1_base + ARM_SMMU_GR1_CBAR(root_cfg->cbndx));
655 654  
656 655 if (smmu->version > 1) {
... ... @@ -715,7 +714,7 @@
715 714 writel_relaxed(reg, cb_base + ARM_SMMU_CB_TTBR0_LO);
716 715 reg = (phys_addr_t)__pa(root_cfg->pgd) >> 32;
717 716 if (stage1)
718   - reg |= root_cfg->vmid << TTBRn_HI_ASID_SHIFT;
  717 + reg |= ARM_SMMU_CB_ASID(root_cfg) << TTBRn_HI_ASID_SHIFT;
719 718 writel_relaxed(reg, cb_base + ARM_SMMU_CB_TTBR0_HI);
720 719  
721 720 /*
... ... @@ -807,12 +806,6 @@
807 806 return -ENODEV;
808 807 }
809 808  
810   - /* VMID zero is reserved for stage-1 mappings */
811   - ret = __arm_smmu_alloc_bitmap(smmu->vmid_map, 1, ARM_SMMU_NUM_VMIDS);
812   - if (IS_ERR_VALUE(ret))
813   - return ret;
814   -
815   - root_cfg->vmid = ret;
816 809 if (smmu->features & ARM_SMMU_FEAT_TRANS_NESTED) {
817 810 /*
818 811 * We will likely want to change this if/when KVM gets
819 812  
... ... @@ -831,10 +824,9 @@
831 824 ret = __arm_smmu_alloc_bitmap(smmu->context_map, start,
832 825 smmu->num_context_banks);
833 826 if (IS_ERR_VALUE(ret))
834   - goto out_free_vmid;
  827 + return ret;
835 828  
836 829 root_cfg->cbndx = ret;
837   -
838 830 if (smmu->version == 1) {
839 831 root_cfg->irptndx = atomic_inc_return(&smmu->irptndx);
840 832 root_cfg->irptndx %= smmu->num_context_irqs;
... ... @@ -858,8 +850,6 @@
858 850  
859 851 out_free_context:
860 852 __arm_smmu_free_bitmap(smmu->context_map, root_cfg->cbndx);
861   -out_free_vmid:
862   - __arm_smmu_free_bitmap(smmu->vmid_map, root_cfg->vmid);
863 853 return ret;
864 854 }
865 855  
... ... @@ -884,7 +874,6 @@
884 874 free_irq(irq, domain);
885 875 }
886 876  
887   - __arm_smmu_free_bitmap(smmu->vmid_map, root_cfg->vmid);
888 877 __arm_smmu_free_bitmap(smmu->context_map, root_cfg->cbndx);
889 878 }
890 879  
... ... @@ -1936,7 +1925,7 @@
1936 1925 of_node_put(master->of_node);
1937 1926 }
1938 1927  
1939   - if (!bitmap_empty(smmu->vmid_map, ARM_SMMU_NUM_VMIDS))
  1928 + if (!bitmap_empty(smmu->context_map, ARM_SMMU_MAX_CBS))
1940 1929 dev_err(dev, "removing device with active domains!\n");
1941 1930  
1942 1931 for (i = 0; i < smmu->num_global_irqs; ++i)