Commit f1006257893917dfb1e0d74cb47b18c0e2908693
1 parent
47fc28bff8
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
bounce: allow use of bounce pool via config option
The tilegx USB OHCI support needs the bounce pool since we're not using the IOMMU to handle 32-bit addresses. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Showing 2 changed files with 11 additions and 3 deletions Side-by-side Diff
arch/tile/Kconfig
... | ... | @@ -406,6 +406,12 @@ |
406 | 406 | Provides USB host adapter support for the built-in EHCI and OHCI |
407 | 407 | interfaces on TILE-Gx chips. |
408 | 408 | |
409 | +# USB OHCI needs the bounce pool since tilegx will often have more | |
410 | +# than 4GB of memory, but we don't currently use the IOTLB to present | |
411 | +# a 32-bit address to OHCI. So we need to use a bounce pool instead. | |
412 | +config NEED_BOUNCE_POOL | |
413 | + def_bool USB_OHCI_HCD | |
414 | + | |
409 | 415 | config HOTPLUG |
410 | 416 | bool "Support for hot-pluggable devices" |
411 | 417 | ---help--- |
mm/bounce.c
... | ... | @@ -24,23 +24,25 @@ |
24 | 24 | |
25 | 25 | static mempool_t *page_pool, *isa_page_pool; |
26 | 26 | |
27 | -#ifdef CONFIG_HIGHMEM | |
27 | +#if defined(CONFIG_HIGHMEM) || defined(CONFIG_NEED_BOUNCE_POOL) | |
28 | 28 | static __init int init_emergency_pool(void) |
29 | 29 | { |
30 | -#ifndef CONFIG_MEMORY_HOTPLUG | |
30 | +#if defined(CONFIG_HIGHMEM) && !defined(CONFIG_MEMORY_HOTPLUG) | |
31 | 31 | if (max_pfn <= max_low_pfn) |
32 | 32 | return 0; |
33 | 33 | #endif |
34 | 34 | |
35 | 35 | page_pool = mempool_create_page_pool(POOL_SIZE, 0); |
36 | 36 | BUG_ON(!page_pool); |
37 | - printk("highmem bounce pool size: %d pages\n", POOL_SIZE); | |
37 | + printk("bounce pool size: %d pages\n", POOL_SIZE); | |
38 | 38 | |
39 | 39 | return 0; |
40 | 40 | } |
41 | 41 | |
42 | 42 | __initcall(init_emergency_pool); |
43 | +#endif | |
43 | 44 | |
45 | +#ifdef CONFIG_HIGHMEM | |
44 | 46 | /* |
45 | 47 | * highmem version, map in to vec |
46 | 48 | */ |