Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit f2f41c68eabfb32574f9088135480618206dd432

Authored by Greg Ungerer
1 parent 6d8a1393ec
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

m68knommu: move ColdFire slice timer address defiens to 54xx header 

Move the base address defines of the ColdFire 54xx CPU slice timers into the
54xx specific header (m54xxsim.h). They are CPU specific, and belong with the
CPU specific defines. Also make them relative to the MBAR peripheral region,
making the define the absolute address.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

Showing 3 changed files with 8 additions and 9 deletions Side-by-side Diff

arch/m68k/include/asm/m54xxsim.h
Diff comments   View file @ f2f41c6
... ... @@ -47,6 +47,12 @@
47 47 #define MCF_IRQ_UART3 (MCFINT_VECBASE + 32)
48 48  
49 49 /*
  50 + * Slice Timer support.
  51 + */
  52 +#define MCFSLT_TIMER0 (MCF_MBAR + 0x900) /* Base addr TIMER0 */
  53 +#define MCFSLT_TIMER1 (MCF_MBAR + 0x910) /* Base addr TIMER1 */
  54 +
  55 +/*
50 56 * Generic GPIO support
51 57 */
52 58 #define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */
arch/m68k/include/asm/mcfslt.h
Diff comments   View file @ f2f41c6
... ... @@ -13,13 +13,6 @@
13 13 /****************************************************************************/
14 14  
15 15 /*
16   - * Get address specific defines for the 547x.
17   - */
18   -#define MCFSLT_TIMER0 0x900 /* Base address of TIMER0 */
19   -#define MCFSLT_TIMER1 0x910 /* Base address of TIMER1 */
20   -
21   -
22   -/*
23 16 * Define the SLT timer register set addresses.
24 17 */
25 18 #define MCFSLT_STCNT 0x00 /* Terminal count */
arch/m68k/platform/coldfire/sltimers.c
Diff comments   View file @ f2f41c6
... ... @@ -32,7 +32,7 @@
32 32 /*
33 33 * By default use Slice Timer 1 as the profiler clock timer.
34 34 */
35   -#define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a))
  35 +#define PA(a) (MCFSLT_TIMER1 + (a))
36 36  
37 37 /*
38 38 * Choose a reasonably fast profile timer. Make it an odd value to
... ... @@ -76,7 +76,7 @@
76 76 /*
77 77 * By default use Slice Timer 0 as the system clock timer.
78 78 */
79   -#define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a))
  79 +#define TA(a) (MCFSLT_TIMER0 + (a))
80 80  
81 81 static u32 mcfslt_cycles_per_jiffy;
82 82 static u32 mcfslt_cnt;