Commit f818ca3e6894d4a630a1ecc673c91df8fb6f6898
Committed by
John Crispin
John Crispin
1 parent
53330332f1
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
MIPS: ath79: add GPIO setup code for the QCA955X SoCs
The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <blogic@openwrt.org>
Showing 2 changed files with 4 additions and 1 deletions Side-by-side Diff
arch/mips/ath79/gpio.c
| ... | ... | @@ -194,12 +194,14 @@ |
| 194 | 194 | ath79_gpio_count = AR933X_GPIO_COUNT; |
| 195 | 195 | else if (soc_is_ar934x()) |
| 196 | 196 | ath79_gpio_count = AR934X_GPIO_COUNT; |
| 197 | + else if (soc_is_qca955x()) | |
| 198 | + ath79_gpio_count = QCA955X_GPIO_COUNT; | |
| 197 | 199 | else |
| 198 | 200 | BUG(); |
| 199 | 201 | |
| 200 | 202 | ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); |
| 201 | 203 | ath79_gpio_chip.ngpio = ath79_gpio_count; |
| 202 | - if (soc_is_ar934x()) { | |
| 204 | + if (soc_is_ar934x() || soc_is_qca955x()) { | |
| 203 | 205 | ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; |
| 204 | 206 | ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; |
| 205 | 207 | } |