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Commit fe56b954eadefb8b93b7d6b9244af38a352c8799

Authored by Ralf Baechle
1 parent 45a98eb2b7
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[MIPS] SMTC: Move MIPS_CPU_IPI_IRQ definition into header. 

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 2 changed files with 10 additions and 2 deletions Side-by-side Diff

arch/mips/kernel/smtc.c
Diff comments   View file @ fe56b95
... ... @@ -28,8 +28,6 @@
28 28 * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.
29 29 */
30 30  
31   -#define MIPS_CPU_IPI_IRQ 1
32   -
33 31 #define LOCK_MT_PRA() \
34 32 local_irq_save(flags); \
35 33 mtflags = dmt()
include/asm-mips/smtc.h
Diff comments   View file @ fe56b95
... ... @@ -55,5 +55,15 @@
55 55  
56 56 #define PARKED_INDEX ((unsigned int)0x80000000)
57 57  
  58 +/*
  59 + * Define low-level interrupt mask for IPIs, if necessary.
  60 + * By default, use SW interrupt 1, which requires no external
  61 + * hardware support, but which works only for single-core
  62 + * MIPS MT systems.
  63 + */
  64 +#ifndef MIPS_CPU_IPI_IRQ
  65 +#define MIPS_CPU_IPI_IRQ 1
  66 +#endif
  67 +
58 68 #endif /* _ASM_SMTC_MT_H */