Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86

* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: x86: fix APIC related bootup crash on Athlon XP CPUs time: add ADJ_OFFSET_SS_READ x86: export the symbol empty_zero_page on the 32-bit x86 architecture x86: fix kprobes_64.c inlining borkage pci: use pci=bfsort for HP DL385 G2, DL585 G2 x86: correctly set UTS_MACHINE for "make ARCH=x86" lockdep: annotate do_debug() trap handler x86: turn off iommu merge by default x86: fix ACPI compile for LOCAL_APIC=n x86: printk kernel version in WARN_ON and other dump_stack users ACPI: Set max_cstate to 1 for early Opterons. x86: fix NMI watchdog & 'stopped time' problem

Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86
* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: x86: fix APIC related bootup crash on Athlon XP CPUs time: add ADJ_OFFSET_SS_READ x86: export the symbol empty_zero_page on the 32-bit x86 architecture x86: fix kprobes_64.c inlining borkage pci: use pci=bfsort for HP DL385 G2, DL585 G2 x86: correctly set UTS_MACHINE for "make ARCH=x86" lockdep: annotate do_debug() trap handler x86: turn off iommu merge by default x86: fix ACPI compile for LOCAL_APIC=n x86: printk kernel version in WARN_ON and other dump_stack users ACPI: Set max_cstate to 1 for early Opterons. x86: fix NMI watchdog & 'stopped time' problem
Linus Torvalds
2 parents b5faa4b89e f44d9efd35
Showing 15 changed files Side-by-side Diff
arch/x86/kernel/apic_32.c
arch/x86/kernel/i386_ksyms_32.c
arch/x86/kernel/io_apic_32.c
arch/x86/kernel/kprobes_64.c
arch/x86/kernel/nmi_32.c
arch/x86/kernel/pci-dma_64.c
arch/x86/kernel/traps_32.c
arch/x86/kernel/traps_64.c
arch/x86/pci/common.c
drivers/acpi/processor_idle.c
include/asm-ia64/acpi.h
include/asm-x86/acpi.h
include/asm-x86/apic_32.h
include/linux/timex.h
kernel/time/ntp.c
@@ -789,7 +789,7 @@
 	 * Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 And not
 	 * needed on AMD.
 	 */
-	if (modern_apic())
+	if (modern_apic() || boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
 		return;
 	/*
 	 * Wait for idle.
@@ -2,6 +2,7 @@
 #include <asm/semaphore.h>
 #include <asm/checksum.h>
 #include <asm/desc.h>
+#include <asm/pgtable.h>
  
 EXPORT_SYMBOL(__down_failed);
 EXPORT_SYMBOL(__down_failed_interruptible);
@@ -29,4 +30,5 @@
 #endif
  
 EXPORT_SYMBOL(csum_partial);
+EXPORT_SYMBOL(empty_zero_page);
@@ -2166,7 +2166,11 @@
 {
 	int apic1, pin1, apic2, pin2;
 	int vector;
+	unsigned int ver;
  
+	ver = apic_read(APIC_LVR);
+	ver = GET_APIC_VERSION(ver);
+
 	/*
 	 * get/set the timer IRQ vector:
 	 */
  
@@ -2179,11 +2183,15 @@
 	 * mode for the 8259A whenever interrupts are routed
 	 * through I/O APICs.  Also IRQ0 has to be enabled in
 	 * the 8259A which implies the virtual wire has to be
-	 * disabled in the local APIC.
+	 * disabled in the local APIC.  Finally timer interrupts
+	 * need to be acknowledged manually in the 8259A for
+	 * timer_interrupt() and for the i82489DX when using
+	 * the NMI watchdog.
 	 */
 	apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
 	init_8259A(1);
-	timer_ack = 1;
+	timer_ack = !cpu_has_tsc;
+	timer_ack |= (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
 	if (timer_over_8254 > 0)
 		enable_8259A_irq(0);
  
@@ -58,7 +58,7 @@
 /*
  * returns non-zero if opcode modifies the interrupt flag.
  */
-static __always_inline int is_IF_modifier(kprobe_opcode_t *insn)
+static int __kprobes is_IF_modifier(kprobe_opcode_t *insn)
 {
 	switch (*insn) {
 	case 0xfa:		/* cli */
@@ -25,6 +25,7 @@
  
 #include <asm/smp.h>
 #include <asm/nmi.h>
+#include <asm/timer.h>
  
 #include "mach_traps.h"
  
@@ -83,7 +84,7 @@
  
 	prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
 	if (!prev_nmi_count)
-		return -1;
+		goto error;
  
 	printk(KERN_INFO "Testing NMI watchdog ... ");
  
@@ -117,7 +118,7 @@
 	if (!atomic_read(&nmi_active)) {
 		kfree(prev_nmi_count);
 		atomic_set(&nmi_active, -1);
-		return -1;
+		goto error;
 	}
 	printk("OK.\n");
  
@@ -128,6 +129,10 @@
  
 	kfree(prev_nmi_count);
 	return 0;
+error:
+	timer_ack = !cpu_has_tsc;
+
+	return -1;
 }
 /* This needs to happen later in boot so counters are working */
 late_initcall(check_nmi_watchdog);
@@ -12,7 +12,7 @@
 #include <asm/gart.h>
 #include <asm/calgary.h>
  
-int iommu_merge __read_mostly = 1;
+int iommu_merge __read_mostly = 0;
 EXPORT_SYMBOL(iommu_merge);
  
 dma_addr_t bad_dma_address __read_mostly;
@@ -283,6 +283,11 @@
 {
 	unsigned long stack;
  
+	printk("Pid: %d, comm: %.20s %s %s %.*s\n",
+		current->pid, current->comm, print_tainted(),
+		init_utsname()->release,
+		(int)strcspn(init_utsname()->version, " "),
+		init_utsname()->version);
 	show_trace(current, NULL, &stack);
 }
  
@@ -827,6 +832,8 @@
 {
 	unsigned int condition;
 	struct task_struct *tsk = current;
+
+	trace_hardirqs_fixup();
  
 	get_debugreg(condition, 6);
  
@@ -31,6 +31,7 @@
 #include <linux/uaccess.h>
 #include <linux/bug.h>
 #include <linux/kdebug.h>
+#include <linux/utsname.h>
  
 #if defined(CONFIG_EDAC)
 #include <linux/edac.h>
@@ -400,6 +401,12 @@
 void dump_stack(void)
 {
 	unsigned long dummy;
+
+	printk("Pid: %d, comm: %.20s %s %s %.*s\n",
+		current->pid, current->comm, print_tainted(),
+		init_utsname()->release,
+		(int)strcspn(init_utsname()->version, " "),
+		init_utsname()->version);
 	show_trace(NULL, NULL, &dummy);
 }
  
@@ -845,6 +852,8 @@
 	unsigned long condition;
 	struct task_struct *tsk = current;
 	siginfo_t info;
+
+	trace_hardirqs_fixup();
  
 	get_debugreg(condition, 6);
  
@@ -315,6 +315,22 @@
 		},
 	},
 #endif
+	{
+		.callback = set_bf_sort,
+		.ident = "HP ProLiant DL385 G2",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
+		},
+	},
+	{
+		.callback = set_bf_sort,
+		.ident = "HP ProLiant DL585 G2",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
+		},
+	},
 	{}
 };
  
@@ -1673,6 +1673,7 @@
  
 	if (!first_run) {
 		dmi_check_system(processor_power_dmi_table);
+		max_cstate = acpi_processor_cstate_check(max_cstate);
 		if (max_cstate < ACPI_C_STATES_MAX)
 			printk(KERN_NOTICE
 			       "ACPI: processor limited to max C-state %d\n",
@@ -94,6 +94,7 @@
 #define acpi_noirq 0	/* ACPI always enabled on IA64 */
 #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */
 #define acpi_strict 1	/* no ACPI spec workarounds on IA64 */
+#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */
 static inline void disable_acpi(void) { }
  
 const char *acpi_get_sysname (void);
+#ifndef _ASM_X86_ACPI_H
+#define _ASM_X86_ACPI_H
+
 #ifdef CONFIG_X86_32
 # include "acpi_32.h"
 #else
 # include "acpi_64.h"
+#endif
+
+#include <asm/processor.h>
+
+/*
+ * Check if the CPU can handle C2 and deeper
+ */
+static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
+{
+	/*
+	 * Early models (<=5) of AMD Opterons are not supposed to go into
+	 * C2 state.
+	 *
+	 * Steppings 0x0A and later are good
+	 */
+	if (boot_cpu_data.x86 == 0x0F &&
+	    boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+	    boot_cpu_data.x86_model <= 0x05 &&
+	    boot_cpu_data.x86_mask < 0x0A)
+		return 1;
+	else
+		return max_cstate;
+}
+
 #endif
@@ -120,6 +120,7 @@
  
 #else /* !CONFIG_X86_LOCAL_APIC */
 static inline void lapic_shutdown(void) { }
+#define local_apic_timer_c2_ok		1
  
 #endif /* !CONFIG_X86_LOCAL_APIC */
  
@@ -137,6 +137,7 @@
 #define ADJ_TIMECONST		0x0020	/* pll time constant */
 #define ADJ_TICK		0x4000	/* tick value */
 #define ADJ_OFFSET_SINGLESHOT	0x8001	/* old-fashioned adjtime */
+#define ADJ_OFFSET_SS_READ	0xa001  /* read-only adjtime */
  
 /* xntp 3.4 compatibility names */
 #define MOD_OFFSET	ADJ_OFFSET
@@ -249,10 +249,12 @@
  
 	/* Now we validate the data before disabling interrupts */
  
-	if ((txc->modes & ADJ_OFFSET_SINGLESHOT) == ADJ_OFFSET_SINGLESHOT)
+	if ((txc->modes & ADJ_OFFSET_SINGLESHOT) == ADJ_OFFSET_SINGLESHOT) {
 	  /* singleshot must not be used with any other mode bits */
-		if (txc->modes != ADJ_OFFSET_SINGLESHOT)
+		if (txc->modes != ADJ_OFFSET_SINGLESHOT &&
+					txc->modes != ADJ_OFFSET_SS_READ)
 			return -EINVAL;
+	}
  
 	if (txc->modes != ADJ_OFFSET_SINGLESHOT && (txc->modes & ADJ_OFFSET))
 	  /* adjustment Offset limited to +- .512 seconds */
@@ -372,7 +374,8 @@
 leave:	if ((time_status & (STA_UNSYNC|STA_CLOCKERR)) != 0)
 		result = TIME_ERROR;
  
-	if ((txc->modes & ADJ_OFFSET_SINGLESHOT) == ADJ_OFFSET_SINGLESHOT)
+	if ((txc->modes == ADJ_OFFSET_SINGLESHOT) ||
+			(txc->modes == ADJ_OFFSET_SS_READ))
 		txc->offset = save_adjust;
 	else
 		txc->offset = ((long)shift_right(time_offset, SHIFT_UPDATE)) *
...	...	@@ -789,7 +789,7 @@
789	789	* Unsupported on P4 - see Intel Dev. Manual Vol. 3, Ch. 8.6.1 And not
790	790	* needed on AMD.
791	791	*/
792		- if (modern_apic())
	792	+ if (modern_apic() \|\| boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
793	793	return;
794	794	/*
795	795	* Wait for idle.
...	...	@@ -2,6 +2,7 @@
2	2	#include <asm/semaphore.h>
3	3	#include <asm/checksum.h>
4	4	#include <asm/desc.h>
	5	+#include <asm/pgtable.h>
5	6
6	7	EXPORT_SYMBOL(__down_failed);
7	8	EXPORT_SYMBOL(__down_failed_interruptible);
...	...	@@ -29,4 +30,5 @@
29	30	#endif
30	31
31	32	EXPORT_SYMBOL(csum_partial);
	33	+EXPORT_SYMBOL(empty_zero_page);
...	...	@@ -2166,7 +2166,11 @@
2166	2166	{
2167	2167	int apic1, pin1, apic2, pin2;
2168	2168	int vector;
	2169	+ unsigned int ver;
2169	2170
	2171	+ ver = apic_read(APIC_LVR);
	2172	+ ver = GET_APIC_VERSION(ver);
	2173	+
2170	2174	/*
2171	2175	* get/set the timer IRQ vector:
2172	2176	*/
2173	2177
...	...	@@ -2179,11 +2183,15 @@
2179	2183	* mode for the 8259A whenever interrupts are routed
2180	2184	* through I/O APICs. Also IRQ0 has to be enabled in
2181	2185	* the 8259A which implies the virtual wire has to be
2182		- * disabled in the local APIC.
	2186	+ * disabled in the local APIC. Finally timer interrupts
	2187	+ * need to be acknowledged manually in the 8259A for
	2188	+ * timer_interrupt() and for the i82489DX when using
	2189	+ * the NMI watchdog.
2183	2190	*/
2184	2191	apic_write_around(APIC_LVT0, APIC_LVT_MASKED \| APIC_DM_EXTINT);
2185	2192	init_8259A(1);
2186		- timer_ack = 1;
	2193	+ timer_ack = !cpu_has_tsc;
	2194	+ timer_ack \|= (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
2187	2195	if (timer_over_8254 > 0)
2188	2196	enable_8259A_irq(0);
2189	2197
...	...	@@ -58,7 +58,7 @@
58	58	/*
59	59	* returns non-zero if opcode modifies the interrupt flag.
60	60	*/
61		-static __always_inline int is_IF_modifier(kprobe_opcode_t *insn)
	61	+static int __kprobes is_IF_modifier(kprobe_opcode_t *insn)
62	62	{
63	63	switch (*insn) {
64	64	case 0xfa: /* cli */
...	...	@@ -25,6 +25,7 @@
25	25
26	26	#include <asm/smp.h>
27	27	#include <asm/nmi.h>
	28	+#include <asm/timer.h>
28	29
29	30	#include "mach_traps.h"
30	31
...	...	@@ -83,7 +84,7 @@
83	84
84	85	prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
85	86	if (!prev_nmi_count)
86		- return -1;
	87	+ goto error;
87	88
88	89	printk(KERN_INFO "Testing NMI watchdog ... ");
89	90
...	...	@@ -117,7 +118,7 @@
117	118	if (!atomic_read(&nmi_active)) {
118	119	kfree(prev_nmi_count);
119	120	atomic_set(&nmi_active, -1);
120		- return -1;
	121	+ goto error;
121	122	}
122	123	printk("OK.\n");
123	124
...	...	@@ -128,6 +129,10 @@
128	129
129	130	kfree(prev_nmi_count);
130	131	return 0;
	132	+error:
	133	+ timer_ack = !cpu_has_tsc;
	134	+
	135	+ return -1;
131	136	}
132	137	/* This needs to happen later in boot so counters are working */
133	138	late_initcall(check_nmi_watchdog);
...	...	@@ -12,7 +12,7 @@
12	12	#include <asm/gart.h>
13	13	#include <asm/calgary.h>
14	14
15		-int iommu_merge __read_mostly = 1;
	15	+int iommu_merge __read_mostly = 0;
16	16	EXPORT_SYMBOL(iommu_merge);
17	17
18	18	dma_addr_t bad_dma_address __read_mostly;
...	...	@@ -283,6 +283,11 @@
283	283	{
284	284	unsigned long stack;
285	285
	286	+ printk("Pid: %d, comm: %.20s %s %s %.*s\n",
	287	+ current->pid, current->comm, print_tainted(),
	288	+ init_utsname()->release,
	289	+ (int)strcspn(init_utsname()->version, " "),
	290	+ init_utsname()->version);
286	291	show_trace(current, NULL, &stack);
287	292	}
288	293
...	...	@@ -827,6 +832,8 @@
827	832	{
828	833	unsigned int condition;
829	834	struct task_struct *tsk = current;
	835	+
	836	+ trace_hardirqs_fixup();
830	837
831	838	get_debugreg(condition, 6);
832	839
...	...	@@ -31,6 +31,7 @@
31	31	#include <linux/uaccess.h>
32	32	#include <linux/bug.h>
33	33	#include <linux/kdebug.h>
	34	+#include <linux/utsname.h>
34	35
35	36	#if defined(CONFIG_EDAC)
36	37	#include <linux/edac.h>
...	...	@@ -400,6 +401,12 @@
400	401	void dump_stack(void)
401	402	{
402	403	unsigned long dummy;
	404	+
	405	+ printk("Pid: %d, comm: %.20s %s %s %.*s\n",
	406	+ current->pid, current->comm, print_tainted(),
	407	+ init_utsname()->release,
	408	+ (int)strcspn(init_utsname()->version, " "),
	409	+ init_utsname()->version);
403	410	show_trace(NULL, NULL, &dummy);
404	411	}
405	412
...	...	@@ -845,6 +852,8 @@
845	852	unsigned long condition;
846	853	struct task_struct *tsk = current;
847	854	siginfo_t info;
	855	+
	856	+ trace_hardirqs_fixup();
848	857
849	858	get_debugreg(condition, 6);
850	859
...	...	@@ -315,6 +315,22 @@
315	315	},
316	316	},
317	317	#endif
	318	+ {
	319	+ .callback = set_bf_sort,
	320	+ .ident = "HP ProLiant DL385 G2",
	321	+ .matches = {
	322	+ DMI_MATCH(DMI_SYS_VENDOR, "HP"),
	323	+ DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
	324	+ },
	325	+ },
	326	+ {
	327	+ .callback = set_bf_sort,
	328	+ .ident = "HP ProLiant DL585 G2",
	329	+ .matches = {
	330	+ DMI_MATCH(DMI_SYS_VENDOR, "HP"),
	331	+ DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
	332	+ },
	333	+ },
318	334	{}
319	335	};
320	336
...	...	@@ -1673,6 +1673,7 @@
1673	1673
1674	1674	if (!first_run) {
1675	1675	dmi_check_system(processor_power_dmi_table);
	1676	+ max_cstate = acpi_processor_cstate_check(max_cstate);
1676	1677	if (max_cstate < ACPI_C_STATES_MAX)
1677	1678	printk(KERN_NOTICE
1678	1679	"ACPI: processor limited to max C-state %d\n",