03 Oct, 2012

1 commit

  • Pull sparc updates from David Miller:
    "Largely this is simply adding support for the Niagara 4 cpu.

    Major areas are perf events (chip now supports 4 counters and can
    monitor any event on each counter), crypto (opcodes are availble for
    sha1, sha256, sha512, md5, crc32c, AES, DES, CAMELLIA, and Kasumi
    although the last is unsupported since we lack a generic crypto layer
    Kasumi implementation), and an optimized memcpy.

    Finally some cleanups by Peter Senna Tschudin."

    * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next: (47 commits)
    sparc64: Fix trailing whitespace in NG4 memcpy.
    sparc64: Fix comment type in NG4 copy from user.
    sparc64: Add SPARC-T4 optimized memcpy.
    drivers/sbus/char: removes unnecessary semicolon
    arch/sparc/kernel/pci_sun4v.c: removes unnecessary semicolon
    sparc64: Fix function argument comment in camellia_sparc64_key_expand asm.
    sparc64: Fix IV handling bug in des_sparc64_cbc_decrypt
    sparc64: Add auto-loading mechanism to crypto-opcode drivers.
    sparc64: Add missing pr_fmt define to crypto opcode drivers.
    sparc64: Adjust crypto priorities.
    sparc64: Use cpu_pgsz_mask for linear kernel mapping config.
    sparc64: Probe cpu page size support more portably.
    sparc64: Support 2GB and 16GB page sizes for kernel linear mappings.
    sparc64: Fix bugs in unrolled 256-bit loops.
    sparc64: Avoid code duplication in crypto assembler.
    sparc64: Unroll CTR crypt loops in AES driver.
    sparc64: Unroll ECB decryption loops in AES driver.
    sparc64: Unroll ECB encryption loops in AES driver.
    sparc64: Add ctr mode support to AES driver.
    sparc64: Move AES driver over to a methods based implementation.
    ...

    Linus Torvalds
     

22 Sep, 2012

1 commit

  • * multiplatform/platform-data:
    ARM: spear: move platform_data definitions
    ARM: samsung: move platform_data definitions
    ARM: orion: move platform_data definitions
    ARM: nomadik: move platform_data definitions
    ARM: w90x900: move platform_data definitions
    ARM: vt8500: move platform_data definitions
    ARM: tegra: move sdhci platform_data definition
    ARM: sa1100: move platform_data definitions
    ARM: pxa: move platform_data definitions
    ARM: netx: move platform_data definitions
    ARM: msm: move platform_data definitions
    ARM: imx: move platform_data definitions
    ARM: ep93xx: move platform_data definitions
    ARM: davinci: move platform_data definitions
    ARM: at91: move platform_data definitions

    Conflicts due to removed files:
    arch/arm/mach-tegra/board-harmony.c
    arch/arm/mach-tegra/board-trimslice.c

    Conflicts due to code removal:
    arch/arm/mach-tegra/board-paz00.c

    Context conflicts in:
    drivers/mmc/host/sdhci-tegra.c
    drivers/net/irda/pxaficp_ir.c

    Signed-off-by: Olof Johansson

    Olof Johansson
     

16 Sep, 2012

1 commit

  • Make the crypto opcode implementations have a higher priority than
    those provides by the ring buffer based Niagara crypto device.

    Also, several crypto opcode hashes were not setting the priority value
    at all.

    Signed-off-by: David S. Miller

    David S. Miller
     

14 Sep, 2012

1 commit

  • Platform data for device drivers should be defined in
    include/linux/platform_data/*.h, not in the architecture
    and platform specific directories.

    This moves such data out of the nomadik include directories

    Signed-off-by: Arnd Bergmann
    Acked-by: Mark Brown
    Acked-by: Greg Kroah-Hartman
    Acked-by: Nicolas Pitre
    Acked-by: Felipe Balbi
    Acked-by: Alessandro Rubini
    Acked-by: Linus Walleij
    Cc: STEricsson
    Cc: Srinidhi Kasagar
    Cc: Herbert Xu
    Cc: "David S. Miller"
    Cc: Dmitry Torokhov
    Cc: David Woodhouse
    Cc: Andreas Westin

    Arnd Bergmann
     

12 Sep, 2012

1 commit


07 Sep, 2012

1 commit


24 Aug, 2012

1 commit


20 Aug, 2012

1 commit

  • commit "crypto: caam - use non-irq versions of spinlocks for job rings"
    made two bad assumptions:

    (a) The caam_jr_enqueue lock isn't used in softirq context.
    Not true: jr_enqueue can be interrupted by an incoming net
    interrupt and the received packet may be sent for encryption,
    via caam_jr_enqueue in softirq context, thereby inducing a
    deadlock.

    This is evidenced when running netperf over an IPSec tunnel
    between two P4080's, with spinlock debugging turned on:

    [ 892.092569] BUG: spinlock lockup on CPU#7, netperf/10634, e8bf5f70
    [ 892.098747] Call Trace:
    [ 892.101197] [eff9fc10] [c00084c0] show_stack+0x48/0x15c (unreliable)
    [ 892.107563] [eff9fc50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
    [ 892.113399] [eff9fc80] [c0596494] _raw_spin_lock+0x3c/0x50
    [ 892.118889] [eff9fc90] [c0445e74] caam_jr_enqueue+0xf8/0x250
    [ 892.124550] [eff9fcd0] [c044a644] aead_decrypt+0x6c/0xc8
    [ 892.129625] BUG: spinlock lockup on CPU#5, swapper/5/0, e8bf5f70
    [ 892.129629] Call Trace:
    [ 892.129637] [effa7c10] [c00084c0] show_stack+0x48/0x15c (unreliable)
    [ 892.129645] [effa7c50] [c0239c2c] do_raw_spin_lock+0x16c/0x174
    [ 892.129652] [effa7c80] [c0596494] _raw_spin_lock+0x3c/0x50
    [ 892.129660] [effa7c90] [c0445e74] caam_jr_enqueue+0xf8/0x250
    [ 892.129666] [effa7cd0] [c044a644] aead_decrypt+0x6c/0xc8
    [ 892.129674] [effa7d00] [c0509724] esp_input+0x178/0x334
    [ 892.129681] [effa7d50] [c0519778] xfrm_input+0x77c/0x818
    [ 892.129688] [effa7da0] [c050e344] xfrm4_rcv_encap+0x20/0x30
    [ 892.129697] [effa7db0] [c04b90c8] ip_local_deliver+0x190/0x408
    [ 892.129703] [effa7de0] [c04b966c] ip_rcv+0x32c/0x898
    [ 892.129709] [effa7e10] [c048b998] __netif_receive_skb+0x27c/0x4e8
    [ 892.129715] [effa7e80] [c048d744] netif_receive_skb+0x4c/0x13c
    [ 892.129726] [effa7eb0] [c03c28ac] _dpa_rx+0x1a8/0x354
    [ 892.129732] [effa7ef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
    [ 892.129742] [effa7f10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
    [ 892.129748] [effa7f40] [c03c153c] dpaa_eth_poll+0x20/0x94
    [ 892.129754] [effa7f60] [c048dbd0] net_rx_action+0x13c/0x1f4
    [ 892.129763] [effa7fa0] [c003d1b8] __do_softirq+0x108/0x1b0
    [ 892.129769] [effa7ff0] [c000df58] call_do_softirq+0x14/0x24
    [ 892.129775] [ebacfe70] [c0004868] do_softirq+0xd8/0x104
    [ 892.129780] [ebacfe90] [c003d5a4] irq_exit+0xb8/0xd8
    [ 892.129786] [ebacfea0] [c0004498] do_IRQ+0xa4/0x1b0
    [ 892.129792] [ebacfed0] [c000fad8] ret_from_except+0x0/0x18
    [ 892.129798] [ebacff90] [c0009010] cpu_idle+0x94/0xf0
    [ 892.129804] [ebacffb0] [c059ff88] start_secondary+0x42c/0x430
    [ 892.129809] [ebacfff0] [c0001e28] __secondary_start+0x30/0x84
    [ 892.281474]
    [ 892.282959] [eff9fd00] [c0509724] esp_input+0x178/0x334
    [ 892.288186] [eff9fd50] [c0519778] xfrm_input+0x77c/0x818
    [ 892.293499] [eff9fda0] [c050e344] xfrm4_rcv_encap+0x20/0x30
    [ 892.299074] [eff9fdb0] [c04b90c8] ip_local_deliver+0x190/0x408
    [ 892.304907] [eff9fde0] [c04b966c] ip_rcv+0x32c/0x898
    [ 892.309872] [eff9fe10] [c048b998] __netif_receive_skb+0x27c/0x4e8
    [ 892.315966] [eff9fe80] [c048d744] netif_receive_skb+0x4c/0x13c
    [ 892.321803] [eff9feb0] [c03c28ac] _dpa_rx+0x1a8/0x354
    [ 892.326855] [eff9fef0] [c03c2ac4] ingress_rx_default_dqrr+0x6c/0x108
    [ 892.333212] [eff9ff10] [c0467ae0] qman_poll_dqrr+0x170/0x1d4
    [ 892.338872] [eff9ff40] [c03c153c] dpaa_eth_poll+0x20/0x94
    [ 892.344271] [eff9ff60] [c048dbd0] net_rx_action+0x13c/0x1f4
    [ 892.349846] [eff9ffa0] [c003d1b8] __do_softirq+0x108/0x1b0
    [ 892.355338] [eff9fff0] [c000df58] call_do_softirq+0x14/0x24
    [ 892.360910] [e7169950] [c0004868] do_softirq+0xd8/0x104
    [ 892.366135] [e7169970] [c003d5a4] irq_exit+0xb8/0xd8
    [ 892.371101] [e7169980] [c0004498] do_IRQ+0xa4/0x1b0
    [ 892.375979] [e71699b0] [c000fad8] ret_from_except+0x0/0x18
    [ 892.381466] [e7169a70] [c0445e74] caam_jr_enqueue+0xf8/0x250
    [ 892.387127] [e7169ab0] [c044ad4c] aead_givencrypt+0x6ac/0xa70
    [ 892.392873] [e7169b20] [c050a0b8] esp_output+0x2b4/0x570
    [ 892.398186] [e7169b80] [c0519b9c] xfrm_output_resume+0x248/0x7c0
    [ 892.404194] [e7169bb0] [c050e89c] xfrm4_output_finish+0x18/0x28
    [ 892.410113] [e7169bc0] [c050e8f4] xfrm4_output+0x48/0x98
    [ 892.415427] [e7169bd0] [c04beac0] ip_local_out+0x48/0x98
    [ 892.420740] [e7169be0] [c04bec7c] ip_queue_xmit+0x16c/0x490
    [ 892.426314] [e7169c10] [c04d6128] tcp_transmit_skb+0x35c/0x9a4
    [ 892.432147] [e7169c70] [c04d6f98] tcp_write_xmit+0x200/0xa04
    [ 892.437808] [e7169cc0] [c04c8ccc] tcp_sendmsg+0x994/0xcec
    [ 892.443213] [e7169d40] [c04eebfc] inet_sendmsg+0xd0/0x164
    [ 892.448617] [e7169d70] [c04792f8] sock_sendmsg+0x8c/0xbc
    [ 892.453931] [e7169e40] [c047aecc] sys_sendto+0xc0/0xfc
    [ 892.459069] [e7169f10] [c047b934] sys_socketcall+0x110/0x25c
    [ 892.464729] [e7169f40] [c000f480] ret_from_syscall+0x0/0x3c

    (b) since the caam_jr_dequeue lock is only used in bh context,
    then semantically it should use _bh spin_lock types. spin_lock_bh
    semantics are to disable back-halves, and used when a lock is shared
    between softirq (bh) context and process and/or h/w IRQ context.
    Since the lock is only used within softirq context, and this tasklet
    is atomic, there is no need to do the additional work to disable
    back halves.

    This patch adds back-half disabling protection to caam_jr_enqueue
    spin_locks to fix (a), and drops it from caam_jr_dequeue to fix (b).

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     

01 Aug, 2012

1 commit

  • Pull random subsystem patches from Ted Ts'o:
    "This patch series contains a major revamp of how we collect entropy
    from interrupts for /dev/random and /dev/urandom.

    The goal is to addresses weaknesses discussed in the paper "Mining
    your Ps and Qs: Detection of Widespread Weak Keys in Network Devices",
    by Nadia Heninger, Zakir Durumeric, Eric Wustrow, J. Alex Halderman,
    which will be published in the Proceedings of the 21st Usenix Security
    Symposium, August 2012. (See https://factorable.net for more
    information and an extended version of the paper.)"

    Fix up trivial conflicts due to nearby changes in
    drivers/{mfd/ab3100-core.c, usb/gadget/omap_udc.c}

    * tag 'random_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/random: (33 commits)
    random: mix in architectural randomness in extract_buf()
    dmi: Feed DMI table to /dev/random driver
    random: Add comment to random_initialize()
    random: final removal of IRQF_SAMPLE_RANDOM
    um: remove IRQF_SAMPLE_RANDOM which is now a no-op
    sparc/ldc: remove IRQF_SAMPLE_RANDOM which is now a no-op
    [ARM] pxa: remove IRQF_SAMPLE_RANDOM which is now a no-op
    board-palmz71: remove IRQF_SAMPLE_RANDOM which is now a no-op
    isp1301_omap: remove IRQF_SAMPLE_RANDOM which is now a no-op
    pxa25x_udc: remove IRQF_SAMPLE_RANDOM which is now a no-op
    omap_udc: remove IRQF_SAMPLE_RANDOM which is now a no-op
    goku_udc: remove IRQF_SAMPLE_RANDOM which was commented out
    uartlite: remove IRQF_SAMPLE_RANDOM which is now a no-op
    drivers: hv: remove IRQF_SAMPLE_RANDOM which is now a no-op
    xen-blkfront: remove IRQF_SAMPLE_RANDOM which is now a no-op
    n2_crypto: remove IRQF_SAMPLE_RANDOM which is now a no-op
    pda_power: remove IRQF_SAMPLE_RANDOM which is now a no-op
    i2c-pmcmsp: remove IRQF_SAMPLE_RANDOM which is now a no-op
    input/serio/hp_sdc.c: remove IRQF_SAMPLE_RANDOM which is now a no-op
    mfd: remove IRQF_SAMPLE_RANDOM which is now a no-op
    ...

    Linus Torvalds
     

30 Jul, 2012

1 commit


27 Jul, 2012

2 commits

  • Pull ARM SoC fixes from Olof Johansson:
    "A mixed bag of fixes, some for merge window fallout (tegra, MXS), and
    a short series of fixes for marvell platforms that didn't make it in
    before 3.5."

    * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
    ARM: mxs: fix compile error caused by prom_update_property change
    ARM: dt: tegra trimslice: enable USB2 port
    ARM: dt: tegra trimslice: add vbus-gpio property
    ARM: vt8500: Add maintainer for VT8500 architecture
    ARM: Kirkwood: Replace mrvl with marvell
    ARM: Orion: fix driver probe error handling with respect to clk
    ARM: Dove: Fixup ge00 initialisation
    ARM: Kirkwood: Fix PHY disable clk problems
    ARM: Kirkwood: Ensure runit clock always ticks.
    ARM: versatile: Don't use platform clock for Integrator & VE
    ARM: tegra: harmony: add regulator supply name and its input supply

    Linus Torvalds
     
  • Pull crypto updates from Herbert Xu:

    - Fixed algorithm construction hang when self-test fails.
    - Added SHA variants to talitos AEAD list.
    - New driver for Exynos random number generator.
    - Performance enhancements for arc4.
    - Added hwrng support to caam.
    - Added ahash support to caam.
    - Fixed bad kfree in aesni-intel.
    - Allow aesni-intel in FIPS mode.
    - Added atmel driver with support for AES/3DES/SHA.
    - Bug fixes for mv_cesa.
    - CRC hardware driver for BF60x family processors.

    * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (66 commits)
    crypto: twofish-avx - remove useless instruction
    crypto: testmgr - add aead cbc aes hmac sha1,256,512 test vectors
    crypto: talitos - add sha224, sha384 and sha512 to existing AEAD algorithms
    crypto: talitos - export the talitos_submit function
    crypto: talitos - move talitos structures to header file
    crypto: atmel - add new tests to tcrypt
    crypto: atmel - add Atmel SHA1/SHA256 driver
    crypto: atmel - add Atmel DES/TDES driver
    crypto: atmel - add Atmel AES driver
    ARM: AT91SAM9G45: add crypto peripherals
    crypto: testmgr - allow aesni-intel and ghash_clmulni-intel in fips mode
    hwrng: exynos - Add support for Exynos random number generator
    crypto: aesni-intel - fix wrong kfree pointer
    crypto: caam - ERA retrieval and printing for SEC device
    crypto: caam - Using alloc_coherent for caam job rings
    crypto: algapi - Fix hang on crypto allocation
    crypto: arc4 - now arc needs blockcipher support
    crypto: caam - one tasklet per job ring
    crypto: caam - consolidate memory barriers from job ring en/dequeue
    crypto: caam - only query h/w in job ring dequeue path
    ...

    Linus Torvalds
     

26 Jul, 2012

1 commit


25 Jul, 2012

1 commit


24 Jul, 2012

1 commit

  • Pull arm-soc clk changes from Arnd Bergmann:
    "Clock support is moving to the clk subsystem. These tegra, omap and
    imx changes are for code that is still platform specific and not (yet)
    part of that subsystem."

    Fix up conflicts in arch/arm/mach-{imx/clk-imx51-imx53.c,omap2/Makefile}

    * tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
    ARM: imx: clk-imx31: Fix clock id for rnga driver
    ARM: imx: add missing item to the list of clock event modes
    ARM: i.MX5x CSPI: Fixed clock name for CSPI
    ARM: i.MX5x clocks: Fix GPT clocks
    ARM: i.MX5x clocks: Fix parent for PWM clocks
    ARM: i.MX5x clocks: Add EPIT support
    ARM: mx27: Reenable silicon version print
    ARM: clk-imx27: Fix rtc clock id
    ARM: tegra: Provide clock for only one PWM controller
    ARM: tegra: Fix PWM clock programming
    ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
    ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
    ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
    ARM: tegra: Remove second instance of uart clk
    crypto: add clk_prepare/clk_unprepare
    ASoC: tegra: add clk_prepare/clk_unprepare
    staging: nvec: add clk_prepare/clk_unprepare
    spi/tegra: add clk_prepare/clk_unprepare
    Input: tegra-kbc - add clk_prepare/clk_unprepare
    USB: ehci-tegra: add clk_prepare/clk_unprepare
    ...

    Linus Torvalds
     

19 Jul, 2012

1 commit

  • With the changes in the random tree, IRQF_SAMPLE_RANDOM is now a
    no-op; interrupt randomness is now collected unconditionally in a very
    low-overhead fashion; see commit 775f4b297b. The IRQF_SAMPLE_RANDOM
    flag was scheduled to be removed in 2009 on the
    feature-removal-schedule, so this patch is preparation for the final
    removal of this flag.

    Signed-off-by: "Theodore Ts'o"
    Acked-by: Herbert Xu

    Theodore Ts'o
     

11 Jul, 2012

9 commits

  • With this, now all combinations of
    CBC: AES, 3DES-EDE
    with
    HMAC: SHA-1, SHA-224, SHA-256, SHA-384, SHA-512
    are supported.

    Signed-off-by: Horia Geanta
    Signed-off-by: Herbert Xu

    Horia Geanta
     
  • This patch exports the talitos_submit function so that on
    need basis same can be used by other entities.

    Signed-off-by: Sandeep Malik
    Signed-off-by: Kim Phillips
    Signed-off-by: Horia Geanta
    Signed-off-by: Herbert Xu

    Horia Geanta
     
  • This patch moves the talitos structure definitions from c file to its
    header file so that the same can be shared on need basis.

    Signed-off-by: Sandeep Malik
    Signed-off-by: Kim Phillips
    Signed-off-by: Horia Geanta
    Signed-off-by: Herbert Xu

    Horia Geanta
     
  • Signed-off-by: Nicolas Royer
    Acked-by: Nicolas Ferre
    Acked-by: Eric Bénard
    Tested-by: Eric Bénard
    Signed-off-by: Herbert Xu

    Nicolas Royer
     
  • Signed-off-by: Nicolas Royer
    Acked-by: Nicolas Ferre
    Acked-by: Eric Bénard
    Tested-by: Eric Bénard
    Signed-off-by: Herbert Xu

    Nicolas Royer
     
  • Signed-off-by: Nicolas Royer
    Acked-by: Nicolas Ferre
    Acked-by: Eric Bénard
    Tested-by: Eric Bénard
    Signed-off-by: Herbert Xu

    Nicolas Royer
     
  • This patch adds support for retrieving and printing of
    SEC ERA information. It is useful for knowing beforehand
    what features exist from the SEC point of view on a
    certain SoC. Only era-s 1 to 4 are currently supported;
    other eras will appear as unknown.

    Signed-off-by: Alex Porosanu

    - rebased onto current cryptodev master
    - made caam_eras static

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Alex Porosanu
     
  • The caam job rings (input/output job ring) are allocated using
    dma_map_single(). These job rings can be visualized as the ring
    buffers in which the jobs are en-queued/de-queued. The s/w enqueues
    the jobs in input job ring which h/w dequeues and after processing
    it copies the jobs in output job ring. Software then de-queues the
    job from output ring. Using dma_map/unmap_single() is not preferred
    way to allocate memory for this type of requirements because this
    adds un-necessary complexity.

    Example, if bounce buffer (SWIOTLB) will get used then to make any
    change visible in this memory to other processing unit requires
    dmap_unmap_single() or dma_sync_single_for_cpu/device(). The
    dma_unmap_single() can not be used as this will free the bounce
    buffer, this will require changing the job rings on running system
    and I seriously doubt that it will be not possible or very complex
    to implement. Also using dma_sync_single_for_cpu/device() will also
    add unnecessary complexity.

    The simple and preferred way is using dma_alloc_coherent() for these
    type of memory requirements.

    This resolves the Linux boot crash issue when "swiotlb=force" is set
    in bootargs on systems which have memory more than 4G.

    Signed-off-by: Bharat Bhushan
    Acked-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Bharat Bhushan
     
  • Make the ux500 crypto driver define its PM callbacks through
    struct dev_pm_ops objects rather than by using legacy PM hooks
    in struct platform_driver.

    Signed-off-by: Rafael J. Wysocki
    Acked-by: Linus Walleij

    Rafael J. Wysocki
     

27 Jun, 2012

15 commits

  • there is no noticeable benefit for multiple cores to process one
    job ring's output ring: in fact, we can benefit from cache effects
    of having the back-half stay on the core that receives a particular
    ring's interrupts, and further relax general contention and the
    locking involved with reading outring_used, since tasklets run
    atomically.

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • Memory barriers are implied by the i/o register write implementation
    (at least on Power). So we can remove the redundant wmb() in
    caam_jr_enqueue, and, in dequeue(), hoist the h/w done notification
    write up to before we need to increment the head of the ring, and
    save an smp_mb.

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • Code was needlessly checking the s/w job ring when there
    would be nothing to process if the h/w's output completion
    ring were empty anyway.

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • The enqueue lock isn't used in any interrupt context, and
    the dequeue lock isn't used in the h/w interrupt context,
    only in bh context.

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • It has been observed that in zero-loss benchmarks, when a
    slow traffic rate is being tested, the IRQ timer coalescing
    parameter was set too high, and the ethernet controller
    would start dropping packets because the job ring back half
    wouldn't be executed in time before the ethernet controller
    would fill its buffers, thereby significantly reducing the
    zero-loss performance figures.

    Empirical testing has shown that the best zero-loss performance
    is achieved when IRQ coalescing is set to minimum values and/or
    turned off, since apparently the job ring driver already implements
    an adequately-performing general-purpose IRQ mitigation strategy
    in software.

    Whilst we could go with minimal count (2-8) and timing settings
    (192-256), we prefer just turning h/w coalescing altogether off
    to minimize setkey latency (due to split key generation), and
    for consistent cross-SoC performance (the SEC vs. core clock
    ratio changes).

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • The SEC v4.x' RNGB h/w block self-initialized. RNG4, available
    on SEC versions 5 and beyond, is based on a different standard
    that requires manual initialization.

    Also update any new errors From the SEC v5.2 reference manual:
    The SEC v5.2's RNG4 unit reuses some error IDs, thus the addition
    of rng_err_id_list over the CHA-independent err_id_list.

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • SEC v4.x were only 36-bit, SEC v5+ are 40-bit capable.
    Also set a DMA mask for any job ring devices created.

    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Kim Phillips
     
  • caam_read copies random bytes from two buffers into output.

    caam rng can fill empty buffer 0xffff bytes at a time,
    but the buffer sizes are rounded down to multiple of cacheline size.

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • support chained scatterlists for aead, ablkcipher and ahash.

    Signed-off-by: Yuan Kang

    - fix dma unmap leak
    - un-unlikely src == dst, due to experience with AF_ALG

    Signed-off-by: Kudupudi Ugendreshwar
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • caam supports and registers unkeyed sha algorithms and md5.

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • caam supports ahash hmac with sha algorithms and md5.

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • - rename scatterlist and link_tbl functions
    - link_tbl changed to sec4_sg
    - sg_to_link_tbl_one changed to dma_to_sec4_sg_one,
    since no scatterlist is use

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • create separate files for split key generation and scatterlist functions.

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • remove caam_jr_register and caam_jr_deregister
    to allow sharing of job rings.

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang
     
  • functions for external storage of seq in/out lengths,
    i.e., for 32-bit lengths.

    These type-dependent functions automatically determine whether to
    store the length internally (embedded in the command header word) or
    externally (after the address pointer), based on size of the type
    given.

    Signed-off-by: Yuan Kang
    Signed-off-by: Kim Phillips
    Signed-off-by: Herbert Xu

    Yuan Kang