24 Dec, 2011

1 commit

  • Before dma_transfer_direction was introduced to replace
    dma_data_direction, some dmaengine device uses DMA_NONE of
    dma_data_direction for some talk with its client drivers.
    The mxs-dma and its clients mxs-mmc and gpmi-nand are such case.

    This patch adds DMA_TRANS_NONE to dma_transfer_direction and
    migrate the DMA_NONE use in mxs-dma to it.

    It also fixes the compile warning below.

    CC drivers/dma/mxs-dma.o
    drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’:
    drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’

    Signed-off-by: Shawn Guo
    Signed-off-by: Vinod Koul

    Shawn Guo
     

18 Nov, 2011

1 commit

  • Define a new api that could be used for doing fancy data transfers
    like interleaved to contiguous copy and vice-versa.
    Traditional SG_list based transfers tend to be very inefficient in
    such cases as where the interleave and chunk are only a few bytes,
    which call for a very condensed api to convey pattern of the transfer.
    This api supports all 4 variants of scatter-gather and contiguous transfer.

    Of course, neither can this api help transfers that don't lend to DMA by
    nature, i.e, scattered tiny read/writes with no periodic pattern.

    Also since now we support SLAVE channels that might not provide
    device_prep_slave_sg callback but device_prep_interleaved_dma,
    remove the BUG_ON check.

    Signed-off-by: Jassi Brar
    Acked-by: Barry Song
    [renamed dmaxfer_template to dma_interleaved_template
    did fixup after the enum dma_transfer_merge]
    Signed-off-by: Vinod Koul

    Jassi Brar
     

17 Nov, 2011

1 commit


07 Nov, 2011

1 commit

  • * 'modsplit-Oct31_2011' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux: (230 commits)
    Revert "tracing: Include module.h in define_trace.h"
    irq: don't put module.h into irq.h for tracking irqgen modules.
    bluetooth: macroize two small inlines to avoid module.h
    ip_vs.h: fix implicit use of module_get/module_put from module.h
    nf_conntrack.h: fix up fallout from implicit moduleparam.h presence
    include: replace linux/module.h with "struct module" wherever possible
    include: convert various register fcns to macros to avoid include chaining
    crypto.h: remove unused crypto_tfm_alg_modname() inline
    uwb.h: fix implicit use of asm/page.h for PAGE_SIZE
    pm_runtime.h: explicitly requires notifier.h
    linux/dmaengine.h: fix implicit use of bitmap.h and asm/page.h
    miscdevice.h: fix up implicit use of lists and types
    stop_machine.h: fix implicit use of smp.h for smp_processor_id
    of: fix implicit use of errno.h in include/linux/of.h
    of_platform.h: delete needless include
    acpi: remove module.h include from platform/aclinux.h
    miscdevice.h: delete unnecessary inclusion of module.h
    device_cgroup.h: delete needless include
    net: sch_generic remove redundant use of
    net: inet_timewait_sock doesnt need
    ...

    Fix up trivial conflicts (other header files, and removal of the ab3550 mfd driver) in
    - drivers/media/dvb/frontends/dibx000_common.c
    - drivers/media/video/{mt9m111.c,ov6650.c}
    - drivers/mfd/ab3550-core.c
    - include/linux/dmaengine.h

    Linus Torvalds
     

01 Nov, 2011

1 commit

  • The implicit presence of module.h and all its sub-includes was
    masking these implicit header usages:

    include/linux/dmaengine.h:684: warning: 'struct page' declared inside parameter list
    include/linux/dmaengine.h:684: warning: its scope is only this definition or declaration, which is probably not what you want
    include/linux/dmaengine.h:687: warning: 'struct page' declared inside parameter list
    include/linux/dmaengine.h:736:2: error: implicit declaration of function 'bitmap_zero'

    With input from Stephen Rothwell

    Signed-off-by: Paul Gortmaker

    Paul Gortmaker
     

27 Oct, 2011

1 commit

  • This new enum removes usage of dma_data_direction for dma direction. The new
    enum cleans tells the DMA direction and mode
    This further paves way for merging the dmaengine _prep operations and also for
    interleaved dma

    Suggested-by: Jassi Brar
    Reviewed-by: Barry Song
    Signed-off-by: Vinod Koul

    Vinod Koul
     

16 Aug, 2011

1 commit


08 Aug, 2011

1 commit


22 Jun, 2011

1 commit

  • Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).

    To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
    definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
    via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
    Removal of mm.h from scatterlist.h was tried and was found not feasible
    on most archs, so the link was cutoff earlier.

    Hope people are OK with tiny include file.

    Note, that mm_types.h is still dragged in, but it is a separate story.

    Signed-off-by: Alexey Dobriyan
    Signed-off-by: David S. Miller

    Alexey Dobriyan
     

31 Mar, 2011

1 commit


18 Jan, 2011

1 commit

  • * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (63 commits)
    ARM: PL08x: cleanup comments
    Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c
    ARM: PL08x: fix a warning
    Fix dmaengine_submit() return type
    dmaengine: at_hdmac: fix race while monitoring channel status
    dmaengine: at_hdmac: flags located in first descriptor
    dmaengine: at_hdmac: use subsys_initcall instead of module_init
    dmaengine: at_hdmac: no need set ACK in new descriptor
    dmaengine: at_hdmac: trivial add precision to unmapping comment
    dmaengine: at_hdmac: use dma_address to program DMA hardware
    pch_dma: support new device ML7213 IOH
    ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels
    ARM: PL08x: allow dma_set_runtime_config() to return errors
    ARM: PL08x: fix locking between prepare function and submit function
    ARM: PL08x: introduce 'phychan_hold' to hold on to physical channels
    ARM: PL08x: put txd's on the pending list in pl08x_tx_submit()
    ARM: PL08x: rename 'desc_list' as 'pend_list'
    ARM: PL08x: implement unmapping of memcpy buffers
    ARM: PL08x: store prep_* flags in async_tx structure
    ARM: PL08x: shrink srcbus/dstbus in txd structure
    ...

    Linus Torvalds
     

15 Jan, 2011

1 commit


03 Jan, 2011

1 commit


08 Oct, 2010

4 commits

  • The majority of drivers in drivers/dma/ will never establish cross
    channel operation chains and do not need the extra overhead in struct
    dma_async_tx_descriptor. Make channel switching opt-in by default.

    Cc: Anatolij Gustschin
    Cc: Ira Snyder
    Cc: Linus Walleij
    Cc: Saeed Bishara
    Signed-off-by: Dan Williams

    Dan Williams
     
  • Dan Williams
     
  • Now that the generic DMAEngine API has support for scatterlist to
    scatterlist copying, the device_prep_slave_sg() portion of the
    DMA_SLAVE API is no longer necessary and has been removed.

    However, the device_control() portion of the DMA_SLAVE API is still
    useful to control device specific parameters, such as externally
    controlled DMA transfers and maximum burst length.

    A special dma_ctrl_cmd has been added to enable externally controlled
    DMA transfers. This is currently specific to the Freescale DMA
    controller, but can easily be made generic when another user is found.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Dan Williams

    Ira Snyder
     
  • This adds support for scatterlist to scatterlist DMA transfers. A
    similar interface is exposed by the fsldma driver (through the DMA_SLAVE
    API) and by the ste_dma40 driver (through an exported function).

    This patch paves the way for making this type of copy operation a part
    of the generic DMAEngine API. Futher patches will add support in
    individual drivers.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Dan Williams

    Ira Snyder
     

06 Oct, 2010

2 commits

  • Add wrapper functions around the dma_device->device_control function
    to bring back type safety. Also, add a wrapper function around
    dma_async_tx_descriptor->tx_submit. This is named dmaengine_submit
    instead of dmaengine_tx_submit to get rid of the confusing 'tx' in the
    function name

    Signed-off-by: Sascha Hauer
    Signed-off-by: Dan Williams

    Sascha Hauer
     
  • Cyclic transfers are useful for audio where a single buffer divided
    in periods has to be transfered endlessly until stopped. After being
    prepared the transfer is started using the dma_async_descriptor->tx_submit
    function. dma_async_descriptor->callback is called after each period.
    The transfer is stopped using the DMA_TERMINATE_ALL callback.
    While being used for cyclic transfers the channel cannot be used
    for other transfer types.

    Signed-off-by: Sascha Hauer
    Cc: Haavard Skinnemoen
    Signed-off-by: Dan Williams

    Sascha Hauer
     

23 Sep, 2010

1 commit


05 Aug, 2010

1 commit

  • This adds an interface to the DMAengine to make it possible to
    reconfigure a slave channel at runtime. We add a few foreseen
    config parameters to the passed struct, with a void * pointer
    for custom per-device or per-platform runtime slave data.

    Signed-off-by: Linus Walleij
    Signed-off-by: Dan Williams

    Linus Walleij
     

18 May, 2010

3 commits


27 Mar, 2010

3 commits

  • Simple conditional struct filler to cut out some duplicated code.

    Signed-off-by: Dan Williams

    Dan Williams
     
  • Convert the device_is_tx_complete() operation on the
    DMA engine to a generic device_tx_status()operation which
    can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE,
    DMA_TX_PAUSED.

    [dan.j.williams@intel.com: update for timberdale]
    Signed-off-by: Linus Walleij
    Acked-by: Mark Brown
    Cc: Maciej Sosnowski
    Cc: Nicolas Ferre
    Cc: Pavel Machek
    Cc: Li Yang
    Cc: Guennadi Liakhovetski
    Cc: Paul Mundt
    Cc: Ralf Baechle
    Cc: Haavard Skinnemoen
    Cc: Magnus Damm
    Cc: Liam Girdwood
    Cc: Joe Perches
    Cc: Roland Dreier
    Signed-off-by: Dan Williams

    Linus Walleij
     
  • Convert the device_terminate_all() operation on the
    DMA engine to a generic device_control() operation
    which can now optionally support also pausing and
    resuming DMA on a certain channel. Implemented for the
    COH 901 318 DMAC as an example.

    [dan.j.williams@intel.com: update for timberdale]
    Signed-off-by: Linus Walleij
    Acked-by: Mark Brown
    Cc: Maciej Sosnowski
    Cc: Nicolas Ferre
    Cc: Pavel Machek
    Cc: Li Yang
    Cc: Guennadi Liakhovetski
    Cc: Paul Mundt
    Cc: Ralf Baechle
    Cc: Haavard Skinnemoen
    Cc: Magnus Damm
    Cc: Liam Girdwood
    Cc: Joe Perches
    Cc: Roland Dreier
    Signed-off-by: Dan Williams

    Linus Walleij
     

05 Mar, 2010

1 commit

  • * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (28 commits)
    ioat: cleanup ->timer_fn() and ->cleanup_fn() prototypes
    ioat3: interrupt coalescing
    ioat: close potential BUG_ON race in the descriptor cleanup path
    ioat2: kill pending flag
    ioat3: use ioat2_quiesce()
    ioat3: cleanup, don't enable DCA completion writes
    DMAENGINE: COH 901 318 lli sg offset fix
    DMAENGINE: COH 901 318 configure channel direction
    DMAENGINE: COH 901 318 remove irq counting
    DMAENGINE: COH 901 318 descriptor pool refactoring
    DMAENGINE: COH 901 318 cleanups
    dma: Add MPC512x DMA driver
    Debugging options for the DMA engine subsystem
    iop-adma: redundant/wrong tests in iop_*_count()?
    dmatest: fix handling of an even number of xor_sources
    dmatest: correct raid6 PQ test
    fsldma: Fix cookie issues
    fsldma: Fix cookie issues
    dma: cases IPU_PIX_FMT_BGRA32, BGR32 and ABGR32 are the same in ipu_ch_param_set_size()
    dma: make Open Firmware device id constant
    ...

    Linus Torvalds
     

01 Mar, 2010

1 commit

  • fsl_dma_update_completed_cookie() appears to calculate the last completed
    cookie incorrectly in the corner case where DMA on cookie 1 is in progress
    just following a cookie wrap.

    Signed-off-by: Steven J. Magnani
    Acked-by: Ira W. Snyder
    [dan.j.williams@intel.com: fix an integer overflow warning with INT_MAX]
    Signed-off-by: Dan Williams

    Steven J. Magnani
     

17 Feb, 2010

1 commit

  • Add __percpu sparse annotations to places which didn't make it in one
    of the previous patches. All converions are trivial.

    These annotations are to make sparse consider percpu variables to be
    in a different address space and warn if accessed without going
    through percpu accessors. This patch doesn't affect normal builds.

    Signed-off-by: Tejun Heo
    Acked-by: Borislav Petkov
    Cc: Dan Williams
    Cc: Huang Ying
    Cc: Len Brown
    Cc: Neil Brown

    Tejun Heo
     

11 Dec, 2009

1 commit


09 Sep, 2009

7 commits

  • Conflicts:
    crypto/async_tx/async_xor.c
    drivers/dma/ioat/dma_v2.h
    drivers/dma/ioat/pci.c
    drivers/md/raid5.c

    Dan Williams
     
  • The tx_list attribute of struct dma_async_tx_descriptor is common to
    most, but not all dma driver implementations. None of the upper level
    code (dmaengine/async_tx) uses it, so allow drivers to implement it
    locally if they need it. This saves sizeof(struct list_head) bytes for
    drivers that do not manage descriptors with a linked list (e.g.: ioatdma
    v2,3).

    Signed-off-by: Dan Williams

    Dan Williams
     
  • Some engines have transfer size and address alignment restrictions. Add
    a per-operation alignment property to struct dma_device that the async
    routines and dmatest can use to check alignment capabilities.

    Signed-off-by: Dan Williams

    Dan Williams
     
  • No drivers currently implement these operation types, so they can be
    deleted.

    Signed-off-by: Dan Williams

    Dan Williams
     
  • Channel switching is problematic for some dmaengine drivers as the
    architecture precludes separating the ->prep from ->submit. In these
    cases the driver can select ASYNC_TX_DISABLE_CHANNEL_SWITCH to modify
    the async_tx allocator to only return channels that support all of the
    required asynchronous operations.

    For example MD_RAID456=y selects support for asynchronous xor, xor
    validate, pq, pq validate, and memcpy. When
    ASYNC_TX_DISABLE_CHANNEL_SWITCH=y any channel with all these
    capabilities is marked DMA_ASYNC_TX allowing async_tx_find_channel() to
    quickly locate compatible channels with the guarantee that dependency
    chains will remain on one channel. When
    ASYNC_TX_DISABLE_CHANNEL_SWITCH=n async_tx_find_channel() may select
    channels that lead to operation chains that need to cross channel
    boundaries using the async_tx channel switch capability.

    Signed-off-by: Dan Williams

    Dan Williams
     
  • Some engines optimize operation by reading ahead in the descriptor chain
    such that descriptor2 may start execution before descriptor1 completes.
    If descriptor2 depends on the result from descriptor1 then a fence is
    required (on descriptor2) to disable this optimization. The async_tx
    api could implicitly identify dependencies via the 'depend_tx'
    parameter, but that would constrain cases where the dependency chain
    only specifies a completion order rather than a data dependency. So,
    provide an ASYNC_TX_FENCE to explicitly identify data dependencies.

    Signed-off-by: Dan Williams

    Dan Williams
     
  • Conflicts:
    include/linux/dmaengine.h

    Dan Williams
     

30 Aug, 2009

2 commits

  • [ Based on an original patch by Yuri Tikhonov ]

    This adds support for doing asynchronous GF multiplication by adding
    two additional functions to the async_tx API:

    async_gen_syndrome() does simultaneous XOR and Galois field
    multiplication of sources.

    async_syndrome_val() validates the given source buffers against known P
    and Q values.

    When a request is made to run async_pq against more than the hardware
    maximum number of supported sources we need to reuse the previous
    generated P and Q values as sources into the next operation. Care must
    be taken to remove Q from P' and P from Q'. For example to perform a 5
    source pq op with hardware that only supports 4 sources at a time the
    following approach is taken:

    p, q = PQ(src0, src1, src2, src3, COEF({01}, {02}, {04}, {08}))
    p', q' = PQ(p, q, q, src4, COEF({00}, {01}, {00}, {10}))

    p' = p + q + q + src4 = p + src4
    q' = {00}*p + {01}*q + {00}*q + {10}*src4 = q + {10}*src4

    Note: 4 is the minimum acceptable maxpq otherwise we punt to
    synchronous-software path.

    The DMA_PREP_CONTINUE flag indicates to the driver to reuse p and q as
    sources (in the above manner) and fill the remaining slots up to maxpq
    with the new sources/coefficients.

    Note1: Some devices have native support for P+Q continuation and can skip
    this extra work. Devices with this capability can advertise it with
    dma_set_maxpq. It is up to each driver how to handle the
    DMA_PREP_CONTINUE flag.

    Note2: The api supports disabling the generation of P when generating Q,
    this is ignored by the synchronous path but is implemented by some dma
    devices to save unnecessary writes. In this case the continuation
    algorithm is simplified to only reuse Q as a source.

    Cc: H. Peter Anvin
    Cc: David Woodhouse
    Signed-off-by: Yuri Tikhonov
    Signed-off-by: Ilya Yanok
    Reviewed-by: Andre Noll
    Acked-by: Maciej Sosnowski
    Signed-off-by: Dan Williams

    Dan Williams
     
  • Replace the flat zero_sum_result with a collection of flags to contain
    the P (xor) zero-sum result, and the soon to be utilized Q (raid6 reed
    solomon syndrome) zero-sum result. Use the SUM_CHECK_ namespace instead
    of DMA_ since these flags will be used on non-dma-zero-sum enabled
    platforms.

    Reviewed-by: Andre Noll
    Acked-by: Maciej Sosnowski
    Signed-off-by: Dan Williams

    Dan Williams