07 Jan, 2006

1 commit


21 Nov, 2005

1 commit


31 Oct, 2005

2 commits

  • After staring at mpparse.c for a little longer I noticed that when we hit
    our limit of num_processors we are filtering out information about other
    processors that we can still store.

    This patch just reorders the code so we store everything we can.

    This should avoid the incorrect warning about our boot CPU not being listed
    by the BIOS that we are now getting in the kexec on panic case, and it
    should allow us to detect all apicid conflicts even when our physical
    number of cpus exceeds maxcpus.

    Signed-off-by: Eric W. Biederman
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Eric W. Biederman
     
  • The patch allows physical bring-up of new processors (not initially present
    in the configuration) from facilities such as driver/utility implemented on
    a platform. The actual method of making processors available is up to the
    platform implementation.

    Signed-off-by: Natalie Protasevich
    Cc: Shaohua Li
    Cc: Ashok Raj
    Cc: Zwane Mwaikambo
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Natalie Protasevich
     

27 Sep, 2005

1 commit

  • Most of these guys are simply not needed (pulled by other stuff
    via asm-i386/hardirq.h). One that is not entirely useless is hilarious -
    arch/i386/oprofile/nmi_timer_int.c includes linux/irq.h... as a way to
    get linux/errno.h

    Signed-off-by: Al Viro
    Signed-off-by: Linus Torvalds

    Al Viro
     

10 Sep, 2005

1 commit

  • Remove the weird and apparently unnecessary logic in MP_processor_info() which
    assumes that the BSP is the first one to run MP_processor_info(). On one of
    my boxes that isn't true and cpu_possible_map gets the wrong value.

    Cc: Zwane Mwaikambo
    Cc: Alexander Nyberg
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Andrew Morton
     

08 Sep, 2005

1 commit


05 Sep, 2005

2 commits

  • for_each_cpu walks through all processors in cpu_possible_map, which is
    defined as cpu_callout_map on i386 and isn't initialised until all
    processors have been booted. This breaks things which do for_each_cpu
    iterations early during boot. So, define cpu_possible_map as a bitmap with
    NR_CPUS bits populated. This was triggered by a patch i'm working on which
    does alloc_percpu before bringing up secondary processors.

    From: Alexander Nyberg

    i386-boottime-for_each_cpu-broken.patch
    i386-boottime-for_each_cpu-broken-fix.patch

    The SMP version of __alloc_percpu checks the cpu_possible_map before
    allocating memory for a certain cpu. With the above patches the BSP cpuid
    is never set in cpu_possible_map which breaks CONFIG_SMP on uniprocessor
    machines (as soon as someone tries to dereference something allocated via
    __alloc_percpu, which in fact is never allocated since the cpu is not set
    in cpu_possible_map).

    Signed-off-by: Zwane Mwaikambo
    Signed-off-by: Alexander Nyberg
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Zwane Mwaikambo
     
  • i386 generic subarchitecture requires explicit dmi strings or command line
    to enable bigsmp mode. The patch below removes that restriction, and uses
    bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and
    xAPIC support.

    Signed-off-by: Venkatesh Pallipadi
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Venkatesh Pallipadi
     

25 Aug, 2005

3 commits


30 Jul, 2005

1 commit

  • The patch addresses a problem with ACPI SCI interrupt entry, which gets
    re-used, and the IRQ is assigned to another unrelated device. The patch
    corrects the code such that SCI IRQ is skipped and duplicate entry is
    avoided. Second issue came up with VIA chipset, the problem was caused by
    original patch assigning IRQs starting 16 and up. The VIA chipset uses
    4-bit IRQ register for internal interrupt routing, and therefore cannot
    handle IRQ numbers assigned to its devices. The patch corrects this
    problem by allowing PCI IRQs below 16.

    Signed-off by: Natalie Protasevich

    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Natalie.Protasevich@unisys.com
     

26 Jun, 2005

1 commit

  • There are currently two different boot_cpu_logical_apicid variables:
    - a global one in mpparse.c
    - a static one in smpboot.c

    Of these two, only the one in smpboot.c might be used (through
    boot_cpu_apicid).

    This patch therefore removes the one in mpparse.c .

    Signed-off-by: Adrian Bunk
    Signed-off-by: Andrey Panin
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Adrian Bunk
     

24 Jun, 2005

2 commits

  • I have submitted the patch for x86_64, this is submission for i386.

    The patch changes the way IRQs are handed out to PCI devices. Currently,
    each I/O APIC pin gets associated with an IRQ, no matter if the pin is used
    or not. This imposes severe limitation on systems that have designs that
    employ many I/O APICs, only utilizing couple lines of each, such as P64H2
    chipset. It is used in ES7000, and currently, there is no way to boot the
    system with more that 9 I/O APICs.

    The simple change below allows to boot a system with say 64 (or more) I/O
    APICs, each providing 1 slot, which otherwise impossible because of the IRQ
    gaps created for unused lines on each I/O APIC. It does not resolve the
    problem with number of devices that exceeds number of possible IRQs, but
    eases up a tension for IRQs on any large system with potentually large
    number of devices.

    Signed-off-by: Natalie Protasevich
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Natalie Protasevich
     
  • This patch is per Andi's request to remove NO_IOAPIC_CHECK from genapic and
    use heuristics to prevent unique I/O APIC ID check for systems that don't
    need it. The patch disables unique I/O APIC ID check for Xeon-based and
    other platforms that don't use serial APIC bus for interrupt delivery.
    Andi stated that AMD systems don't need unique IO_APIC_IDs either.

    Signed-off-by: Natalie Protasevich
    Cc: Andi Kleen
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Natalie Protasevich
     

17 Apr, 2005

1 commit

  • Initial git repository build. I'm not bothering with the full history,
    even though we have it. We can create a separate "historical" git
    archive of that later if we want to, and in the meantime it's about
    3.2GB when imported into git - space that would just make the early
    git days unnecessarily complicated, when we don't have a lot of good
    infrastructure for it.

    Let it rip!

    Linus Torvalds