Doug / smarc-fsl-linux-kernel

08 Jul, 2011

1 commit

  • 659fb32d1   genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd) ... Browse Code »

    This fixes a regression introduced by e59347a "arm: orion:
    Use generic irq chip".

    Depending on the device, interrupts acknowledgement is done by setting
    or by clearing a dedicated register. Replace irq_gc_ack() with some
    {set,clr}_bit variants allows to handle both cases.

    Note that this patch affects the following SoCs: Davinci, Samsung and
    Orion. Except for this last, the change is minor: irq_gc_ack() is just
    renamed into irq_gc_ack_set_bit().

    For the Orion SoCs, the edge GPIO interrupts support is currently
    broken. irq_gc_ack() try to acknowledge a such interrupt by setting
    the corresponding cause register bit. The Orion GPIO device expect the
    opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

    Tested on Network Space v2.

    Reported-by: Joey Oravec
    Signed-off-by: Simon Guinot
    Signed-off-by: Arnd Bergmann

    Simon Guinot
     

23 Apr, 2011

4 commits

  • cfefd21e6   genirq: Add chip suspend and resume callbacks ... Browse Code »

    These callbacks are only called in the syscore suspend/resume code on
    interrupt chips which have been registered via the generic irq chip
    mechanism. Calling those callbacks per irq would be rather icky, but
    with the generic irq chip mechanism we can call this per registered
    chip.

    Signed-off-by: Thomas Gleixner
    Cc: linux-arm-kernel@lists.infradead.org

    Thomas Gleixner
     
  • 7d8280624   genirq: Implement a generic interrupt chip ... Browse Code »

    Implement a generic interrupt chip, which is configurable and is able
    to handle the most common irq chip implementations.

    Signed-off-by: Thomas Gleixner
    Cc: linux-arm-kernel@lists.infradead.org
    Tested-by: H Hartley Sweeten
    Tested-by: Tony Lindgren
    Tested-by; Kevin Hilman

    Thomas Gleixner
     
  • 7f1b1244e   genirq: Support per-IRQ thread disabling. ... Browse Code »

    This adds support for disabling threading on a per-IRQ basis via the IRQ
    status instead of the IRQ flow, which is necessary for interrupts that
    don't follow the natural IRQ flow channels, such as those that are
    virtually created.

    The new APIs added are simply:

    irq_set_thread()
    irq_set_nothread()

    which follow the rest of the IRQ status routines.

    Chained handlers also have IRQ_NOTHREAD set on them automatically, making
    the lack of threading explicit rather than implicit. Subsequently, the
    nothread flag can be viewed through the standard genirq debugging
    facilities.

    [ tglx: Fixed cleanup fallout ]

    Signed-off-by: Paul Mundt
    Link: http://lkml.kernel.org/r/%3C20110406210135.GF18426%40linux-sh.org%3E
    Signed-off-by: Thomas Gleixner

    Paul Mundt
     
  • 0911f124b   genirq: Forgotten updates/deletions after removal of compat code ... Browse Code »

    commit 0c6f8a8b917ad361319c8ace3e9f28e69bfdb4c1 ("genirq: Remove compat code")
    removed the compat code, but forgot to update some references in comments and
    delete some of its documentation.

    Signed-off-by: Geert Uytterhoeven
    Link: http://lkml.kernel.org/r/%3C1302426113-13808-1-git-send-email-geert%40linux-m68k.org%3E
    Signed-off-by: Thomas Gleixner

    Geert Uytterhoeven
     

30 Mar, 2011

1 commit

29 Mar, 2011

3 commits

28 Mar, 2011

5 commits

27 Mar, 2011

4 commits

26 Mar, 2011

1 commit

  • ab7798ffc   genirq: Expand generic show_interrupts() ... Browse Code »

    Some archs want to print extra information for certain irq_chips which
    is per irq and not per chip. Allow them to provide a chip callback to
    print the chip name and the extra information.

    PowerPC wants to print the LEVEL/EDGE type information. Make it configurable.

    Signed-off-by: Thomas Gleixner

    Thomas Gleixner
     

12 Mar, 2011

1 commit

  • d209a699a   genirq: Add chip flag to force mask on suspend ... Browse Code »

    On suspend we disable all interrupts in the core code, but this does
    not mask the interrupt line in the default implementation as we use a
    lazy disable approach. That means we mark the interrupt disabled, but
    leave the hardware unmasked. That's an optimization because we avoid
    the hardware access for the common case where no interrupt happens
    after we marked it disabled. If an interrupt happens, then the
    interrupt flow handler masks the line at the hardware level and marks
    it pending.

    Suspend makes use of this delayed disable as it "disables" all
    interrupts when preparing the suspend transition. Right before the
    system goes into hardware suspend state it checks whether one of the
    interrupts which is marked as a wakeup interrupt came in after
    disabling it.

    Most interrupt chips have a separate register which selects the
    interrupts which can wake up the system from suspend, so we don't have
    to mask any on the non wakeup interrupts.

    But now we have to deal with brilliant designed hardware which lacks
    such a wakeup configuration facility. For such hardware it's necessary
    to mask all non wakeup interrupts before going into suspend in order
    to avoid the wakeup from random interrupts.

    Rather than working around this in the affected interrupt chip
    implementations we can solve this elegant in the core code itself.

    Add a flag IRQCHIP_MASK_ON_SUSPEND which can be set by the irq chip
    implementation to indicate, that the interrupts which are not selected
    as wakeup sources must be masked in the suspend path. Mask them in the
    loop which checks the wakeup interrupts pending flag.

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Abhijeet Dharmapurikar
    LKML-Reference:

    Thomas Gleixner
     

19 Feb, 2011

20 commits