05 Apr, 2013
2 commits
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Workaround a hardware bug in MSENC during clock enable.
Signed-off-by: Peter De Schrijver
Acked-by: Mike Turquette
Signed-off-by: Stephen Warren -
The parameter name should be "gate", not "periph". This worked, however,
because it happens that everywhere periph_clk_to_bit is called, "gate" was
in the local scope.Signed-off-by: Yen Lin
Signed-off-by: Andrew Chew
Reviewed-by: Thierry Reding
Reviewed-by: Prashant Gaikwad
Acked-by: Peter De Schrijver
Acked-by: Mike Turquette
Signed-off-by: Stephen Warren
29 Jan, 2013
1 commit
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Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super.
Signed-off-by: Prashant Gaikwad
[swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re:
storing pointers to stack variables, make a timeout loop more idiomatic,
use _clk_pll_disable() not clk_disable_pll() from _program_pll() to
avoid redundant lock operations, unified tegra_clk_periph() and
tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock
registration functions so they don't have the same name as the clock
structs, return -EINVAL from clk_plle_enable when matching table rate
not found, pass ops to _tegra_clk_register_pll rather than a bool.]
Acked-by: Mike Turquette
Signed-off-by: Stephen Warren
