25 May, 2011

1 commit


23 May, 2010

1 commit

  • Since 'extern inline' doesn't work correctly in the context of the Linux
    kernel (too many overriding defines), move the string functions to normal
    lib/ assembly files (like the existing mem funcs). This avoids the forced
    inline all over the kernel and allows us to place them constantly in L1.

    This also avoids some module failures when gcc inserts calls to string
    functions but the kernel build system doesn't fully consult the library
    archives.

    Signed-off-by: Robin Getz
    Signed-off-by: Mike Frysinger

    Robin Getz
     

19 Jun, 2009

1 commit


13 Jun, 2009

1 commit


12 Jun, 2009

1 commit

  • Make sure we flush all data caches and their write buffers before flushing
    icache, otherwise random edge cases could crop up where stale data is read
    into icache from external memory. As fallout, punt the combined icache +
    dcache flush function since we cannot safely do them back to back -- the
    SSYNC is needed between the dcache flush and the icache flush.

    Signed-off-by: Mike Frysinger
    Signed-off-by: Bryan Wu

    Mike Frysinger
     

07 Jan, 2009

1 commit


18 Nov, 2008

1 commit


28 Oct, 2008

2 commits


17 May, 2008

1 commit


17 Apr, 2008

1 commit

  • Semaphores are no longer performance-critical, so a generic C
    implementation is better for maintainability, debuggability and
    extensibility. Thanks to Peter Zijlstra for fixing the lockdep
    warning. Thanks to Harvey Harrison for pointing out that the
    unlikely() was unnecessary.

    Signed-off-by: Matthew Wilcox
    Acked-by: Ingo Molnar

    Matthew Wilcox
     

21 Nov, 2007

2 commits


18 Nov, 2007

1 commit

  • The only user is the a.out support.

    It was therefore removed prior to the blackfin merge from all
    architectures not supporting a.out.

    Currently, Blackfin doesn't suppport a.out.

    Signed-off-by: Adrian Bunk
    Signed-off-by: Bryan Wu

    Adrian Bunk
     

17 Nov, 2007

2 commits

  • /*
    * CPUs often take a performance hit when accessing unaligned memory
    * locations. The actual performance hit varies, it can be small if the
    * hardware handles it or large if we have to take an exception and fix
    * it
    * in software.
    *
    * Since an ethernet header is 14 bytes network drivers often end up
    * with
    * the IP header at an unaligned offset. The IP header can be aligned by
    * shifting the start of the packet by 2 bytes. Drivers should do this
    * with:
    *
    * skb_reserve(NET_IP_ALIGN);
    *
    * The downside to this alignment of the IP header is that the DMA is
    * now
    * unaligned. On some architectures the cost of an unaligned DMA is high
    * and this cost outweighs the gains made by aligning the IP header.
    *
    * Since this trade off varies between architectures, we allow
    * NET_IP_ALIGN
    * to be overridden.
    */

    This new function insl_16 allows to read form 32-bit IO and writes to
    16-bit aligned memory. This is useful in above described scenario -
    In particular with the AXIS AX88180 Gigabit Ethernet MAC.
    Once the device is in 32-bit mode, reads from the RX FIFO always
    decrements 4bytes.
    While on the other side the destination address in SDRAM is always
    16-bit aligned.
    If we use skb_reserve(0) the receive buffer is 32-bit aligned but later
    we hit a unaligned exception in the IP code.

    Signed-off-by: Michael Hennerich
    Signed-off-by: Bryan Wu

    Michael Hennerich
     
  • The only user of get_wchan I was able to find is the proc fs - and proc
    can't be built modular.

    Signed-off-by: Adrian Bunk
    Signed-off-by: Bryan Wu

    Adrian Bunk
     

10 Oct, 2007

1 commit


12 Jul, 2007

1 commit


08 May, 2007

1 commit

  • This adds support for the Analog Devices Blackfin processor architecture, and
    currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
    (Dual Core) devices, with a variety of development platforms including those
    avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
    BF561-EZKIT), and Bluetechnix! Tinyboards.

    The Blackfin architecture was jointly developed by Intel and Analog Devices
    Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
    December of 2000. Since then ADI has put this core into its Blackfin
    processor family of devices. The Blackfin core has the advantages of a clean,
    orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
    (Multiply/Accumulate), state-of-the-art signal processing engine and
    single-instruction, multiple-data (SIMD) multimedia capabilities into a single
    instruction-set architecture.

    The Blackfin architecture, including the instruction set, is described by the
    ADSP-BF53x/BF56x Blackfin Processor Programming Reference
    http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

    The Blackfin processor is already supported by major releases of gcc, and
    there are binary and source rpms/tarballs for many architectures at:
    http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
    documentation, including "getting started" guides available at:
    http://docs.blackfin.uclinux.org/ which provides links to the sources and
    patches you will need in order to set up a cross-compiling environment for
    bfin-linux-uclibc

    This patch, as well as the other patches (toolchain, distribution,
    uClibc) are actively supported by Analog Devices Inc, at:
    http://blackfin.uclinux.org/

    We have tested this on LTP, and our test plan (including pass/fails) can
    be found at:
    http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

    [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
    Signed-off-by: Bryan Wu
    Signed-off-by: Mariusz Kozlowski
    Signed-off-by: Aubrey Li
    Signed-off-by: Jie Zhang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bryan Wu