13 Sep, 2005
34 commits
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- Remove unused irqrsp field
- Remove pda->me
- Optimize set_softirq_pending slightlySigned-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This adds console and earlyprintk support for a host file
on AMD's SimNow simulator.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Instead of using a global spinlock to protect the state
of the remote TLB flush use a lock and state for each sending CPU.To tell the receiver where to look for the state use 8 different
call vectors. Each CPU uses a specific vector to trigger flushes on other
CPUs. Depending on the received vector the target CPUs look into
the right per cpu variable for the flush data.When the system has more than 8 CPUs they are hashed to the 8 available
vectors. The limited global vector space forces us to this right now.
In future when interrupts are split into per CPU domains this could be
fixed, at the cost of needing more IPIs in flat mode.Also some minor cleanup in the smp flush code and remove some outdated
debug code.Requires patch to move cpu_possible_map setup earlier.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
If we use 64bit kernel on ia64/x86_64/s390 architecture, and we run
32bit binary on 32bit compatibility mode, sendfile system call seems be
not set offset argument.This is because sendfile's return value is not zero but the code regards
the result by return value is zero or not.This problem will be affect to ia64/x86_64/s390 and not affect to other
architecture does not affect other architecture (mips/parisc/ppc64/sparc64).Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Include build number in oops output
Helps me to match oopses to correct kernel.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Since this is shared code I had to implement it for i386 too
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
The resume code uses CPU hotplug now so at resume time
we only ever see one CPU.Pointed out by Yu Luming.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
The FLATMEM people added it, but there doesn't seem a good reason
because end_pfn is identical.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Avoids a very dumb loop
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Use pcibus_to_node directly
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
It could be wrong for kexec or other cases. Read it from
the CPU instead.Signed-off-by: Murali
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
One machine is constantly throwing NMI watchdog timeouts in mce_log
This was one attempt to fix it.
(AK: this doesn't actually fix the bug I'm seeing unfortunately, probably
drop. I don't like it that the reader can spin forever now waiting
for a writer)Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
It's already handled in the main swiotlb code.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
No-one needs it then
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This leads to bootmem allocating first from node 0 instead
of from the last node. This avoids swiotlb allocating on the last node, which
doesn't really work on a machine with >4GB.Note: there is a better patch around from someone else that gets
rid of the pgdat list completely.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
PCI_DMA_BUS_IS_PHYS has to be zero even when the GART IOMMU is disabled
and the swiotlb is used. Otherwise the block layer does unnecessary
double bouncing.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Originally from Stuart Hayes.
When setting up the APIC for the Uniprocessor kernel don't
assume the CPU has an APIC ID of zero.This fixes boot with the UP kernel on Dell PowerEdge 6800/6850 4way systems.
Cc: Stuart.Hayes@dell.com
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
In particular on systems where the local APIC space and node space
is very different from the Linux CPU number space.Previously the older NUMA setup code directly parsing the K8
northbridge registers had some issues on 8 socket or dual core
systems. This patch fixes them.This is mainly done by fixing some confusion between Linux
CPU numbers and local APIC ids. We now pass the local APIC IDs
to later code, which avoids mismatches.Also add some heuristics to detect cases where the Hypertransport
nodeids and the local APIC IDs don't match, but are shifted
by a constant offset.This is still all quite hackish, hopefully BIOS writers fill
in correct SRATs instead.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Suggested by someone I forgot who sorry.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Signed-off-by: Suresh Sidda
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Do that later when the CPU boots. SRAT just stores the APICNode
mapping node. This fixes problems on systems where the order
of SRAT entries does not match the MADT.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
No functional changes
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
We used to disable them to work around a bug, but that
is not needed anymore. Keeping them enabled avoids the NMI
watchdog triggering in some cases.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Handles case where BIOS gives CPUs very large APIC numbers correctly.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
No x86-64 chipset has these APICs.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This was just needed for the Numasaurus, which fortunately
doesn't support x86-64 CPUs.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
No x86-64 chipset has this bug
Generated code doesn't change because it was always disabled.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
We don't do workarounds for ancient hardware bugs.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Allow diskless booting.
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Now that Greg implemented MCFG/_SEG support this shouldn't be needed
anymoreCc: gregkh@suse.de
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Optimize the deadlock avoidance check on the global cpuset
semaphore cpuset_sem. Instead of adding a depth counter to the
task struct of each task, rather just two words are enough, one
to store the depth and the other the current cpuset_sem holder.Thanks to Nikita Danilov for the idea.
Signed-off-by: Paul Jackson
[ We may want to change this further, but at least it's now
a totally internal decision to the cpusets code ]Signed-off-by: Linus Torvalds
12 Sep, 2005
6 commits
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Remove w1 comments from crc16.h and move specific constants into
w1_ds2433.c where they are used.Replace %d with %zd.
Signed-off-by: Evgeniy Polyakov
Signed-off-by: Linus Torvalds -
..and only enable them for ia64. The functions are only valid
when the whole system has been totally stopped and no scheduler
activity is ongoing on any CPU, and interrupts are globally
disabled.In other words, they aren't useful for anything else. So make
sure that nobody can use them by mistake.Signed-off-by: Linus Torvalds
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Signed-off-by: Roland McGrath
Acked-by: Atsushi Nemoto
Acked-by: Ingo Molnar
Signed-off-by: Linus Torvalds -
ppc64_attention_msg and ppc64_dump_msg are not used so remove them.
Signed-off-by: Anton Blanchard
Signed-off-by: Paul Mackerras -
If the rtas start-cpu token doesnt exist then presume the cpu is already
spinning. If it isnt we will catch it later on when the cpu doesnt
respond.Signed-off-by: Anton Blanchard
Signed-off-by: Paul Mackerras
