13 Jul, 2013
1 commit
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This that should have been fixed but weren't, way to much, intrusive
and late.
02 Jul, 2013
2 commits
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The vpe.c code uses the 'struct module' which is only available if
CONFIG_MODULES is selected.Also fixes the following build problem on a lantiq allmodconfig:
In file included from arch/mips/kernel/vpe.c:41:0:
include/linux/moduleloader.h: In function 'apply_relocate':
include/linux/moduleloader.h:48:63: error: dereferencing pointer
to incomplete type
include/linux/moduleloader.h: In function 'apply_relocate_add':
include/linux/moduleloader.h:70:63: error: dereferencing pointer
to incomplete typeSigned-off-by: Markos Chandras
Reviewed-by: James Hogan
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5562/
Signed-off-by: Ralf Baechle -
Several drivers use the clk_{set,round}_rate() functions
that need to be defined in the platform's clock code.
The Broadcom BCM63xx platform hardcodes the clock rate so
we create new clk_{set,round}_rate() functions
which just return 0 like those in include/linux/clk.h
for the common clock framework do.Also fixes the following build problem on a randconfig:
drivers/built-in.o: In function `nop_usb_xceiv_probe':
phy-nop.c:(.text+0x3ec26c): undefined reference to `clk_set_rate'Signed-off-by: Markos Chandras
Acked-by: Steven J. Hill
Acked-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5580/
Signed-off-by: Ralf Baechle
01 Jul, 2013
37 commits
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The cores used on the SEAD-3 platform do not have L2 caches, so
this option should not be turned on. Originally fixed on public
'linux-mti-3.8' release branch.Signed-off-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5559/
Signed-off-by: Ralf Baechle -
BCM6328 has a OTP which tells us if the second core is available.
Signed-off-by: Jonas Gorski
Cc: linux-mips@linux-mips.org
Cc: John Crispin
Cc: Maxime Bizon
Cc: Florian Fainelli
Cc: Kevin Cernekee
Patchwork: https://patchwork.linux-mips.org/patch/5490/
Signed-off-by: Ralf Baechle -
This involves two changes to the BSP code:
1) register_smp_ops() for BMIPS SMP
2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
the special interrupt vector (IV). Move it to 0x8000_0380 at boot time,
to resolve the conflict.Signed-off-by: Kevin Cernekee
[jogo@openwrt.org: moved SMP ops registration into ifdef guard,
changed ifdef guards to if (IS_ENABLED())]
Signed-off-by: Jonas Gorski
Cc: linux-mips@linux-mips.org
Cc: John Crispin
Cc: Maxime Bizon
Cc: Florian Fainelli
Patchwork: https://patchwork.linux-mips.org/patch/5489/
Signed-off-by: Ralf Baechle -
MIPS does define read{b,w,l,q}_relaxed but does not define their write
counterparts: write{b,w,l,q}_relaxed. This patch adds the missing
definitions for the write*_relaxed I/O accessors.Signed-off-by: Florian Fainelli
Acked-by: John Crispin
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5352/
Signed-off-by: Ralf Baechle -
The GENERIC_PCI_IOMAP does not depend on CONFIG_PCI so move
it to the CONFIG_MIPS symbol so it's always selected for MIPS.
This fixes the missing pci_iomap declaration for MIPS.
Moreover, the pci_iounmap function was not defined in the
io.h header file if the CONFIG_PCI symbol is not set,
but it should since MIPS is not using CONFIG_GENERIC_IOMAP.This fixes the following problem on a allyesconfig:
drivers/net/ethernet/3com/3c59x.c:1031:2: error: implicit declaration of
function 'pci_iomap' [-Werror=implicit-function-declaration]
drivers/net/ethernet/3com/3c59x.c:1044:3: error: implicit declaration of
function 'pci_iounmap' [-Werror=implicit-function-declaration]Signed-off-by: Markos Chandras
Acked-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5478/
Signed-off-by: Ralf Baechle -
Add GCMP detection for IASim Marvell chip emulation support.
Signed-off-by: Leonid Yegoshin
Acked-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Cc: Leonid Yegoshin
Patchwork: https://patchwork.linux-mips.org/patch/5529/
Signed-off-by: Ralf Baechle -
This reverts commit 3f4579252aa166641861a64f1c2883365ca126c2. It is
invalid because the macros CAC_ADDR and UNCAC_ADDR have a kernel
virtual address as an argument and also returns a kernel virtual
address. Using and physical address PHYS_OFFSET is blatantly wrong
for a macro common to multiple platforms.Signed-off-by: Leonid Yegoshin
Acked-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Cc: Florian Fainelli
Patchwork: https://patchwork.linux-mips.org/patch/5528/
Signed-off-by: Ralf Baechle -
Now that KSPD is gone, kspd.h has no reason to be there.
Signed-off-by: Deng-Cheng Zhu
Cc: Steven J. Hill
Cc: linux-mips@linux-mips.org
Cc: kevink@paralogos.com
Cc: macro@linux-mips.org
Cc: john@phrozen.org
Patchwork: https://patchwork.linux-mips.org/patch/5060/
Signed-off-by: Ralf Baechle -
SSB_EMBEDDED needs functions from driver_pcicore which are only
available if SSD_DRIVER_HOSTMODE is selected so make it
depend on that symbol.Fixes the following linking problem:
drivers/ssb/embedded.c:202:
undefined reference to `ssb_pcicore_plat_dev_init'
drivers/built-in.o: In function `ssb_pcibios_map_irq':
drivers/ssb/embedded.c:247:
undefined reference to `ssb_pcicore_pcibios_map_irq'Signed-off-by: Markos Chandras
Acked-by: Steven J. Hill
Cc: sibyte-users@bitmover.com
Cc: netdev@vger.kernel.org
Cc: Michael Buesch
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5484/
Acked-by: Florian Fainelli
Signed-off-by: Ralf Baechle -
The ISA exception bit selects whether exceptions are taken in classic
or microMIPS mode. This bit is Config3.ISAOnExc and was improperly
defined as bits 16 and 17 instead of just bit 16. A new function was
added so that platforms could set this bit when running a kernel
compiled with only microMIPS instructions.Signed-off-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5377/
Signed-off-by: Ralf Baechle -
In mm_isBranchInstr() we can short circuit the entire function if
!cpu_has_mmips.Signed-off-by: David Daney
Acked-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5326/
Signed-off-by: Ralf Baechle -
It is only used from within a single file, it should not be globally
visible.Signed-off-by: David Daney
Acked-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5325/
Signed-off-by: Ralf Baechle -
Signed-off-by: Tony Wu
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5535/
Signed-off-by: Ralf Baechle -
Signed-off-by: Tony Wu
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5536/
Signed-off-by: Ralf Baechle -
BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368,
the bootloader has configured the system to boot from TP1 instead of the
more usual TP0. Create the physical to logical CPU mapping to cope with
that, do not remap the software interrupts to be cross CPUs such that we
do not have to do use the logical CPU mapping further down the code, and
finally, reset the slave TP1 only if booted from TP0.Signed-off-by: Jonas Gorski
Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: cernekee@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/5553/
Patchwork: https://patchwork.linux-mips.org/patch/5556/
Signed-off-by: Ralf Baechle -
As Jonas Gorske said in his patch:
Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of
these platforms are from before the micromips introduction, so they
are very unlikely to implement it.Reduces an -Os compiled, uncompressed kernel image by 8KiB for
BCM63XX.This patch taks a different approach than his, we gate the runtime
test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS.Signed-off-by: David Daney
Cc: Jonas Gorski
Cc: Steven J. Hill
Acked-by: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5327/
Signed-off-by: Ralf Baechle -
There is an infinite loop in gic_set_affinity. When irq_set_affinity
gets called on gic controller, it blocks forever.Signed-off-by: Tony Wu
Cc: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5537/
Signed-off-by: Ralf Baechle -
The ABI allows these to be clobbered on syscalls, so only save and
restore the multiplier state when the temporary registers need to be
preserved.Signed-off-by: David Daney
Cc: linux-mips@linux-mips.org
Cc: David Daney
Patchwork: https://patchwork.linux-mips.org/patch/5540/
Signed-off-by: Ralf Baechle -
Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig
and busybox shell. DHCP & ping works with eth0, eth1 and eth2.The board type "UBNT_E100" is taken from the sources of the vendor kernel
shipped with the product.Signed-off-by: Aaro Koskinen
Acked-by: David Daney
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5546/
Signed-off-by: Ralf Baechle -
Prepare of a next patch which will call tlbmiss_handler_setup_pgd on
microMIPS. MicroMIPS complains if the called code s not in the .text
section. To fix this we generate code into space reserved in
arch/mips/mm/tlb-funcs.SWhile there, move the rest of the generated functions (handle_tlbl,
handle_tlbs, handle_tlbm) to the same file.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5542/
Signed-off-by: Ralf Baechle -
MIPS I is the ancestor of all MIPS ISA and architecture variants. Anything
ever build in the MIPS empire is either MIPS I or at least contains MIPS I.
If it's running Linux, that is.So there is little point in having cpu_has_mips_1 because it will always
evaluate as true - though usually only at runtime. Thus there is no
point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it.Little complication: traps.c was using a test for a pure MIPS I ISA as
a test for an R3000-style cp0. To deal with that, use a check for
cpu_has_3kex or cpu_has_4kex instead.cpu_has_3kex is a new macro. At the moment its default implementation is
!cpu_has_4kex but this may eventually change if Linux is ever going to
support the oddball MIPS processors R6000 and R8000 so users of either
of these macros should not make any assumptions.Signed-off-by: Ralf Baechle
Patchwork: https://patchwork.linux-mips.org/patch/5551/ -
Signed-off-by: Ralf Baechle
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Signed-off-by: Ralf Baechle
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Signed-off-by: Ralf Baechle
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The serial port changes make it advisable to enable the proper UART
drivers.Signed-off-by: David Daney
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles
Cc: Greg Kroah-Hartman
Cc: Jiri Slaby
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5518/
Signed-off-by: Ralf Baechle -
We will use 8250_dw instead.
Signed-off-by: David Daney
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles
Cc: Greg Kroah-Hartman
Cc: Jiri Slaby
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5517/
Signed-off-by: Ralf Baechle -
A few differences needed by OCTEON:
o These are DWC UARTS, but have USR at a different offset.
o Internal SoC buses require reading back from registers to maintain
write ordering.o 8250 on OCTEON appears with 64-bit wide registers, so when using
readb/writeb in big endian mode we have to adjust the membase to hit
the proper part of the register.o No UCV register, so we hard code some properties.
Because OCTEON doesn't have a UCV register, I change where
dw8250_setup_port(), which reads the UCV, is called by pushing it in
to the OF and ACPI probe functions, and move unchanged
dw8250_setup_port() earlier in the file.Signed-off-by: David Daney
Acked-by: Greg Kroah-Hartman
Cc: Arnd Bergmann
Cc: Heikki Krogerus
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles
Cc: Jiri Slaby
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5516/
Acked-by: Arnd Bergmann
Reviewed-by: Heikki Krogerus
Signed-off-by: Ralf Baechle -
Following patch to use generic 8250 drivers will need proper clock
information. So when using the internal device tree, populate the
"clock-frequency" property with the correct value.Signed-off-by: David Daney
Cc: linux-mips@linux-mips.org
Cc: Jamie Iles
Cc: Greg Kroah-Hartman
Cc: Jiri Slaby
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5515/
Signed-off-by: Ralf Baechle -
Add support for the Netgear CVG834G and enable the two UARTs, Ethernet
on the first MAC, PCI and the two leds.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli
Patchwork: https://patchwork.linux-mips.org/patch/5502/
Signed-off-by: Ralf Baechle -
Some boards may need to reset their external PHY or switch they are
attached to, add a hook for doing this along with providing custom
linux/gpio.h flags for doing this.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli
Patchwork: https://patchwork.linux-mips.org/patch/5501/
Signed-off-by: Ralf Baechle -
The BCM3368 SoC uses a NVRAM format which is not compatible with the one
used by CFE, provide a default MAC address which is suitable for use and
which is the default one also being used by the bootloader on these
chips.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5498/
Signed-off-by: Ralf Baechle -
Add the firmware header format which is used by Broadcom Cable Modem
SoCs such as the BCM3368 SoC. We export the bcm_hcs firmware format
structure because it is used by user-land tools to create firmware
images for these SoCs and will later be used by a corresponding MTD
parser.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5496/
Signed-off-by: Ralf Baechle -
The Broadcom BCM3368 Cable Modem SoC is extremely similar to the
existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort
in the existing code base is required to get it supported. This patch adds
support for the following on-chip peripherals:- two UARTS
- GPIO
- Ethernet
- SPI
- PCI
- NOR FlashThe most noticeable difference with 3368 is that it has its peripheral
register at 0xfff8_0000 we check that separately in ioremap.h. Since
3368 is identical to 6358 for its clock and reset bits, we use them
verbatim.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5499/
Signed-off-by: Ralf Baechle -
Enabling BOOT_RAW is mandatory to get a binary image (objcopy from ELF
to binary) to work. This does not affect the ELF kernels which are used
by CFE on BCM63XX DSL platforms, but is going to be necessary to support
BCM63XX on Cable Modem chips such as BCM3368.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5500/
Signed-off-by: Ralf Baechle -
This board has been EOL for many years now; lets not burden people doing
build coverage and other tree wide work with working on essentially dead
files.[ralf@linux-mips.org: Also remove arch/mips/include/asm/mach-wrppmc/war.h.]
Signed-off-by: Paul Gortmaker
Cc: linux-mips@linux-mips.org
Cc: Paul Gortmaker
Patchwork: http://patchwork.linux-mips.org/patch/5503/
Signed-off-by: Ralf Baechle -
Signed-off-by: Ralf Baechle
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Signed-off-by: Ralf Baechle
