10 Sep, 2009

6 commits

  • Introduce a new PCI device flag, wakeup_prepared, to prevent PCI
    wake-up preparation code from being executed twice in a row for the
    same device and for the same purpose.

    Reviewed-by: Matthew Garrett
    Signed-off-by: Rafael J. Wysocki
    Signed-off-by: Jesse Barnes

    Rafael J. Wysocki
     
  • In general a BIOS may goof or we may hotplug in a hotplug controller.
    In either case the kernel needs to reserve resources for plugging
    in more devices in the future instead of creating a minimal resource
    assignment.

    We already do this for cardbus bridges I am just adding a variant
    for pcie bridges.

    v2: Make testing for pcie hotplug bridges based on a flag.

    So far we only set the flag for pcie but a header_quirk
    could easily be added for the non-standard pci hotplug
    bridges.

    Signed-off-by: Eric W. Biederman
    Signed-off-by: Jesse Barnes

    Eric W. Biederman
     
  • Separate out pci_add_dynid() from store_new_id() and export it so that
    in-kernel code can add PCI IDs dynamically. As the function will be
    available regardless of HOTPLUG, put it and pull pci_free_dynids()
    outside of CONFIG_HOTPLUG.

    This will be used by pci-stub to initialize initial IDs via module
    param.

    While at it, remove bogus get_driver() failure check.

    Signed-off-by: Tejun Heo
    Acked-by: Greg Kroah-Hartman
    Reviewed-by: Grant Grundler
    Signed-off-by: Jesse Barnes

    Tejun Heo
     
  • This is the first of three patches that implement a bit field that PCI
    Express device drivers can use to indicate they need a fundamental reset
    during error recovery.

    By default, the EEH framework on powerpc does what's known as a "hot
    reset" during recovery of a PCI Express device. We've found a case
    where the device needs a "fundamental reset" to recover properly. The
    current PCI error recovery and EEH frameworks do not support this
    distinction.

    The attached patch (courtesy of Richard Lary) adds a bit field to
    pci_dev that indicates whether the device requires a fundamental reset
    during recovery.

    These patches supersede the previously submitted patch that implemented
    a fundamental reset bit field.

    Signed-off-by: Mike Mason
    Signed-off-by: Richard Lary
    Signed-off-by: Jesse Barnes

    Mike Mason
     
  • Background:
    Graphic devices are accessed through ranges in I/O or memory space. While most
    modern devices allow relocation of such ranges, some "Legacy" VGA devices
    implemented on PCI will typically have the same "hard-decoded" addresses as
    they did on ISA. For more details see "PCI Bus Binding to IEEE Std 1275-1994
    Standard for Boot (Initialization Configuration) Firmware Revision 2.1"
    Section 7, Legacy Devices.

    The Resource Access Control (RAC) module inside the X server currently does
    the task of arbitration when more than one legacy device co-exists on the same
    machine. But the problem happens when these devices are trying to be accessed
    by different userspace clients (e.g. two server in parallel). Their address
    assignments conflict. Therefore an arbitration scheme _outside_ of the X
    server is needed to control the sharing of these resources. This document
    introduces the operation of the VGA arbiter implemented for Linux kernel.

    Signed-off-by: Benjamin Herrenschmidt
    Signed-off-by: Tiago Vignatti
    Signed-off-by: Dave Airlie
    Signed-off-by: Jesse Barnes

    Benjamin Herrenschmidt
     
  • Some devices allow an individual function to be reset without affecting
    other functions in the same device: that's what pci_reset_function does.
    For devices that have this support, expose reset attribite in sysfs.

    This is useful e.g. for virtualization, where a qemu userspace
    process wants to reset the device when the guest is reset,
    to emulate machine reboot as closely as possible.

    Acked-by: Greg Kroah-Hartman
    Signed-off-by: Michael S. Tsirkin
    Signed-off-by: Jesse Barnes

    Michael S. Tsirkin
     

30 Jun, 2009

1 commit


23 Jun, 2009

2 commits

  • * git://git.infradead.org/~dwmw2/iommu-2.6.31:
    intel-iommu: Fix one last ia64 build problem in Pass Through Support
    VT-d: support the device IOTLB
    VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
    VT-d: add device IOTLB invalidation support
    VT-d: parse ATSR in DMA Remapping Reporting Structure
    PCI: handle Virtual Function ATS enabling
    PCI: support the ATS capability
    intel-iommu: dmar_set_interrupt return error value
    intel-iommu: Tidy up iommu->gcmd handling
    intel-iommu: Fix tiny theoretical race in write-buffer flush.
    intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.
    intel-iommu: Clean up handling of "caching mode" vs. context flushing.
    VT-d: fix invalid domain id for KVM context flush
    Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through Support
    Intel IOMMU Pass Through Support

    Fix up trivial conflicts in drivers/pci/{intel-iommu.c,intr_remapping.c}

    Linus Torvalds
     
  • * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (74 commits)
    PCI: make msi_free_irqs() to use msix_mask_irq() instead of open coded write
    PCI: Fix the NIU MSI-X problem in a better way
    PCI ASPM: remove get_root_port_link
    PCI ASPM: cleanup pcie_aspm_sanity_check
    PCI ASPM: remove has_switch field
    PCI ASPM: cleanup calc_Lx_latency
    PCI ASPM: cleanup pcie_aspm_get_cap_device
    PCI ASPM: cleanup clkpm checks
    PCI ASPM: cleanup __pcie_aspm_check_state_one
    PCI ASPM: cleanup initialization
    PCI ASPM: cleanup change input argument of aspm functions
    PCI ASPM: cleanup misc in struct pcie_link_state
    PCI ASPM: cleanup clkpm state in struct pcie_link_state
    PCI ASPM: cleanup latency field in struct pcie_link_state
    PCI ASPM: cleanup aspm state field in struct pcie_link_state
    PCI ASPM: fix typo in struct pcie_link_state
    PCI: drivers/pci/slot.c should depend on CONFIG_SYSFS
    PCI: remove redundant __msi_set_enable()
    PCI PM: consistently use type bool for wake enable variable
    x86/ACPI: Correct maximum allowed _CRS returned resources and warn if exceeded
    ...

    Linus Torvalds
     

17 Jun, 2009

5 commits

  • Other functions use type bool, so use that for pci_enable_wake as well.

    Signed-off-by: Frans Pop
    Signed-off-by: Jesse Barnes

    Frans Pop
     
  • This patch enhances the FLR functions:
    1) remove disable_irq() so the shared IRQ won't be disabled.
    2) replace the 1s wait with 100, 200 and 400ms wait intervals
    for the Pending Transaction.
    3) replace mdelay() with msleep().
    4) add might_sleep().
    5) lock the device to prevent PM suspend from accessing the CSRs
    during the reset.
    6) coding style fixes.

    Reviewed-by: Kenji Kaneshige
    Signed-off-by: Yu Zhao
    Signed-off-by: Jesse Barnes

    Yu Zhao
     
  • Based on PCI Express AER specs, a root port might receive multiple
    TLP errors while it could only save a correctable error source id
    and an uncorrectable error source id at the same time. In addition,
    some root port hardware might be unable to provide a correct source
    id, i.e., the source id, or the bus id part of the source id provided
    by root port might be equal to 0.

    The patchset implements the support in kernel by searching the device
    tree under the root port.

    Patch 1 changes parameter cb of function pci_walk_bus to return a value.
    When cb return non-zero, pci_walk_bus stops more searching on the
    device tree.

    Reviewed-by: Andrew Patterson
    Signed-off-by: Zhang Yanmin
    Signed-off-by: Jesse Barnes

    Zhang, Yanmin
     
  • Create symbolic link to hotplug driver module in the PCI slot
    directory (/sys/bus/pci/slots/). In the past, we need to load
    hotplug drivers one by one to identify the hotplug driver that handles
    the slot, and it was very inconvenient especially for trouble shooting.
    With this change, we can easily identify the hotplug driver.

    Signed-off-by: Taku Izumi
    Signed-off-by: Kenji Kaneshige
    Reviewed-by: Alex Chiang
    Signed-off-by: Jesse Barnes

    Kenji Kaneshige
     
  • pci_bus_set_ops changes pci_ops associated with a pci_bus. This can be
    used by debug tools such as PCIE AER error injection to fake some PCI
    configuration registers.

    Acked-by: Kenji Kaneshige
    Signed-off-by: Huang Ying
    Signed-off-by: Jesse Barnes

    Huang Ying
     

16 Jun, 2009

1 commit

  • This patch (as1235) adds an array of PCI power-state names, together
    with a simple inline accessor routine.

    Signed-off-by: Alan Stern
    Acked-by: Rafael J. Wysocki
    Acked-by: Jesse Barnes
    Signed-off-by: Greg Kroah-Hartman

    Alan Stern
     

12 Jun, 2009

3 commits

  • Adds support for PCI Express transaction layer end-to-end CRC checking
    (ECRC). This patch will enable/disable ECRC checking by setting/clearing
    the ECRC Check Enable and/or ECRC Generation Enable bits for devices that
    support ECRC.

    The ECRC setting is controlled by the "pci=ecrc=" command-line
    option. If this option is not set or is set to 'bios", the enable and
    generation bits are left in whatever state that firmware/BIOS set them to.
    The "off" setting turns them off, and the "on" option turns them on (if the
    device supports it).

    Turning ECRC on or off can be a data integrity versus performance
    tradeoff. In theory, turning it on will catch more data errors, turning
    it off means possibly better performance since CRC does not need to be
    calculated by the PCIe hardware and packet sizes are reduced.

    Signed-off-by: Andrew Patterson
    Signed-off-by: Jesse Barnes

    Andrew Patterson
     
  • The last in-tree caller of pci_find_slot has been converted, so
    let's get rid of this deprecated interface.

    Signed-off-by: Alex Chiang
    Signed-off-by: Jesse Barnes

    Alex Chiang
     
  • We should not assign 64bit ranges to PCI devices that only take 32bit
    prefetchable addresses.

    Try to set IORESOURCE_MEM_64 in 64bit resource of pci_device/pci_bridge
    and make the bus resource only have that bit set when all devices under
    it support 64bit prefetchable memory. Use that flag to allocate
    resources from that range.

    Reported-by: Yannick
    Reviewed-by: Ivan Kokshaysky
    Signed-off-by: Yinghai Lu
    Signed-off-by: Jesse Barnes

    Yinghai Lu
     

18 May, 2009

1 commit

  • The PCIe ATS capability makes the Endpoint be able to request the
    DMA address translation from the IOMMU and cache the translation
    in the device side, thus alleviate IOMMU pressure and improve the
    hardware performance in the I/O virtualization environment.

    Signed-off-by: Yu Zhao
    Acked-by: Jesse Barnes
    Signed-off-by: David Woodhouse

    Yu Zhao
     

07 Apr, 2009

1 commit

  • This patch sets up disabled bridges even if buses have already been
    added.

    pci_assign_unassigned_resources is called after buses are added.
    pci_assign_unassigned_resources calls pci_bus_assign_resources.
    pci_bus_assign_resources calls pci_setup_bridge to configure BARs of
    bridges.

    Currently pci_setup_bridge returns immediately if the bus have already
    been added. So pci_assign_unassigned_resources can't configure BARs of
    bridges that were added in a disabled state; this patch fixes the issue.

    On logical hot-add, we need to prevent the kernel from re-initializing
    bridges that have already been initialized. To achieve this,
    pci_setup_bridge returns immediately if the bridge have already been
    enabled.

    We don't need to check whether the specified bus is a root bus or not.
    pci_setup_bridge is not called on a root bus, because a root bus does
    not have a bridge.

    The patch adds a new helper function, pci_is_enabled. I made the
    function name similar to pci_is_managed. The codes which use
    enable_cnt directly are changed to use pci_is_enabled.

    Acked-by: Alex Chiang
    Signed-off-by: Yuji Shimada
    Signed-off-by: Jesse Barnes

    Yuji Shimada
     

02 Apr, 2009

1 commit

  • * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (88 commits)
    PCI: fix HT MSI mapping fix
    PCI: don't enable too much HT MSI mapping
    x86/PCI: make pci=lastbus=255 work when acpi is on
    PCI: save and restore PCIe 2.0 registers
    PCI: update fakephp for bus_id removal
    PCI: fix kernel oops on bridge removal
    PCI: fix conflict between SR-IOV and config space sizing
    powerpc/PCI: include pci.h in powerpc MSI implementation
    PCI Hotplug: schedule fakephp for feature removal
    PCI Hotplug: rename legacy_fakephp to fakephp
    PCI Hotplug: restore fakephp interface with complete reimplementation
    PCI: Introduce /sys/bus/pci/devices/.../rescan
    PCI: Introduce /sys/bus/pci/devices/.../remove
    PCI: Introduce /sys/bus/pci/rescan
    PCI: Introduce pci_rescan_bus()
    PCI: do not enable bridges more than once
    PCI: do not initialize bridges more than once
    PCI: always scan child buses
    PCI: pci_scan_slot() returns newly found devices
    PCI: don't scan existing devices
    ...

    Fix trivial append-only conflict in Documentation/feature-removal-schedule.txt

    Linus Torvalds
     

31 Mar, 2009

1 commit

  • The radeonfb driver needs to program the device's PMCSR directly due
    to some quirky hardware it has to handle (see
    http://bugzilla.kernel.org/show_bug.cgi?id=12846 for details) and
    after doing that it needs to call the platform (usually ACPI) to
    finish the power transition of the device. Currently it uses
    pci_set_power_state() for this purpose, however making a specific
    assumption about the internal behavior of this function, which has
    changed recently so that this assumption is no longer satisfied.
    For this reason, introduce __pci_complete_power_transition() that may
    be called by the radeonfb driver to complete the power transition of
    the device. For symmetry, introduce __pci_start_power_transition().

    Signed-off-by: Rafael J. Wysocki
    Acked-by: Jesse Barnes

    Rafael J. Wysocki
     

21 Mar, 2009

6 commits

  • This API is used by the PCI core to rescan a bus and rediscover
    newly added devices.

    Over time, it is expected that the various PCI hotplug drivers
    will migrate to this interface and away from the old
    pci_do_scan_bus() interface.

    Signed-off-by: Alex Chiang
    Signed-off-by: Jesse Barnes

    Alex Chiang
     
  • Introduce pci_is_root_bus helper function. This will help make code
    more consistent, as well as prevent incorrect assumptions (such as
    pci_bus->self == NULL on a root bus, which is not always true).

    Signed-off-by: Kenji Kaneshige
    Signed-off-by: Alex Chiang
    Signed-off-by: Jesse Barnes

    Kenji Kaneshige
     
  • Add or remove a Virtual Function after receiving a Migrate In or Out
    Request.

    Reviewed-by: Matthew Wilcox
    Signed-off-by: Yu Zhao
    Signed-off-by: Jesse Barnes

    Yu Zhao
     
  • Add or remove the Virtual Function when the SR-IOV is enabled or
    disabled by the device driver. This can happen anytime rather than
    only at the device probe stage.

    Reviewed-by: Matthew Wilcox
    Signed-off-by: Yu Zhao
    Signed-off-by: Jesse Barnes

    Yu Zhao
     
  • If a device has the SR-IOV capability, initialize it (set the ARI
    Capable Hierarchy in the lowest numbered PF if necessary; calculate
    the System Page Size for the VF MMIO, probe the VF Offset, Stride
    and BARs). A lock for the VF bus allocation is also initialized if
    a PF is the lowest numbered PF.

    Reviewed-by: Matthew Wilcox
    Signed-off-by: Yu Zhao
    Signed-off-by: Jesse Barnes

    Yu Zhao
     
  • Add the new API pci_enable_msi_block() to allow drivers to
    request multiple MSI and reimplement pci_enable_msi in terms of
    pci_enable_msi_block. Ensure that the architecture back ends don't
    have to know about multiple MSI.

    Signed-off-by: Matthew Wilcox
    Signed-off-by: Jesse Barnes

    Matthew Wilcox
     

20 Mar, 2009

3 commits


05 Feb, 2009

1 commit

  • This patch makes the ROM reading code return an error to user space if
    the size of the ROM read is equal to 0.

    The patch also emits a warnings if the contents of the ROM are invalid,
    and documents the effects of the "enable" file on ROM reading.

    Signed-off-by: Timothy S. Nelson
    Acked-by: Alex Villacis-Lasso
    Signed-off-by: Jesse Barnes

    Timothy S. Nelson
     

17 Jan, 2009

1 commit

  • There is a problem in our handling of suspend-resume of PCI devices that
    many of them have their standard config registers restored with
    interrupts enabled and they are put into the full power state with
    interrupts enabled as well. This may lead to the following scenario:
    * an interrupt vector is shared between two or more devices
    * one device is resumed earlier and generates an interrupt
    * the interrupt handler of another device tries to handle it and
    attempts to access the device the config space of which hasn't been
    restored yet and/or which still is in a low power state
    * the system crashes as a result

    To prevent this from happening we should restore the standard
    configuration registers of all devices with interrupts disabled and we
    should put them into the D0 power state right after that.
    Unfortunately, this cannot be done using the existing
    pci_set_power_state(), because it can sleep. Also, to do it we have to
    make sure that the config spaces of all devices were actually saved
    during suspend.

    Signed-off-by: Rafael J. Wysocki
    Acked-by: Linus Torvalds
    Signed-off-by: Jesse Barnes

    Rafael J. Wysocki
     

08 Jan, 2009

7 commits